18b80bd28SPhilippe Mathieu-Daudé /* 28b80bd28SPhilippe Mathieu-Daudé * CPU operations specific to system emulation 38b80bd28SPhilippe Mathieu-Daudé * 48b80bd28SPhilippe Mathieu-Daudé * Copyright (c) 2012 SUSE LINUX Products GmbH 58b80bd28SPhilippe Mathieu-Daudé * 68b80bd28SPhilippe Mathieu-Daudé * This work is licensed under the terms of the GNU GPL, version 2 or later. 78b80bd28SPhilippe Mathieu-Daudé * See the COPYING file in the top-level directory. 88b80bd28SPhilippe Mathieu-Daudé */ 98b80bd28SPhilippe Mathieu-Daudé 108b80bd28SPhilippe Mathieu-Daudé #ifndef SYSEMU_CPU_OPS_H 118b80bd28SPhilippe Mathieu-Daudé #define SYSEMU_CPU_OPS_H 128b80bd28SPhilippe Mathieu-Daudé 138b80bd28SPhilippe Mathieu-Daudé #include "hw/core/cpu.h" 148b80bd28SPhilippe Mathieu-Daudé 158b80bd28SPhilippe Mathieu-Daudé /* 168b80bd28SPhilippe Mathieu-Daudé * struct SysemuCPUOps: System operations specific to a CPU class 178b80bd28SPhilippe Mathieu-Daudé */ 188b80bd28SPhilippe Mathieu-Daudé typedef struct SysemuCPUOps { 19feece4d0SPhilippe Mathieu-Daudé /** 20*08928c6dSPhilippe Mathieu-Daudé * @get_phys_page_debug: Callback for obtaining a physical address. 21*08928c6dSPhilippe Mathieu-Daudé */ 22*08928c6dSPhilippe Mathieu-Daudé hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); 23*08928c6dSPhilippe Mathieu-Daudé /** 24*08928c6dSPhilippe Mathieu-Daudé * @get_phys_page_attrs_debug: Callback for obtaining a physical address 25*08928c6dSPhilippe Mathieu-Daudé * and the associated memory transaction attributes to use for the 26*08928c6dSPhilippe Mathieu-Daudé * access. 27*08928c6dSPhilippe Mathieu-Daudé * CPUs which use memory transaction attributes should implement this 28*08928c6dSPhilippe Mathieu-Daudé * instead of get_phys_page_debug. 29*08928c6dSPhilippe Mathieu-Daudé */ 30*08928c6dSPhilippe Mathieu-Daudé hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, 31*08928c6dSPhilippe Mathieu-Daudé MemTxAttrs *attrs); 32*08928c6dSPhilippe Mathieu-Daudé /** 33faf39e82SPhilippe Mathieu-Daudé * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for 34faf39e82SPhilippe Mathieu-Daudé * a memory access with the specified memory transaction attributes. 35faf39e82SPhilippe Mathieu-Daudé */ 36faf39e82SPhilippe Mathieu-Daudé int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); 37faf39e82SPhilippe Mathieu-Daudé /** 3883ec01b6SPhilippe Mathieu-Daudé * @get_crash_info: Callback for reporting guest crash information in 3983ec01b6SPhilippe Mathieu-Daudé * GUEST_PANICKED events. 4083ec01b6SPhilippe Mathieu-Daudé */ 4183ec01b6SPhilippe Mathieu-Daudé GuestPanicInformation* (*get_crash_info)(CPUState *cpu); 4283ec01b6SPhilippe Mathieu-Daudé /** 43715e3c1aSPhilippe Mathieu-Daudé * @write_elf32_note: Callback for writing a CPU-specific ELF note to a 44715e3c1aSPhilippe Mathieu-Daudé * 32-bit VM coredump. 45715e3c1aSPhilippe Mathieu-Daudé */ 46715e3c1aSPhilippe Mathieu-Daudé int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu, 47715e3c1aSPhilippe Mathieu-Daudé int cpuid, void *opaque); 48715e3c1aSPhilippe Mathieu-Daudé /** 49715e3c1aSPhilippe Mathieu-Daudé * @write_elf64_note: Callback for writing a CPU-specific ELF note to a 50715e3c1aSPhilippe Mathieu-Daudé * 64-bit VM coredump. 51715e3c1aSPhilippe Mathieu-Daudé */ 52715e3c1aSPhilippe Mathieu-Daudé int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, 53715e3c1aSPhilippe Mathieu-Daudé int cpuid, void *opaque); 54715e3c1aSPhilippe Mathieu-Daudé /** 55715e3c1aSPhilippe Mathieu-Daudé * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF 56715e3c1aSPhilippe Mathieu-Daudé * note to a 32-bit VM coredump. 57715e3c1aSPhilippe Mathieu-Daudé */ 58715e3c1aSPhilippe Mathieu-Daudé int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, 59715e3c1aSPhilippe Mathieu-Daudé void *opaque); 60715e3c1aSPhilippe Mathieu-Daudé /** 61715e3c1aSPhilippe Mathieu-Daudé * @write_elf64_qemunote: Callback for writing a CPU- and QEMU-specific ELF 62715e3c1aSPhilippe Mathieu-Daudé * note to a 64-bit VM coredump. 63715e3c1aSPhilippe Mathieu-Daudé */ 64715e3c1aSPhilippe Mathieu-Daudé int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, 65715e3c1aSPhilippe Mathieu-Daudé void *opaque); 66715e3c1aSPhilippe Mathieu-Daudé /** 67da383e02SPhilippe Mathieu-Daudé * @virtio_is_big_endian: Callback to return %true if a CPU which supports 68da383e02SPhilippe Mathieu-Daudé * runtime configurable endianness is currently big-endian. 69da383e02SPhilippe Mathieu-Daudé * Non-configurable CPUs can use the default implementation of this method. 70da383e02SPhilippe Mathieu-Daudé * This method should not be used by any callers other than the pre-1.0 71da383e02SPhilippe Mathieu-Daudé * virtio devices. 72da383e02SPhilippe Mathieu-Daudé */ 73da383e02SPhilippe Mathieu-Daudé bool (*virtio_is_big_endian)(CPUState *cpu); 74da383e02SPhilippe Mathieu-Daudé 75da383e02SPhilippe Mathieu-Daudé /** 76feece4d0SPhilippe Mathieu-Daudé * @legacy_vmsd: Legacy state for migration. 77feece4d0SPhilippe Mathieu-Daudé * Do not use in new targets, use #DeviceClass::vmsd instead. 78feece4d0SPhilippe Mathieu-Daudé */ 79feece4d0SPhilippe Mathieu-Daudé const VMStateDescription *legacy_vmsd; 80feece4d0SPhilippe Mathieu-Daudé 818b80bd28SPhilippe Mathieu-Daudé } SysemuCPUOps; 828b80bd28SPhilippe Mathieu-Daudé 838b80bd28SPhilippe Mathieu-Daudé #endif /* SYSEMU_CPU_OPS_H */ 84