xref: /qemu/include/hw/char/shakti_uart.h (revision 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267)
1*07f334d8SVijai Kumar K /*
2*07f334d8SVijai Kumar K  * SHAKTI UART
3*07f334d8SVijai Kumar K  *
4*07f334d8SVijai Kumar K  * Copyright (c) 2021 Vijai Kumar K <vijai@behindbytes.com>
5*07f334d8SVijai Kumar K  *
6*07f334d8SVijai Kumar K  * Permission is hereby granted, free of charge, to any person obtaining a copy
7*07f334d8SVijai Kumar K  * of this software and associated documentation files (the "Software"), to deal
8*07f334d8SVijai Kumar K  * in the Software without restriction, including without limitation the rights
9*07f334d8SVijai Kumar K  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10*07f334d8SVijai Kumar K  * copies of the Software, and to permit persons to whom the Software is
11*07f334d8SVijai Kumar K  * furnished to do so, subject to the following conditions:
12*07f334d8SVijai Kumar K  *
13*07f334d8SVijai Kumar K  * The above copyright notice and this permission notice shall be included in
14*07f334d8SVijai Kumar K  * all copies or substantial portions of the Software.
15*07f334d8SVijai Kumar K  *
16*07f334d8SVijai Kumar K  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*07f334d8SVijai Kumar K  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*07f334d8SVijai Kumar K  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19*07f334d8SVijai Kumar K  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20*07f334d8SVijai Kumar K  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21*07f334d8SVijai Kumar K  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22*07f334d8SVijai Kumar K  * THE SOFTWARE.
23*07f334d8SVijai Kumar K  */
24*07f334d8SVijai Kumar K 
25*07f334d8SVijai Kumar K #ifndef HW_SHAKTI_UART_H
26*07f334d8SVijai Kumar K #define HW_SHAKTI_UART_H
27*07f334d8SVijai Kumar K 
28*07f334d8SVijai Kumar K #include "hw/sysbus.h"
29*07f334d8SVijai Kumar K #include "chardev/char-fe.h"
30*07f334d8SVijai Kumar K 
31*07f334d8SVijai Kumar K #define SHAKTI_UART_BAUD        0x00
32*07f334d8SVijai Kumar K #define SHAKTI_UART_TX          0x04
33*07f334d8SVijai Kumar K #define SHAKTI_UART_RX          0x08
34*07f334d8SVijai Kumar K #define SHAKTI_UART_STATUS      0x0C
35*07f334d8SVijai Kumar K #define SHAKTI_UART_DELAY       0x10
36*07f334d8SVijai Kumar K #define SHAKTI_UART_CONTROL     0x14
37*07f334d8SVijai Kumar K #define SHAKTI_UART_INT_EN      0x18
38*07f334d8SVijai Kumar K #define SHAKTI_UART_IQ_CYCLES   0x1C
39*07f334d8SVijai Kumar K #define SHAKTI_UART_RX_THRES    0x20
40*07f334d8SVijai Kumar K 
41*07f334d8SVijai Kumar K #define SHAKTI_UART_STATUS_TX_EMPTY     (1 << 0)
42*07f334d8SVijai Kumar K #define SHAKTI_UART_STATUS_TX_FULL      (1 << 1)
43*07f334d8SVijai Kumar K #define SHAKTI_UART_STATUS_RX_NOT_EMPTY (1 << 2)
44*07f334d8SVijai Kumar K #define SHAKTI_UART_STATUS_RX_FULL      (1 << 3)
45*07f334d8SVijai Kumar K /* 9600 8N1 is the default setting */
46*07f334d8SVijai Kumar K /* Reg value = (50000000 Hz)/(16 * 9600)*/
47*07f334d8SVijai Kumar K #define SHAKTI_UART_BAUD_DEFAULT    0x0145
48*07f334d8SVijai Kumar K #define SHAKTI_UART_CONTROL_DEFAULT 0x0100
49*07f334d8SVijai Kumar K 
50*07f334d8SVijai Kumar K #define TYPE_SHAKTI_UART "shakti-uart"
51*07f334d8SVijai Kumar K #define SHAKTI_UART(obj) \
52*07f334d8SVijai Kumar K     OBJECT_CHECK(ShaktiUartState, (obj), TYPE_SHAKTI_UART)
53*07f334d8SVijai Kumar K 
54*07f334d8SVijai Kumar K typedef struct {
55*07f334d8SVijai Kumar K     /* <private> */
56*07f334d8SVijai Kumar K     SysBusDevice parent_obj;
57*07f334d8SVijai Kumar K 
58*07f334d8SVijai Kumar K     /* <public> */
59*07f334d8SVijai Kumar K     MemoryRegion mmio;
60*07f334d8SVijai Kumar K 
61*07f334d8SVijai Kumar K     uint32_t uart_baud;
62*07f334d8SVijai Kumar K     uint32_t uart_tx;
63*07f334d8SVijai Kumar K     uint32_t uart_rx;
64*07f334d8SVijai Kumar K     uint32_t uart_status;
65*07f334d8SVijai Kumar K     uint32_t uart_delay;
66*07f334d8SVijai Kumar K     uint32_t uart_control;
67*07f334d8SVijai Kumar K     uint32_t uart_interrupt;
68*07f334d8SVijai Kumar K     uint32_t uart_iq_cycles;
69*07f334d8SVijai Kumar K     uint32_t uart_rx_threshold;
70*07f334d8SVijai Kumar K 
71*07f334d8SVijai Kumar K     CharBackend chr;
72*07f334d8SVijai Kumar K } ShaktiUartState;
73*07f334d8SVijai Kumar K 
74*07f334d8SVijai Kumar K #endif /* HW_SHAKTI_UART_H */
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