1 #ifndef HW_ESCC_H 2 #define HW_ESCC_H 3 4 #include "chardev/char-fe.h" 5 #include "chardev/char-serial.h" 6 #include "hw/sysbus.h" 7 #include "ui/input.h" 8 #include "qom/object.h" 9 10 /* escc.c */ 11 #define TYPE_ESCC "escc" 12 #define ESCC_SIZE 4 13 14 typedef struct ESCCState ESCCState; 15 #define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC) 16 17 typedef enum { 18 escc_chn_a, escc_chn_b, 19 } ESCCChnID; 20 21 typedef enum { 22 escc_serial, escc_kbd, escc_mouse, 23 } ESCCChnType; 24 25 #define ESCC_SERIO_QUEUE_SIZE 256 26 27 typedef struct { 28 uint8_t data[ESCC_SERIO_QUEUE_SIZE]; 29 int rptr, wptr, count; 30 } ESCCSERIOQueue; 31 32 #define ESCC_SERIAL_REGS 16 33 typedef struct ESCCChannelState { 34 qemu_irq irq; 35 uint32_t rxint, txint, rxint_under_svc, txint_under_svc; 36 struct ESCCChannelState *otherchn; 37 uint32_t reg; 38 uint8_t wregs[ESCC_SERIAL_REGS], rregs[ESCC_SERIAL_REGS]; 39 ESCCSERIOQueue queue; 40 CharBackend chr; 41 int e0_mode, led_mode, caps_lock_mode, num_lock_mode; 42 int disabled; 43 int clock; 44 uint32_t vmstate_dummy; 45 ESCCChnID chn; /* this channel, A (base+4) or B (base+0) */ 46 ESCCChnType type; 47 uint8_t rx, tx; 48 QemuInputHandlerState *hs; 49 } ESCCChannelState; 50 51 struct ESCCState { 52 SysBusDevice parent_obj; 53 54 struct ESCCChannelState chn[2]; 55 uint32_t it_shift; 56 bool bit_swap; 57 MemoryRegion mmio; 58 uint32_t disabled; 59 uint32_t frequency; 60 }; 61 62 #endif 63