xref: /qemu/include/hw/char/cadence_uart.h (revision b636db306e06ee1c267d6e15e3b5bc109252617f)
18ae57b2fSPeter Crosthwaite /*
28ae57b2fSPeter Crosthwaite  * Device model for Cadence UART
38ae57b2fSPeter Crosthwaite  *
48ae57b2fSPeter Crosthwaite  * Copyright (c) 2010 Xilinx Inc.
58ae57b2fSPeter Crosthwaite  * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com)
68ae57b2fSPeter Crosthwaite  * Copyright (c) 2012 PetaLogix Pty Ltd.
78ae57b2fSPeter Crosthwaite  * Written by Haibing Ma
88ae57b2fSPeter Crosthwaite  *            M.Habib
98ae57b2fSPeter Crosthwaite  *
108ae57b2fSPeter Crosthwaite  * This program is free software; you can redistribute it and/or
118ae57b2fSPeter Crosthwaite  * modify it under the terms of the GNU General Public License
128ae57b2fSPeter Crosthwaite  * as published by the Free Software Foundation; either version
138ae57b2fSPeter Crosthwaite  * 2 of the License, or (at your option) any later version.
148ae57b2fSPeter Crosthwaite  *
158ae57b2fSPeter Crosthwaite  * You should have received a copy of the GNU General Public License along
168ae57b2fSPeter Crosthwaite  * with this program; if not, see <http://www.gnu.org/licenses/>.
178ae57b2fSPeter Crosthwaite  */
188ae57b2fSPeter Crosthwaite 
198ae57b2fSPeter Crosthwaite #ifndef CADENCE_UART_H
200553d895SMarkus Armbruster #define CADENCE_UART_H
218ae57b2fSPeter Crosthwaite 
22a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h"
238ae57b2fSPeter Crosthwaite #include "hw/sysbus.h"
244d43a603SMarc-André Lureau #include "chardev/char-fe.h"
258ae57b2fSPeter Crosthwaite #include "qemu/timer.h"
268ae57b2fSPeter Crosthwaite 
278ae57b2fSPeter Crosthwaite #define CADENCE_UART_RX_FIFO_SIZE           16
288ae57b2fSPeter Crosthwaite #define CADENCE_UART_TX_FIFO_SIZE           16
298ae57b2fSPeter Crosthwaite 
308ae57b2fSPeter Crosthwaite #define CADENCE_UART_R_MAX (0x48/4)
318ae57b2fSPeter Crosthwaite 
328ae57b2fSPeter Crosthwaite #define TYPE_CADENCE_UART "cadence_uart"
338ae57b2fSPeter Crosthwaite #define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \
348ae57b2fSPeter Crosthwaite                                        TYPE_CADENCE_UART)
358ae57b2fSPeter Crosthwaite 
368ae57b2fSPeter Crosthwaite typedef struct {
378ae57b2fSPeter Crosthwaite     /*< private >*/
388ae57b2fSPeter Crosthwaite     SysBusDevice parent_obj;
398ae57b2fSPeter Crosthwaite 
408ae57b2fSPeter Crosthwaite     /*< public >*/
418ae57b2fSPeter Crosthwaite     MemoryRegion iomem;
428ae57b2fSPeter Crosthwaite     uint32_t r[CADENCE_UART_R_MAX];
438ae57b2fSPeter Crosthwaite     uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE];
448ae57b2fSPeter Crosthwaite     uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE];
458ae57b2fSPeter Crosthwaite     uint32_t rx_wpos;
468ae57b2fSPeter Crosthwaite     uint32_t rx_count;
478ae57b2fSPeter Crosthwaite     uint32_t tx_count;
488ae57b2fSPeter Crosthwaite     uint64_t char_tx_time;
49becdfa00SMarc-André Lureau     CharBackend chr;
508ae57b2fSPeter Crosthwaite     qemu_irq irq;
518ae57b2fSPeter Crosthwaite     QEMUTimer *fifo_trigger_handle;
52*b636db30SDamien Hedde     Clock *refclk;
538ae57b2fSPeter Crosthwaite } CadenceUARTState;
548ae57b2fSPeter Crosthwaite 
554be12ea0Sxiaoqiang zhao static inline DeviceState *cadence_uart_create(hwaddr addr,
564be12ea0Sxiaoqiang zhao                                         qemu_irq irq,
570ec7b3e7SMarc-André Lureau                                         Chardev *chr)
584be12ea0Sxiaoqiang zhao {
594be12ea0Sxiaoqiang zhao     DeviceState *dev;
604be12ea0Sxiaoqiang zhao     SysBusDevice *s;
614be12ea0Sxiaoqiang zhao 
624be12ea0Sxiaoqiang zhao     dev = qdev_create(NULL, TYPE_CADENCE_UART);
634be12ea0Sxiaoqiang zhao     s = SYS_BUS_DEVICE(dev);
644be12ea0Sxiaoqiang zhao     qdev_prop_set_chr(dev, "chardev", chr);
654be12ea0Sxiaoqiang zhao     qdev_init_nofail(dev);
664be12ea0Sxiaoqiang zhao     sysbus_mmio_map(s, 0, addr);
674be12ea0Sxiaoqiang zhao     sysbus_connect_irq(s, 0, irq);
684be12ea0Sxiaoqiang zhao 
694be12ea0Sxiaoqiang zhao     return dev;
704be12ea0Sxiaoqiang zhao }
714be12ea0Sxiaoqiang zhao 
728ae57b2fSPeter Crosthwaite #endif
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