1*8ae57b2fSPeter Crosthwaite /* 2*8ae57b2fSPeter Crosthwaite * Device model for Cadence UART 3*8ae57b2fSPeter Crosthwaite * 4*8ae57b2fSPeter Crosthwaite * Copyright (c) 2010 Xilinx Inc. 5*8ae57b2fSPeter Crosthwaite * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) 6*8ae57b2fSPeter Crosthwaite * Copyright (c) 2012 PetaLogix Pty Ltd. 7*8ae57b2fSPeter Crosthwaite * Written by Haibing Ma 8*8ae57b2fSPeter Crosthwaite * M.Habib 9*8ae57b2fSPeter Crosthwaite * 10*8ae57b2fSPeter Crosthwaite * This program is free software; you can redistribute it and/or 11*8ae57b2fSPeter Crosthwaite * modify it under the terms of the GNU General Public License 12*8ae57b2fSPeter Crosthwaite * as published by the Free Software Foundation; either version 13*8ae57b2fSPeter Crosthwaite * 2 of the License, or (at your option) any later version. 14*8ae57b2fSPeter Crosthwaite * 15*8ae57b2fSPeter Crosthwaite * You should have received a copy of the GNU General Public License along 16*8ae57b2fSPeter Crosthwaite * with this program; if not, see <http://www.gnu.org/licenses/>. 17*8ae57b2fSPeter Crosthwaite */ 18*8ae57b2fSPeter Crosthwaite 19*8ae57b2fSPeter Crosthwaite #ifndef CADENCE_UART_H 20*8ae57b2fSPeter Crosthwaite 21*8ae57b2fSPeter Crosthwaite #include "hw/sysbus.h" 22*8ae57b2fSPeter Crosthwaite #include "sysemu/char.h" 23*8ae57b2fSPeter Crosthwaite #include "qemu/timer.h" 24*8ae57b2fSPeter Crosthwaite 25*8ae57b2fSPeter Crosthwaite #define CADENCE_UART_RX_FIFO_SIZE 16 26*8ae57b2fSPeter Crosthwaite #define CADENCE_UART_TX_FIFO_SIZE 16 27*8ae57b2fSPeter Crosthwaite 28*8ae57b2fSPeter Crosthwaite #define CADENCE_UART_R_MAX (0x48/4) 29*8ae57b2fSPeter Crosthwaite 30*8ae57b2fSPeter Crosthwaite #define TYPE_CADENCE_UART "cadence_uart" 31*8ae57b2fSPeter Crosthwaite #define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ 32*8ae57b2fSPeter Crosthwaite TYPE_CADENCE_UART) 33*8ae57b2fSPeter Crosthwaite 34*8ae57b2fSPeter Crosthwaite typedef struct { 35*8ae57b2fSPeter Crosthwaite /*< private >*/ 36*8ae57b2fSPeter Crosthwaite SysBusDevice parent_obj; 37*8ae57b2fSPeter Crosthwaite 38*8ae57b2fSPeter Crosthwaite /*< public >*/ 39*8ae57b2fSPeter Crosthwaite MemoryRegion iomem; 40*8ae57b2fSPeter Crosthwaite uint32_t r[CADENCE_UART_R_MAX]; 41*8ae57b2fSPeter Crosthwaite uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; 42*8ae57b2fSPeter Crosthwaite uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; 43*8ae57b2fSPeter Crosthwaite uint32_t rx_wpos; 44*8ae57b2fSPeter Crosthwaite uint32_t rx_count; 45*8ae57b2fSPeter Crosthwaite uint32_t tx_count; 46*8ae57b2fSPeter Crosthwaite uint64_t char_tx_time; 47*8ae57b2fSPeter Crosthwaite CharDriverState *chr; 48*8ae57b2fSPeter Crosthwaite qemu_irq irq; 49*8ae57b2fSPeter Crosthwaite QEMUTimer *fifo_trigger_handle; 50*8ae57b2fSPeter Crosthwaite } CadenceUARTState; 51*8ae57b2fSPeter Crosthwaite 52*8ae57b2fSPeter Crosthwaite #define CADENCE_UART_H 53*8ae57b2fSPeter Crosthwaite #endif 54