1cb9c377fSPaolo Bonzini #ifndef HW_FLASH_H 2175de524SMarkus Armbruster #define HW_FLASH_H 3cb9c377fSPaolo Bonzini 487ecb68bSpbrook /* NOR flash devices */ 5cfe5f011SAvi Kivity 6022c62cbSPaolo Bonzini #include "exec/memory.h" 7cfe5f011SAvi Kivity 888eeee0aSbalrog /* pflash_cfi01.c */ 916434065SMarkus Armbruster 10e7b62741SMarkus Armbruster #define TYPE_PFLASH_CFI01 "cfi.pflash01" 1181c7db72SMarkus Armbruster #define PFLASH_CFI01(obj) \ 1281c7db72SMarkus Armbruster OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) 1316434065SMarkus Armbruster 1416434065SMarkus Armbruster typedef struct PFlashCFI01 PFlashCFI01; 1516434065SMarkus Armbruster 1616434065SMarkus Armbruster PFlashCFI01 *pflash_cfi01_register(hwaddr base, 17940d5b13SMarkus Armbruster const char *name, 18a8170e5eSAvi Kivity hwaddr size, 194be74634SMarkus Armbruster BlockBackend *blk, 20ce14710fSMarkus Armbruster uint32_t sector_len, 2116434065SMarkus Armbruster int width, 2287ecb68bSpbrook uint16_t id0, uint16_t id1, 236725070dSbalrog uint16_t id2, uint16_t id3, 2401e0451aSAnthony Liguori int be); 25*e60cf765SPhilippe Mathieu-Daudé BlockBackend *pflash_cfi01_get_blk(PFlashCFI01 *fl); 2616434065SMarkus Armbruster MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); 2787ecb68bSpbrook 2816434065SMarkus Armbruster /* pflash_cfi02.c */ 2916434065SMarkus Armbruster 30e7b62741SMarkus Armbruster #define TYPE_PFLASH_CFI02 "cfi.pflash02" 3181c7db72SMarkus Armbruster #define PFLASH_CFI02(obj) \ 3281c7db72SMarkus Armbruster OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) 3316434065SMarkus Armbruster 3416434065SMarkus Armbruster typedef struct PFlashCFI02 PFlashCFI02; 3516434065SMarkus Armbruster 3616434065SMarkus Armbruster PFlashCFI02 *pflash_cfi02_register(hwaddr base, 37940d5b13SMarkus Armbruster const char *name, 3816434065SMarkus Armbruster hwaddr size, 3916434065SMarkus Armbruster BlockBackend *blk, 40ce14710fSMarkus Armbruster uint32_t sector_len, 4116434065SMarkus Armbruster int nb_mappings, 4216434065SMarkus Armbruster int width, 4316434065SMarkus Armbruster uint16_t id0, uint16_t id1, 4416434065SMarkus Armbruster uint16_t id2, uint16_t id3, 4516434065SMarkus Armbruster uint16_t unlock_addr0, 4616434065SMarkus Armbruster uint16_t unlock_addr1, 4716434065SMarkus Armbruster int be); 48cfe5f011SAvi Kivity 4987ecb68bSpbrook /* nand.c */ 504be74634SMarkus Armbruster DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id); 51d4220389SJuha Riihimäki void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale, 5251db57f7SJuan Quintela uint8_t ce, uint8_t wp, uint8_t gnd); 53d4220389SJuha Riihimäki void nand_getpins(DeviceState *dev, int *rb); 54d4220389SJuha Riihimäki void nand_setio(DeviceState *dev, uint32_t value); 55d4220389SJuha Riihimäki uint32_t nand_getio(DeviceState *dev); 56d4220389SJuha Riihimäki uint32_t nand_getbuswidth(DeviceState *dev); 5787ecb68bSpbrook 5887ecb68bSpbrook #define NAND_MFR_TOSHIBA 0x98 5987ecb68bSpbrook #define NAND_MFR_SAMSUNG 0xec 6087ecb68bSpbrook #define NAND_MFR_FUJITSU 0x04 6187ecb68bSpbrook #define NAND_MFR_NATIONAL 0x8f 6287ecb68bSpbrook #define NAND_MFR_RENESAS 0x07 6387ecb68bSpbrook #define NAND_MFR_STMICRO 0x20 6487ecb68bSpbrook #define NAND_MFR_HYNIX 0xad 6587ecb68bSpbrook #define NAND_MFR_MICRON 0x2c 6687ecb68bSpbrook 677e7c5e4cSbalrog /* onenand.c */ 68500954e3SJuha Riihimäki void *onenand_raw_otp(DeviceState *onenand_device); 697e7c5e4cSbalrog 7087ecb68bSpbrook /* ecc.c */ 71bc24a225SPaul Brook typedef struct { 7287ecb68bSpbrook uint8_t cp; /* Column parity */ 7387ecb68bSpbrook uint16_t lp[2]; /* Line parity */ 7487ecb68bSpbrook uint16_t count; 75bc24a225SPaul Brook } ECCState; 7687ecb68bSpbrook 77bc24a225SPaul Brook uint8_t ecc_digest(ECCState *s, uint8_t sample); 78bc24a225SPaul Brook void ecc_reset(ECCState *s); 7934f9f0b5SDmitry Eremin-Solenikov extern VMStateDescription vmstate_ecc_state; 80cb9c377fSPaolo Bonzini 81cb9c377fSPaolo Bonzini #endif 82