1cb9c377fSPaolo Bonzini #ifndef HW_FLASH_H 2175de524SMarkus Armbruster #define HW_FLASH_H 3cb9c377fSPaolo Bonzini 487ecb68bSpbrook /* NOR flash devices */ 5cfe5f011SAvi Kivity 6022c62cbSPaolo Bonzini #include "exec/memory.h" 7cfe5f011SAvi Kivity 888eeee0aSbalrog /* pflash_cfi01.c */ 9*16434065SMarkus Armbruster 10*16434065SMarkus Armbruster #define TYPE_CFI_PFLASH01 "cfi.pflash01" 11*16434065SMarkus Armbruster 12*16434065SMarkus Armbruster typedef struct PFlashCFI01 PFlashCFI01; 13*16434065SMarkus Armbruster 14*16434065SMarkus Armbruster PFlashCFI01 *pflash_cfi01_register(hwaddr base, 15cfe5f011SAvi Kivity DeviceState *qdev, const char *name, 16a8170e5eSAvi Kivity hwaddr size, 174be74634SMarkus Armbruster BlockBackend *blk, 18*16434065SMarkus Armbruster uint32_t sector_len, int nb_blocs, 19*16434065SMarkus Armbruster int width, 2087ecb68bSpbrook uint16_t id0, uint16_t id1, 216725070dSbalrog uint16_t id2, uint16_t id3, 2201e0451aSAnthony Liguori int be); 23*16434065SMarkus Armbruster MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); 2487ecb68bSpbrook 25*16434065SMarkus Armbruster /* pflash_cfi02.c */ 26*16434065SMarkus Armbruster 27*16434065SMarkus Armbruster #define TYPE_CFI_PFLASH02 "cfi.pflash02" 28*16434065SMarkus Armbruster 29*16434065SMarkus Armbruster typedef struct PFlashCFI02 PFlashCFI02; 30*16434065SMarkus Armbruster 31*16434065SMarkus Armbruster PFlashCFI02 *pflash_cfi02_register(hwaddr base, 32*16434065SMarkus Armbruster DeviceState *qdev, const char *name, 33*16434065SMarkus Armbruster hwaddr size, 34*16434065SMarkus Armbruster BlockBackend *blk, 35*16434065SMarkus Armbruster uint32_t sector_len, int nb_blocs, 36*16434065SMarkus Armbruster int nb_mappings, 37*16434065SMarkus Armbruster int width, 38*16434065SMarkus Armbruster uint16_t id0, uint16_t id1, 39*16434065SMarkus Armbruster uint16_t id2, uint16_t id3, 40*16434065SMarkus Armbruster uint16_t unlock_addr0, 41*16434065SMarkus Armbruster uint16_t unlock_addr1, 42*16434065SMarkus Armbruster int be); 43cfe5f011SAvi Kivity 4487ecb68bSpbrook /* nand.c */ 454be74634SMarkus Armbruster DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id); 46d4220389SJuha Riihimäki void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale, 4751db57f7SJuan Quintela uint8_t ce, uint8_t wp, uint8_t gnd); 48d4220389SJuha Riihimäki void nand_getpins(DeviceState *dev, int *rb); 49d4220389SJuha Riihimäki void nand_setio(DeviceState *dev, uint32_t value); 50d4220389SJuha Riihimäki uint32_t nand_getio(DeviceState *dev); 51d4220389SJuha Riihimäki uint32_t nand_getbuswidth(DeviceState *dev); 5287ecb68bSpbrook 5387ecb68bSpbrook #define NAND_MFR_TOSHIBA 0x98 5487ecb68bSpbrook #define NAND_MFR_SAMSUNG 0xec 5587ecb68bSpbrook #define NAND_MFR_FUJITSU 0x04 5687ecb68bSpbrook #define NAND_MFR_NATIONAL 0x8f 5787ecb68bSpbrook #define NAND_MFR_RENESAS 0x07 5887ecb68bSpbrook #define NAND_MFR_STMICRO 0x20 5987ecb68bSpbrook #define NAND_MFR_HYNIX 0xad 6087ecb68bSpbrook #define NAND_MFR_MICRON 0x2c 6187ecb68bSpbrook 627e7c5e4cSbalrog /* onenand.c */ 63500954e3SJuha Riihimäki void *onenand_raw_otp(DeviceState *onenand_device); 647e7c5e4cSbalrog 6587ecb68bSpbrook /* ecc.c */ 66bc24a225SPaul Brook typedef struct { 6787ecb68bSpbrook uint8_t cp; /* Column parity */ 6887ecb68bSpbrook uint16_t lp[2]; /* Line parity */ 6987ecb68bSpbrook uint16_t count; 70bc24a225SPaul Brook } ECCState; 7187ecb68bSpbrook 72bc24a225SPaul Brook uint8_t ecc_digest(ECCState *s, uint8_t sample); 73bc24a225SPaul Brook void ecc_reset(ECCState *s); 7434f9f0b5SDmitry Eremin-Solenikov extern VMStateDescription vmstate_ecc_state; 75cb9c377fSPaolo Bonzini 76cb9c377fSPaolo Bonzini #endif 77