xref: /qemu/include/hw/arm/smmuv3.h (revision 32cfd7f39e0811036efd3a7a12d0f975ef57fdb3)
110a83cb9SPrem Mallappa /*
210a83cb9SPrem Mallappa  * Copyright (C) 2014-2016 Broadcom Corporation
310a83cb9SPrem Mallappa  * Copyright (c) 2017 Red Hat, Inc.
410a83cb9SPrem Mallappa  * Written by Prem Mallappa, Eric Auger
510a83cb9SPrem Mallappa  *
610a83cb9SPrem Mallappa  * This program is free software; you can redistribute it and/or modify
710a83cb9SPrem Mallappa  * it under the terms of the GNU General Public License version 2 as
810a83cb9SPrem Mallappa  * published by the Free Software Foundation.
910a83cb9SPrem Mallappa  *
1010a83cb9SPrem Mallappa  * This program is distributed in the hope that it will be useful,
1110a83cb9SPrem Mallappa  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1210a83cb9SPrem Mallappa  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1310a83cb9SPrem Mallappa  * GNU General Public License for more details.
1410a83cb9SPrem Mallappa  *
1510a83cb9SPrem Mallappa  * You should have received a copy of the GNU General Public License along
1610a83cb9SPrem Mallappa  * with this program; if not, see <http://www.gnu.org/licenses/>.
1710a83cb9SPrem Mallappa  */
1810a83cb9SPrem Mallappa 
1910a83cb9SPrem Mallappa #ifndef HW_ARM_SMMUV3_H
2010a83cb9SPrem Mallappa #define HW_ARM_SMMUV3_H
2110a83cb9SPrem Mallappa 
2210a83cb9SPrem Mallappa #include "hw/arm/smmu-common.h"
2310a83cb9SPrem Mallappa #include "hw/registerfields.h"
2410a83cb9SPrem Mallappa 
2510a83cb9SPrem Mallappa #define TYPE_SMMUV3_IOMMU_MEMORY_REGION "smmuv3-iommu-memory-region"
2610a83cb9SPrem Mallappa 
2710a83cb9SPrem Mallappa typedef struct SMMUQueue {
2810a83cb9SPrem Mallappa      uint64_t base; /* base register */
2910a83cb9SPrem Mallappa      uint32_t prod;
3010a83cb9SPrem Mallappa      uint32_t cons;
3110a83cb9SPrem Mallappa      uint8_t entry_size;
3210a83cb9SPrem Mallappa      uint8_t log2size;
3310a83cb9SPrem Mallappa } SMMUQueue;
3410a83cb9SPrem Mallappa 
3510a83cb9SPrem Mallappa typedef struct SMMUv3State {
3610a83cb9SPrem Mallappa     SMMUState     smmu_state;
3710a83cb9SPrem Mallappa 
3810a83cb9SPrem Mallappa     uint32_t features;
3910a83cb9SPrem Mallappa     uint8_t sid_size;
4010a83cb9SPrem Mallappa     uint8_t sid_split;
4110a83cb9SPrem Mallappa 
4210a83cb9SPrem Mallappa     uint32_t idr[6];
4310a83cb9SPrem Mallappa     uint32_t iidr;
4410a83cb9SPrem Mallappa     uint32_t cr[3];
4510a83cb9SPrem Mallappa     uint32_t cr0ack;
4610a83cb9SPrem Mallappa     uint32_t statusr;
4710a83cb9SPrem Mallappa     uint32_t irq_ctrl;
4810a83cb9SPrem Mallappa     uint32_t gerror;
4910a83cb9SPrem Mallappa     uint32_t gerrorn;
5010a83cb9SPrem Mallappa     uint64_t gerror_irq_cfg0;
5110a83cb9SPrem Mallappa     uint32_t gerror_irq_cfg1;
5210a83cb9SPrem Mallappa     uint32_t gerror_irq_cfg2;
5310a83cb9SPrem Mallappa     uint64_t strtab_base;
5410a83cb9SPrem Mallappa     uint32_t strtab_base_cfg;
5510a83cb9SPrem Mallappa     uint64_t eventq_irq_cfg0;
5610a83cb9SPrem Mallappa     uint32_t eventq_irq_cfg1;
5710a83cb9SPrem Mallappa     uint32_t eventq_irq_cfg2;
5810a83cb9SPrem Mallappa 
5910a83cb9SPrem Mallappa     SMMUQueue eventq, cmdq;
6010a83cb9SPrem Mallappa 
6110a83cb9SPrem Mallappa     qemu_irq     irq[4];
62*32cfd7f3SEric Auger     QemuMutex mutex;
6310a83cb9SPrem Mallappa } SMMUv3State;
6410a83cb9SPrem Mallappa 
6510a83cb9SPrem Mallappa typedef enum {
6610a83cb9SPrem Mallappa     SMMU_IRQ_EVTQ,
6710a83cb9SPrem Mallappa     SMMU_IRQ_PRIQ,
6810a83cb9SPrem Mallappa     SMMU_IRQ_CMD_SYNC,
6910a83cb9SPrem Mallappa     SMMU_IRQ_GERROR,
7010a83cb9SPrem Mallappa } SMMUIrq;
7110a83cb9SPrem Mallappa 
7210a83cb9SPrem Mallappa typedef struct {
7310a83cb9SPrem Mallappa     /*< private >*/
7410a83cb9SPrem Mallappa     SMMUBaseClass smmu_base_class;
7510a83cb9SPrem Mallappa     /*< public >*/
7610a83cb9SPrem Mallappa 
7710a83cb9SPrem Mallappa     DeviceRealize parent_realize;
7810a83cb9SPrem Mallappa     DeviceReset   parent_reset;
7910a83cb9SPrem Mallappa } SMMUv3Class;
8010a83cb9SPrem Mallappa 
8110a83cb9SPrem Mallappa #define TYPE_ARM_SMMUV3   "arm-smmuv3"
8210a83cb9SPrem Mallappa #define ARM_SMMUV3(obj) OBJECT_CHECK(SMMUv3State, (obj), TYPE_ARM_SMMUV3)
8310a83cb9SPrem Mallappa #define ARM_SMMUV3_CLASS(klass)                              \
8410a83cb9SPrem Mallappa     OBJECT_CLASS_CHECK(SMMUv3Class, (klass), TYPE_ARM_SMMUV3)
8510a83cb9SPrem Mallappa #define ARM_SMMUV3_GET_CLASS(obj) \
8610a83cb9SPrem Mallappa      OBJECT_GET_CLASS(SMMUv3Class, (obj), TYPE_ARM_SMMUV3)
8710a83cb9SPrem Mallappa 
8810a83cb9SPrem Mallappa #endif
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