1 /* 2 * i.MX 8M Plus SoC Definitions 3 * 4 * Copyright (c) 2024, Bernhard Beschow <shentey@gmail.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 9 #ifndef FSL_IMX8MP_H 10 #define FSL_IMX8MP_H 11 12 #include "cpu.h" 13 #include "hw/char/imx_serial.h" 14 #include "hw/gpio/imx_gpio.h" 15 #include "hw/i2c/imx_i2c.h" 16 #include "hw/intc/arm_gicv3_common.h" 17 #include "hw/misc/imx7_snvs.h" 18 #include "hw/misc/imx8mp_analog.h" 19 #include "hw/misc/imx8mp_ccm.h" 20 #include "hw/pci-host/designware.h" 21 #include "hw/pci-host/fsl_imx8m_phy.h" 22 #include "hw/sd/sdhci.h" 23 #include "qom/object.h" 24 #include "qemu/units.h" 25 26 #define TYPE_FSL_IMX8MP "fsl-imx8mp" 27 OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mpState, FSL_IMX8MP) 28 29 #define FSL_IMX8MP_RAM_START 0x40000000 30 #define FSL_IMX8MP_RAM_SIZE_MAX (8 * GiB) 31 32 enum FslImx8mpConfiguration { 33 FSL_IMX8MP_NUM_CPUS = 4, 34 FSL_IMX8MP_NUM_GPIOS = 5, 35 FSL_IMX8MP_NUM_I2CS = 6, 36 FSL_IMX8MP_NUM_IRQS = 160, 37 FSL_IMX8MP_NUM_UARTS = 4, 38 FSL_IMX8MP_NUM_USDHCS = 3, 39 }; 40 41 struct FslImx8mpState { 42 DeviceState parent_obj; 43 44 ARMCPU cpu[FSL_IMX8MP_NUM_CPUS]; 45 GICv3State gic; 46 IMXGPIOState gpio[FSL_IMX8MP_NUM_GPIOS]; 47 IMX8MPCCMState ccm; 48 IMX8MPAnalogState analog; 49 IMX7SNVSState snvs; 50 IMXI2CState i2c[FSL_IMX8MP_NUM_I2CS]; 51 IMXSerialState uart[FSL_IMX8MP_NUM_UARTS]; 52 SDHCIState usdhc[FSL_IMX8MP_NUM_USDHCS]; 53 DesignwarePCIEHost pcie; 54 FslImx8mPciePhyState pcie_phy; 55 }; 56 57 enum FslImx8mpMemoryRegions { 58 FSL_IMX8MP_A53_DAP, 59 FSL_IMX8MP_AIPS1_CONFIGURATION, 60 FSL_IMX8MP_AIPS2_CONFIGURATION, 61 FSL_IMX8MP_AIPS3_CONFIGURATION, 62 FSL_IMX8MP_AIPS4_CONFIGURATION, 63 FSL_IMX8MP_AIPS5_CONFIGURATION, 64 FSL_IMX8MP_ANA_OSC, 65 FSL_IMX8MP_ANA_PLL, 66 FSL_IMX8MP_ANA_TSENSOR, 67 FSL_IMX8MP_APBH_DMA, 68 FSL_IMX8MP_ASRC, 69 FSL_IMX8MP_AUDIO_BLK_CTRL, 70 FSL_IMX8MP_AUDIO_DSP, 71 FSL_IMX8MP_AUDIO_XCVR_RX, 72 FSL_IMX8MP_AUD_IRQ_STEER, 73 FSL_IMX8MP_BOOT_ROM, 74 FSL_IMX8MP_BOOT_ROM_PROTECTED, 75 FSL_IMX8MP_CAAM, 76 FSL_IMX8MP_CAAM_MEM, 77 FSL_IMX8MP_CCM, 78 FSL_IMX8MP_CSU, 79 FSL_IMX8MP_DDR_BLK_CTRL, 80 FSL_IMX8MP_DDR_CTL, 81 FSL_IMX8MP_DDR_PERF_MON, 82 FSL_IMX8MP_DDR_PHY, 83 FSL_IMX8MP_DDR_PHY_BROADCAST, 84 FSL_IMX8MP_ECSPI1, 85 FSL_IMX8MP_ECSPI2, 86 FSL_IMX8MP_ECSPI3, 87 FSL_IMX8MP_EDMA_CHANNELS, 88 FSL_IMX8MP_EDMA_MANAGEMENT_PAGE, 89 FSL_IMX8MP_ENET1, 90 FSL_IMX8MP_ENET2_TSN, 91 FSL_IMX8MP_FLEXCAN1, 92 FSL_IMX8MP_FLEXCAN2, 93 FSL_IMX8MP_GIC_DIST, 94 FSL_IMX8MP_GIC_REDIST, 95 FSL_IMX8MP_GPC, 96 FSL_IMX8MP_GPIO1, 97 FSL_IMX8MP_GPIO2, 98 FSL_IMX8MP_GPIO3, 99 FSL_IMX8MP_GPIO4, 100 FSL_IMX8MP_GPIO5, 101 FSL_IMX8MP_GPT1, 102 FSL_IMX8MP_GPT2, 103 FSL_IMX8MP_GPT3, 104 FSL_IMX8MP_GPT4, 105 FSL_IMX8MP_GPT5, 106 FSL_IMX8MP_GPT6, 107 FSL_IMX8MP_GPU2D, 108 FSL_IMX8MP_GPU3D, 109 FSL_IMX8MP_HDMI_TX, 110 FSL_IMX8MP_HDMI_TX_AUDLNK_MSTR, 111 FSL_IMX8MP_HSIO_BLK_CTL, 112 FSL_IMX8MP_I2C1, 113 FSL_IMX8MP_I2C2, 114 FSL_IMX8MP_I2C3, 115 FSL_IMX8MP_I2C4, 116 FSL_IMX8MP_I2C5, 117 FSL_IMX8MP_I2C6, 118 FSL_IMX8MP_INTERCONNECT, 119 FSL_IMX8MP_IOMUXC, 120 FSL_IMX8MP_IOMUXC_GPR, 121 FSL_IMX8MP_IPS_DEWARP, 122 FSL_IMX8MP_ISI, 123 FSL_IMX8MP_ISP1, 124 FSL_IMX8MP_ISP2, 125 FSL_IMX8MP_LCDIF1, 126 FSL_IMX8MP_LCDIF2, 127 FSL_IMX8MP_MEDIA_BLK_CTL, 128 FSL_IMX8MP_MIPI_CSI1, 129 FSL_IMX8MP_MIPI_CSI2, 130 FSL_IMX8MP_MIPI_DSI1, 131 FSL_IMX8MP_MU_1_A, 132 FSL_IMX8MP_MU_1_B, 133 FSL_IMX8MP_MU_2_A, 134 FSL_IMX8MP_MU_2_B, 135 FSL_IMX8MP_MU_3_A, 136 FSL_IMX8MP_MU_3_B, 137 FSL_IMX8MP_NPU, 138 FSL_IMX8MP_OCOTP_CTRL, 139 FSL_IMX8MP_OCRAM, 140 FSL_IMX8MP_OCRAM_S, 141 FSL_IMX8MP_PCIE1, 142 FSL_IMX8MP_PCIE1_MEM, 143 FSL_IMX8MP_PCIE_PHY1, 144 FSL_IMX8MP_PDM, 145 FSL_IMX8MP_PERFMON1, 146 FSL_IMX8MP_PERFMON2, 147 FSL_IMX8MP_PWM1, 148 FSL_IMX8MP_PWM2, 149 FSL_IMX8MP_PWM3, 150 FSL_IMX8MP_PWM4, 151 FSL_IMX8MP_QOSC, 152 FSL_IMX8MP_QSPI, 153 FSL_IMX8MP_QSPI1_RX_BUFFER, 154 FSL_IMX8MP_QSPI1_TX_BUFFER, 155 FSL_IMX8MP_QSPI_MEM, 156 FSL_IMX8MP_RAM, 157 FSL_IMX8MP_RDC, 158 FSL_IMX8MP_SAI1, 159 FSL_IMX8MP_SAI2, 160 FSL_IMX8MP_SAI3, 161 FSL_IMX8MP_SAI5, 162 FSL_IMX8MP_SAI6, 163 FSL_IMX8MP_SAI7, 164 FSL_IMX8MP_SDMA1, 165 FSL_IMX8MP_SDMA2, 166 FSL_IMX8MP_SDMA3, 167 FSL_IMX8MP_SEMAPHORE1, 168 FSL_IMX8MP_SEMAPHORE2, 169 FSL_IMX8MP_SEMAPHORE_HS, 170 FSL_IMX8MP_SNVS_HP, 171 FSL_IMX8MP_SPBA1, 172 FSL_IMX8MP_SPBA2, 173 FSL_IMX8MP_SRC, 174 FSL_IMX8MP_SYSCNT_CMP, 175 FSL_IMX8MP_SYSCNT_CTRL, 176 FSL_IMX8MP_SYSCNT_RD, 177 FSL_IMX8MP_TCM_DTCM, 178 FSL_IMX8MP_TCM_ITCM, 179 FSL_IMX8MP_TZASC, 180 FSL_IMX8MP_UART1, 181 FSL_IMX8MP_UART2, 182 FSL_IMX8MP_UART3, 183 FSL_IMX8MP_UART4, 184 FSL_IMX8MP_USB1, 185 FSL_IMX8MP_USB2, 186 FSL_IMX8MP_USDHC1, 187 FSL_IMX8MP_USDHC2, 188 FSL_IMX8MP_USDHC3, 189 FSL_IMX8MP_VPU, 190 FSL_IMX8MP_VPU_BLK_CTRL, 191 FSL_IMX8MP_VPU_G1_DECODER, 192 FSL_IMX8MP_VPU_G2_DECODER, 193 FSL_IMX8MP_VPU_VC8000E_ENCODER, 194 FSL_IMX8MP_WDOG1, 195 FSL_IMX8MP_WDOG2, 196 FSL_IMX8MP_WDOG3, 197 }; 198 199 enum FslImx8mpIrqs { 200 FSL_IMX8MP_USDHC1_IRQ = 22, 201 FSL_IMX8MP_USDHC2_IRQ = 23, 202 FSL_IMX8MP_USDHC3_IRQ = 24, 203 204 FSL_IMX8MP_UART1_IRQ = 26, 205 FSL_IMX8MP_UART2_IRQ = 27, 206 FSL_IMX8MP_UART3_IRQ = 28, 207 FSL_IMX8MP_UART4_IRQ = 29, 208 FSL_IMX8MP_UART5_IRQ = 30, 209 FSL_IMX8MP_UART6_IRQ = 16, 210 211 FSL_IMX8MP_I2C1_IRQ = 35, 212 FSL_IMX8MP_I2C2_IRQ = 36, 213 FSL_IMX8MP_I2C3_IRQ = 37, 214 FSL_IMX8MP_I2C4_IRQ = 38, 215 216 FSL_IMX8MP_GPIO1_LOW_IRQ = 64, 217 FSL_IMX8MP_GPIO1_HIGH_IRQ = 65, 218 FSL_IMX8MP_GPIO2_LOW_IRQ = 66, 219 FSL_IMX8MP_GPIO2_HIGH_IRQ = 67, 220 FSL_IMX8MP_GPIO3_LOW_IRQ = 68, 221 FSL_IMX8MP_GPIO3_HIGH_IRQ = 69, 222 FSL_IMX8MP_GPIO4_LOW_IRQ = 70, 223 FSL_IMX8MP_GPIO4_HIGH_IRQ = 71, 224 FSL_IMX8MP_GPIO5_LOW_IRQ = 72, 225 FSL_IMX8MP_GPIO5_HIGH_IRQ = 73, 226 227 FSL_IMX8MP_I2C5_IRQ = 76, 228 FSL_IMX8MP_I2C6_IRQ = 77, 229 230 FSL_IMX8MP_PCI_INTA_IRQ = 126, 231 FSL_IMX8MP_PCI_INTB_IRQ = 125, 232 FSL_IMX8MP_PCI_INTC_IRQ = 124, 233 FSL_IMX8MP_PCI_INTD_IRQ = 123, 234 FSL_IMX8MP_PCI_MSI_IRQ = 140, 235 }; 236 237 #endif /* FSL_IMX8MP_H */ 238