1 /* 2 * i.MX 8M Plus SoC Definitions 3 * 4 * Copyright (c) 2024, Bernhard Beschow <shentey@gmail.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 9 #ifndef FSL_IMX8MP_H 10 #define FSL_IMX8MP_H 11 12 #include "cpu.h" 13 #include "hw/char/imx_serial.h" 14 #include "hw/gpio/imx_gpio.h" 15 #include "hw/i2c/imx_i2c.h" 16 #include "hw/intc/arm_gicv3_common.h" 17 #include "hw/misc/imx7_snvs.h" 18 #include "hw/misc/imx8mp_analog.h" 19 #include "hw/misc/imx8mp_ccm.h" 20 #include "hw/pci-host/designware.h" 21 #include "hw/pci-host/fsl_imx8m_phy.h" 22 #include "hw/sd/sdhci.h" 23 #include "hw/ssi/imx_spi.h" 24 #include "qom/object.h" 25 #include "qemu/units.h" 26 27 #define TYPE_FSL_IMX8MP "fsl-imx8mp" 28 OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mpState, FSL_IMX8MP) 29 30 #define FSL_IMX8MP_RAM_START 0x40000000 31 #define FSL_IMX8MP_RAM_SIZE_MAX (8 * GiB) 32 33 enum FslImx8mpConfiguration { 34 FSL_IMX8MP_NUM_CPUS = 4, 35 FSL_IMX8MP_NUM_ECSPIS = 3, 36 FSL_IMX8MP_NUM_GPIOS = 5, 37 FSL_IMX8MP_NUM_I2CS = 6, 38 FSL_IMX8MP_NUM_IRQS = 160, 39 FSL_IMX8MP_NUM_UARTS = 4, 40 FSL_IMX8MP_NUM_USDHCS = 3, 41 }; 42 43 struct FslImx8mpState { 44 DeviceState parent_obj; 45 46 ARMCPU cpu[FSL_IMX8MP_NUM_CPUS]; 47 GICv3State gic; 48 IMXGPIOState gpio[FSL_IMX8MP_NUM_GPIOS]; 49 IMX8MPCCMState ccm; 50 IMX8MPAnalogState analog; 51 IMX7SNVSState snvs; 52 IMXSPIState spi[FSL_IMX8MP_NUM_ECSPIS]; 53 IMXI2CState i2c[FSL_IMX8MP_NUM_I2CS]; 54 IMXSerialState uart[FSL_IMX8MP_NUM_UARTS]; 55 SDHCIState usdhc[FSL_IMX8MP_NUM_USDHCS]; 56 DesignwarePCIEHost pcie; 57 FslImx8mPciePhyState pcie_phy; 58 }; 59 60 enum FslImx8mpMemoryRegions { 61 FSL_IMX8MP_A53_DAP, 62 FSL_IMX8MP_AIPS1_CONFIGURATION, 63 FSL_IMX8MP_AIPS2_CONFIGURATION, 64 FSL_IMX8MP_AIPS3_CONFIGURATION, 65 FSL_IMX8MP_AIPS4_CONFIGURATION, 66 FSL_IMX8MP_AIPS5_CONFIGURATION, 67 FSL_IMX8MP_ANA_OSC, 68 FSL_IMX8MP_ANA_PLL, 69 FSL_IMX8MP_ANA_TSENSOR, 70 FSL_IMX8MP_APBH_DMA, 71 FSL_IMX8MP_ASRC, 72 FSL_IMX8MP_AUDIO_BLK_CTRL, 73 FSL_IMX8MP_AUDIO_DSP, 74 FSL_IMX8MP_AUDIO_XCVR_RX, 75 FSL_IMX8MP_AUD_IRQ_STEER, 76 FSL_IMX8MP_BOOT_ROM, 77 FSL_IMX8MP_BOOT_ROM_PROTECTED, 78 FSL_IMX8MP_CAAM, 79 FSL_IMX8MP_CAAM_MEM, 80 FSL_IMX8MP_CCM, 81 FSL_IMX8MP_CSU, 82 FSL_IMX8MP_DDR_BLK_CTRL, 83 FSL_IMX8MP_DDR_CTL, 84 FSL_IMX8MP_DDR_PERF_MON, 85 FSL_IMX8MP_DDR_PHY, 86 FSL_IMX8MP_DDR_PHY_BROADCAST, 87 FSL_IMX8MP_ECSPI1, 88 FSL_IMX8MP_ECSPI2, 89 FSL_IMX8MP_ECSPI3, 90 FSL_IMX8MP_EDMA_CHANNELS, 91 FSL_IMX8MP_EDMA_MANAGEMENT_PAGE, 92 FSL_IMX8MP_ENET1, 93 FSL_IMX8MP_ENET2_TSN, 94 FSL_IMX8MP_FLEXCAN1, 95 FSL_IMX8MP_FLEXCAN2, 96 FSL_IMX8MP_GIC_DIST, 97 FSL_IMX8MP_GIC_REDIST, 98 FSL_IMX8MP_GPC, 99 FSL_IMX8MP_GPIO1, 100 FSL_IMX8MP_GPIO2, 101 FSL_IMX8MP_GPIO3, 102 FSL_IMX8MP_GPIO4, 103 FSL_IMX8MP_GPIO5, 104 FSL_IMX8MP_GPT1, 105 FSL_IMX8MP_GPT2, 106 FSL_IMX8MP_GPT3, 107 FSL_IMX8MP_GPT4, 108 FSL_IMX8MP_GPT5, 109 FSL_IMX8MP_GPT6, 110 FSL_IMX8MP_GPU2D, 111 FSL_IMX8MP_GPU3D, 112 FSL_IMX8MP_HDMI_TX, 113 FSL_IMX8MP_HDMI_TX_AUDLNK_MSTR, 114 FSL_IMX8MP_HSIO_BLK_CTL, 115 FSL_IMX8MP_I2C1, 116 FSL_IMX8MP_I2C2, 117 FSL_IMX8MP_I2C3, 118 FSL_IMX8MP_I2C4, 119 FSL_IMX8MP_I2C5, 120 FSL_IMX8MP_I2C6, 121 FSL_IMX8MP_INTERCONNECT, 122 FSL_IMX8MP_IOMUXC, 123 FSL_IMX8MP_IOMUXC_GPR, 124 FSL_IMX8MP_IPS_DEWARP, 125 FSL_IMX8MP_ISI, 126 FSL_IMX8MP_ISP1, 127 FSL_IMX8MP_ISP2, 128 FSL_IMX8MP_LCDIF1, 129 FSL_IMX8MP_LCDIF2, 130 FSL_IMX8MP_MEDIA_BLK_CTL, 131 FSL_IMX8MP_MIPI_CSI1, 132 FSL_IMX8MP_MIPI_CSI2, 133 FSL_IMX8MP_MIPI_DSI1, 134 FSL_IMX8MP_MU_1_A, 135 FSL_IMX8MP_MU_1_B, 136 FSL_IMX8MP_MU_2_A, 137 FSL_IMX8MP_MU_2_B, 138 FSL_IMX8MP_MU_3_A, 139 FSL_IMX8MP_MU_3_B, 140 FSL_IMX8MP_NPU, 141 FSL_IMX8MP_OCOTP_CTRL, 142 FSL_IMX8MP_OCRAM, 143 FSL_IMX8MP_OCRAM_S, 144 FSL_IMX8MP_PCIE1, 145 FSL_IMX8MP_PCIE1_MEM, 146 FSL_IMX8MP_PCIE_PHY1, 147 FSL_IMX8MP_PDM, 148 FSL_IMX8MP_PERFMON1, 149 FSL_IMX8MP_PERFMON2, 150 FSL_IMX8MP_PWM1, 151 FSL_IMX8MP_PWM2, 152 FSL_IMX8MP_PWM3, 153 FSL_IMX8MP_PWM4, 154 FSL_IMX8MP_QOSC, 155 FSL_IMX8MP_QSPI, 156 FSL_IMX8MP_QSPI1_RX_BUFFER, 157 FSL_IMX8MP_QSPI1_TX_BUFFER, 158 FSL_IMX8MP_QSPI_MEM, 159 FSL_IMX8MP_RAM, 160 FSL_IMX8MP_RDC, 161 FSL_IMX8MP_SAI1, 162 FSL_IMX8MP_SAI2, 163 FSL_IMX8MP_SAI3, 164 FSL_IMX8MP_SAI5, 165 FSL_IMX8MP_SAI6, 166 FSL_IMX8MP_SAI7, 167 FSL_IMX8MP_SDMA1, 168 FSL_IMX8MP_SDMA2, 169 FSL_IMX8MP_SDMA3, 170 FSL_IMX8MP_SEMAPHORE1, 171 FSL_IMX8MP_SEMAPHORE2, 172 FSL_IMX8MP_SEMAPHORE_HS, 173 FSL_IMX8MP_SNVS_HP, 174 FSL_IMX8MP_SPBA1, 175 FSL_IMX8MP_SPBA2, 176 FSL_IMX8MP_SRC, 177 FSL_IMX8MP_SYSCNT_CMP, 178 FSL_IMX8MP_SYSCNT_CTRL, 179 FSL_IMX8MP_SYSCNT_RD, 180 FSL_IMX8MP_TCM_DTCM, 181 FSL_IMX8MP_TCM_ITCM, 182 FSL_IMX8MP_TZASC, 183 FSL_IMX8MP_UART1, 184 FSL_IMX8MP_UART2, 185 FSL_IMX8MP_UART3, 186 FSL_IMX8MP_UART4, 187 FSL_IMX8MP_USB1, 188 FSL_IMX8MP_USB2, 189 FSL_IMX8MP_USDHC1, 190 FSL_IMX8MP_USDHC2, 191 FSL_IMX8MP_USDHC3, 192 FSL_IMX8MP_VPU, 193 FSL_IMX8MP_VPU_BLK_CTRL, 194 FSL_IMX8MP_VPU_G1_DECODER, 195 FSL_IMX8MP_VPU_G2_DECODER, 196 FSL_IMX8MP_VPU_VC8000E_ENCODER, 197 FSL_IMX8MP_WDOG1, 198 FSL_IMX8MP_WDOG2, 199 FSL_IMX8MP_WDOG3, 200 }; 201 202 enum FslImx8mpIrqs { 203 FSL_IMX8MP_USDHC1_IRQ = 22, 204 FSL_IMX8MP_USDHC2_IRQ = 23, 205 FSL_IMX8MP_USDHC3_IRQ = 24, 206 207 FSL_IMX8MP_UART1_IRQ = 26, 208 FSL_IMX8MP_UART2_IRQ = 27, 209 FSL_IMX8MP_UART3_IRQ = 28, 210 FSL_IMX8MP_UART4_IRQ = 29, 211 FSL_IMX8MP_UART5_IRQ = 30, 212 FSL_IMX8MP_UART6_IRQ = 16, 213 214 FSL_IMX8MP_ECSPI1_IRQ = 31, 215 FSL_IMX8MP_ECSPI2_IRQ = 32, 216 FSL_IMX8MP_ECSPI3_IRQ = 33, 217 FSL_IMX8MP_ECSPI4_IRQ = 34, 218 219 FSL_IMX8MP_I2C1_IRQ = 35, 220 FSL_IMX8MP_I2C2_IRQ = 36, 221 FSL_IMX8MP_I2C3_IRQ = 37, 222 FSL_IMX8MP_I2C4_IRQ = 38, 223 224 FSL_IMX8MP_GPIO1_LOW_IRQ = 64, 225 FSL_IMX8MP_GPIO1_HIGH_IRQ = 65, 226 FSL_IMX8MP_GPIO2_LOW_IRQ = 66, 227 FSL_IMX8MP_GPIO2_HIGH_IRQ = 67, 228 FSL_IMX8MP_GPIO3_LOW_IRQ = 68, 229 FSL_IMX8MP_GPIO3_HIGH_IRQ = 69, 230 FSL_IMX8MP_GPIO4_LOW_IRQ = 70, 231 FSL_IMX8MP_GPIO4_HIGH_IRQ = 71, 232 FSL_IMX8MP_GPIO5_LOW_IRQ = 72, 233 FSL_IMX8MP_GPIO5_HIGH_IRQ = 73, 234 235 FSL_IMX8MP_I2C5_IRQ = 76, 236 FSL_IMX8MP_I2C6_IRQ = 77, 237 238 FSL_IMX8MP_PCI_INTA_IRQ = 126, 239 FSL_IMX8MP_PCI_INTB_IRQ = 125, 240 FSL_IMX8MP_PCI_INTC_IRQ = 124, 241 FSL_IMX8MP_PCI_INTD_IRQ = 123, 242 FSL_IMX8MP_PCI_MSI_IRQ = 140, 243 }; 244 245 #endif /* FSL_IMX8MP_H */ 246