143e3346eSAndrew Jeffery /* 2ff90606fSCédric Le Goater * ASPEED SoC family 343e3346eSAndrew Jeffery * 443e3346eSAndrew Jeffery * Andrew Jeffery <andrew@aj.id.au> 543e3346eSAndrew Jeffery * 643e3346eSAndrew Jeffery * Copyright 2016 IBM Corp. 743e3346eSAndrew Jeffery * 843e3346eSAndrew Jeffery * This code is licensed under the GPL version 2 or later. See 943e3346eSAndrew Jeffery * the COPYING file in the top-level directory. 1043e3346eSAndrew Jeffery */ 1143e3346eSAndrew Jeffery 12ff90606fSCédric Le Goater #ifndef ASPEED_SOC_H 13ff90606fSCédric Le Goater #define ASPEED_SOC_H 1443e3346eSAndrew Jeffery 1543e3346eSAndrew Jeffery #include "hw/arm/arm.h" 1643e3346eSAndrew Jeffery #include "hw/intc/aspeed_vic.h" 17334973bbSAndrew Jeffery #include "hw/misc/aspeed_scu.h" 18c2da8a8bSCédric Le Goater #include "hw/misc/aspeed_sdmc.h" 1943e3346eSAndrew Jeffery #include "hw/timer/aspeed_timer.h" 2016020011SCédric Le Goater #include "hw/i2c/aspeed_i2c.h" 217c1c69bcSCédric Le Goater #include "hw/ssi/aspeed_smc.h" 22013befe1SCédric Le Goater #include "hw/watchdog/wdt_aspeed.h" 23*ea337c65SCédric Le Goater #include "hw/net/ftgmac100.h" 2443e3346eSAndrew Jeffery 25dbcabeebSCédric Le Goater #define ASPEED_SPIS_NUM 2 26dbcabeebSCédric Le Goater 27ff90606fSCédric Le Goater typedef struct AspeedSoCState { 2843e3346eSAndrew Jeffery /*< private >*/ 2943e3346eSAndrew Jeffery DeviceState parent; 3043e3346eSAndrew Jeffery 3143e3346eSAndrew Jeffery /*< public >*/ 322d105bd6SCédric Le Goater ARMCPU cpu; 3343e3346eSAndrew Jeffery MemoryRegion iomem; 3474af4eecSCédric Le Goater MemoryRegion sram; 3543e3346eSAndrew Jeffery AspeedVICState vic; 3643e3346eSAndrew Jeffery AspeedTimerCtrlState timerctrl; 3716020011SCédric Le Goater AspeedI2CState i2c; 38334973bbSAndrew Jeffery AspeedSCUState scu; 390e5803dfSCédric Le Goater AspeedSMCState fmc; 40dbcabeebSCédric Le Goater AspeedSMCState spi[ASPEED_SPIS_NUM]; 41c2da8a8bSCédric Le Goater AspeedSDMCState sdmc; 42013befe1SCédric Le Goater AspeedWDTState wdt; 43*ea337c65SCédric Le Goater FTGMAC100State ftgmac100; 44ff90606fSCédric Le Goater } AspeedSoCState; 4543e3346eSAndrew Jeffery 46ff90606fSCédric Le Goater #define TYPE_ASPEED_SOC "aspeed-soc" 47ff90606fSCédric Le Goater #define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC) 4843e3346eSAndrew Jeffery 49b033271fSCédric Le Goater typedef struct AspeedSoCInfo { 50b033271fSCédric Le Goater const char *name; 51b033271fSCédric Le Goater const char *cpu_model; 52b033271fSCédric Le Goater uint32_t silicon_rev; 53b033271fSCédric Le Goater hwaddr sdram_base; 5474af4eecSCédric Le Goater uint64_t sram_size; 55dbcabeebSCédric Le Goater int spis_num; 56dbcabeebSCédric Le Goater const hwaddr *spi_bases; 576dc52326SCédric Le Goater const char *fmc_typename; 586dc52326SCédric Le Goater const char **spi_typename; 59b033271fSCédric Le Goater } AspeedSoCInfo; 60b033271fSCédric Le Goater 61b033271fSCédric Le Goater typedef struct AspeedSoCClass { 62b033271fSCédric Le Goater DeviceClass parent_class; 63b033271fSCédric Le Goater AspeedSoCInfo *info; 64b033271fSCédric Le Goater } AspeedSoCClass; 65b033271fSCédric Le Goater 66b033271fSCédric Le Goater #define ASPEED_SOC_CLASS(klass) \ 67b033271fSCédric Le Goater OBJECT_CLASS_CHECK(AspeedSoCClass, (klass), TYPE_ASPEED_SOC) 68b033271fSCédric Le Goater #define ASPEED_SOC_GET_CLASS(obj) \ 69b033271fSCédric Le Goater OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC) 7043e3346eSAndrew Jeffery 71ff90606fSCédric Le Goater #endif /* ASPEED_SOC_H */ 72