143e3346eSAndrew Jeffery /* 2ff90606fSCédric Le Goater * ASPEED SoC family 343e3346eSAndrew Jeffery * 443e3346eSAndrew Jeffery * Andrew Jeffery <andrew@aj.id.au> 543e3346eSAndrew Jeffery * 643e3346eSAndrew Jeffery * Copyright 2016 IBM Corp. 743e3346eSAndrew Jeffery * 843e3346eSAndrew Jeffery * This code is licensed under the GPL version 2 or later. See 943e3346eSAndrew Jeffery * the COPYING file in the top-level directory. 1043e3346eSAndrew Jeffery */ 1143e3346eSAndrew Jeffery 12ff90606fSCédric Le Goater #ifndef ASPEED_SOC_H 13ff90606fSCédric Le Goater #define ASPEED_SOC_H 1443e3346eSAndrew Jeffery 1543e3346eSAndrew Jeffery #include "hw/arm/arm.h" 1643e3346eSAndrew Jeffery #include "hw/intc/aspeed_vic.h" 17334973bbSAndrew Jeffery #include "hw/misc/aspeed_scu.h" 18c2da8a8bSCédric Le Goater #include "hw/misc/aspeed_sdmc.h" 1943e3346eSAndrew Jeffery #include "hw/timer/aspeed_timer.h" 2016020011SCédric Le Goater #include "hw/i2c/aspeed_i2c.h" 217c1c69bcSCédric Le Goater #include "hw/ssi/aspeed_smc.h" 22013befe1SCédric Le Goater #include "hw/watchdog/wdt_aspeed.h" 23ea337c65SCédric Le Goater #include "hw/net/ftgmac100.h" 2443e3346eSAndrew Jeffery 25dbcabeebSCédric Le Goater #define ASPEED_SPIS_NUM 2 26f986ee1dSJoel Stanley #define ASPEED_WDTS_NUM 3 27dbcabeebSCédric Le Goater 28ff90606fSCédric Le Goater typedef struct AspeedSoCState { 2943e3346eSAndrew Jeffery /*< private >*/ 3043e3346eSAndrew Jeffery DeviceState parent; 3143e3346eSAndrew Jeffery 3243e3346eSAndrew Jeffery /*< public >*/ 332d105bd6SCédric Le Goater ARMCPU cpu; 3443e3346eSAndrew Jeffery MemoryRegion iomem; 3574af4eecSCédric Le Goater MemoryRegion sram; 3643e3346eSAndrew Jeffery AspeedVICState vic; 3743e3346eSAndrew Jeffery AspeedTimerCtrlState timerctrl; 3816020011SCédric Le Goater AspeedI2CState i2c; 39334973bbSAndrew Jeffery AspeedSCUState scu; 400e5803dfSCédric Le Goater AspeedSMCState fmc; 41dbcabeebSCédric Le Goater AspeedSMCState spi[ASPEED_SPIS_NUM]; 42c2da8a8bSCédric Le Goater AspeedSDMCState sdmc; 43f986ee1dSJoel Stanley AspeedWDTState wdt[ASPEED_WDTS_NUM]; 44ea337c65SCédric Le Goater FTGMAC100State ftgmac100; 45ff90606fSCédric Le Goater } AspeedSoCState; 4643e3346eSAndrew Jeffery 47ff90606fSCédric Le Goater #define TYPE_ASPEED_SOC "aspeed-soc" 48ff90606fSCédric Le Goater #define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC) 4943e3346eSAndrew Jeffery 50b033271fSCédric Le Goater typedef struct AspeedSoCInfo { 51b033271fSCédric Le Goater const char *name; 52*ba1ba5ccSIgor Mammedov const char *cpu_type; 53b033271fSCédric Le Goater uint32_t silicon_rev; 54b033271fSCédric Le Goater hwaddr sdram_base; 5574af4eecSCédric Le Goater uint64_t sram_size; 56dbcabeebSCédric Le Goater int spis_num; 57dbcabeebSCédric Le Goater const hwaddr *spi_bases; 586dc52326SCédric Le Goater const char *fmc_typename; 596dc52326SCédric Le Goater const char **spi_typename; 60f986ee1dSJoel Stanley int wdts_num; 61b033271fSCédric Le Goater } AspeedSoCInfo; 62b033271fSCédric Le Goater 63b033271fSCédric Le Goater typedef struct AspeedSoCClass { 64b033271fSCédric Le Goater DeviceClass parent_class; 65b033271fSCédric Le Goater AspeedSoCInfo *info; 66b033271fSCédric Le Goater } AspeedSoCClass; 67b033271fSCédric Le Goater 68b033271fSCédric Le Goater #define ASPEED_SOC_CLASS(klass) \ 69b033271fSCédric Le Goater OBJECT_CLASS_CHECK(AspeedSoCClass, (klass), TYPE_ASPEED_SOC) 70b033271fSCédric Le Goater #define ASPEED_SOC_GET_CLASS(obj) \ 71b033271fSCédric Le Goater OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC) 7243e3346eSAndrew Jeffery 73ff90606fSCédric Le Goater #endif /* ASPEED_SOC_H */ 74