1 #ifndef HW_ARM_ALLWINNER_A10_H 2 #define HW_ARM_ALLWINNER_A10_H 3 4 #include "qemu/error-report.h" 5 #include "hw/char/serial.h" 6 #include "hw/arm/boot.h" 7 #include "hw/pci/pci_device.h" 8 #include "hw/timer/allwinner-a10-pit.h" 9 #include "hw/intc/allwinner-a10-pic.h" 10 #include "hw/net/allwinner_emac.h" 11 #include "hw/sd/allwinner-sdhost.h" 12 #include "hw/ide/ahci.h" 13 #include "hw/usb/hcd-ohci.h" 14 #include "hw/usb/hcd-ehci.h" 15 #include "hw/rtc/allwinner-rtc.h" 16 #include "hw/misc/allwinner-a10-ccm.h" 17 #include "hw/misc/allwinner-a10-dramc.h" 18 #include "hw/i2c/allwinner-i2c.h" 19 20 #include "target/arm/cpu.h" 21 #include "qom/object.h" 22 23 24 #define AW_A10_SDRAM_BASE 0x40000000 25 26 #define AW_A10_NUM_USB 2 27 28 #define TYPE_AW_A10 "allwinner-a10" 29 OBJECT_DECLARE_SIMPLE_TYPE(AwA10State, AW_A10) 30 31 struct AwA10State { 32 /*< private >*/ 33 DeviceState parent_obj; 34 /*< public >*/ 35 36 ARMCPU cpu; 37 AwA10ClockCtlState ccm; 38 AwA10DramControllerState dramc; 39 AwA10PITState timer; 40 AwA10PICState intc; 41 AwEmacState emac; 42 AllwinnerAHCIState sata; 43 AwSdHostState mmc0; 44 AWI2CState i2c0; 45 AwRtcState rtc; 46 MemoryRegion sram_a; 47 EHCISysBusState ehci[AW_A10_NUM_USB]; 48 OHCISysBusState ohci[AW_A10_NUM_USB]; 49 }; 50 51 #endif 52