1*74fcbd22SGuenter Roeck /* 2*74fcbd22SGuenter Roeck * Device model for Zynq ADC controller 3*74fcbd22SGuenter Roeck * 4*74fcbd22SGuenter Roeck * Copyright (c) 2015 Guenter Roeck <linux@roeck-us.net> 5*74fcbd22SGuenter Roeck * 6*74fcbd22SGuenter Roeck * This program is free software; you can redistribute it and/or 7*74fcbd22SGuenter Roeck * modify it under the terms of the GNU General Public License 8*74fcbd22SGuenter Roeck * as published by the Free Software Foundation; either version 9*74fcbd22SGuenter Roeck * 2 of the License, or (at your option) any later version. 10*74fcbd22SGuenter Roeck * 11*74fcbd22SGuenter Roeck * You should have received a copy of the GNU General Public License along 12*74fcbd22SGuenter Roeck * with this program; if not, see <http://www.gnu.org/licenses/>. 13*74fcbd22SGuenter Roeck */ 14*74fcbd22SGuenter Roeck 15*74fcbd22SGuenter Roeck #ifndef ZYNQ_XADC_H 16*74fcbd22SGuenter Roeck #define ZYNQ_XADC_H 17*74fcbd22SGuenter Roeck 18*74fcbd22SGuenter Roeck #include "hw/sysbus.h" 19*74fcbd22SGuenter Roeck 20*74fcbd22SGuenter Roeck #define ZYNQ_XADC_MMIO_SIZE 0x0020 21*74fcbd22SGuenter Roeck #define ZYNQ_XADC_NUM_IO_REGS (ZYNQ_XADC_MMIO_SIZE / 4) 22*74fcbd22SGuenter Roeck #define ZYNQ_XADC_NUM_ADC_REGS 128 23*74fcbd22SGuenter Roeck #define ZYNQ_XADC_FIFO_DEPTH 15 24*74fcbd22SGuenter Roeck 25*74fcbd22SGuenter Roeck #define TYPE_ZYNQ_XADC "xlnx,zynq-xadc" 26*74fcbd22SGuenter Roeck #define ZYNQ_XADC(obj) \ 27*74fcbd22SGuenter Roeck OBJECT_CHECK(ZynqXADCState, (obj), TYPE_ZYNQ_XADC) 28*74fcbd22SGuenter Roeck 29*74fcbd22SGuenter Roeck typedef struct ZynqXADCState { 30*74fcbd22SGuenter Roeck /*< private >*/ 31*74fcbd22SGuenter Roeck SysBusDevice parent_obj; 32*74fcbd22SGuenter Roeck 33*74fcbd22SGuenter Roeck /*< public >*/ 34*74fcbd22SGuenter Roeck MemoryRegion iomem; 35*74fcbd22SGuenter Roeck 36*74fcbd22SGuenter Roeck uint32_t regs[ZYNQ_XADC_NUM_IO_REGS]; 37*74fcbd22SGuenter Roeck uint16_t xadc_regs[ZYNQ_XADC_NUM_ADC_REGS]; 38*74fcbd22SGuenter Roeck uint16_t xadc_read_reg_previous; 39*74fcbd22SGuenter Roeck uint16_t xadc_dfifo[ZYNQ_XADC_FIFO_DEPTH]; 40*74fcbd22SGuenter Roeck uint16_t xadc_dfifo_entries; 41*74fcbd22SGuenter Roeck 42*74fcbd22SGuenter Roeck struct IRQState *qemu_irq; 43*74fcbd22SGuenter Roeck 44*74fcbd22SGuenter Roeck } ZynqXADCState; 45*74fcbd22SGuenter Roeck 46*74fcbd22SGuenter Roeck #endif /* ZYNQ_XADC_H */ 47