1d1f711d4SAlistair Francis /* 2d1f711d4SAlistair Francis * STM32F2XX ADC 3d1f711d4SAlistair Francis * 4d1f711d4SAlistair Francis * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> 5d1f711d4SAlistair Francis * 6d1f711d4SAlistair Francis * Permission is hereby granted, free of charge, to any person obtaining a copy 7d1f711d4SAlistair Francis * of this software and associated documentation files (the "Software"), to deal 8d1f711d4SAlistair Francis * in the Software without restriction, including without limitation the rights 9d1f711d4SAlistair Francis * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10d1f711d4SAlistair Francis * copies of the Software, and to permit persons to whom the Software is 11d1f711d4SAlistair Francis * furnished to do so, subject to the following conditions: 12d1f711d4SAlistair Francis * 13d1f711d4SAlistair Francis * The above copyright notice and this permission notice shall be included in 14d1f711d4SAlistair Francis * all copies or substantial portions of the Software. 15d1f711d4SAlistair Francis * 16d1f711d4SAlistair Francis * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17d1f711d4SAlistair Francis * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18d1f711d4SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19d1f711d4SAlistair Francis * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20d1f711d4SAlistair Francis * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21d1f711d4SAlistair Francis * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22d1f711d4SAlistair Francis * THE SOFTWARE. 23d1f711d4SAlistair Francis */ 24d1f711d4SAlistair Francis 25d1f711d4SAlistair Francis #ifndef HW_STM32F2XX_ADC_H 26d1f711d4SAlistair Francis #define HW_STM32F2XX_ADC_H 27d1f711d4SAlistair Francis 28ec150c7eSMarkus Armbruster #include "hw/sysbus.h" 29db1015e9SEduardo Habkost #include "qom/object.h" 30ec150c7eSMarkus Armbruster 31d1f711d4SAlistair Francis #define ADC_SR 0x00 32d1f711d4SAlistair Francis #define ADC_CR1 0x04 33d1f711d4SAlistair Francis #define ADC_CR2 0x08 34d1f711d4SAlistair Francis #define ADC_SMPR1 0x0C 35d1f711d4SAlistair Francis #define ADC_SMPR2 0x10 36d1f711d4SAlistair Francis #define ADC_JOFR1 0x14 37d1f711d4SAlistair Francis #define ADC_JOFR2 0x18 38d1f711d4SAlistair Francis #define ADC_JOFR3 0x1C 39d1f711d4SAlistair Francis #define ADC_JOFR4 0x20 40d1f711d4SAlistair Francis #define ADC_HTR 0x24 41d1f711d4SAlistair Francis #define ADC_LTR 0x28 42d1f711d4SAlistair Francis #define ADC_SQR1 0x2C 43d1f711d4SAlistair Francis #define ADC_SQR2 0x30 44d1f711d4SAlistair Francis #define ADC_SQR3 0x34 45d1f711d4SAlistair Francis #define ADC_JSQR 0x38 46d1f711d4SAlistair Francis #define ADC_JDR1 0x3C 47d1f711d4SAlistair Francis #define ADC_JDR2 0x40 48d1f711d4SAlistair Francis #define ADC_JDR3 0x44 49d1f711d4SAlistair Francis #define ADC_JDR4 0x48 50d1f711d4SAlistair Francis #define ADC_DR 0x4C 51d1f711d4SAlistair Francis 52d1f711d4SAlistair Francis #define ADC_CR2_ADON 0x01 53d1f711d4SAlistair Francis #define ADC_CR2_CONT 0x02 54d1f711d4SAlistair Francis #define ADC_CR2_ALIGN 0x800 55d1f711d4SAlistair Francis #define ADC_CR2_SWSTART 0x40000000 56d1f711d4SAlistair Francis 57d1f711d4SAlistair Francis #define ADC_CR1_RES 0x3000000 58d1f711d4SAlistair Francis 59d1f711d4SAlistair Francis #define ADC_COMMON_ADDRESS 0x100 60d1f711d4SAlistair Francis 61d1f711d4SAlistair Francis #define TYPE_STM32F2XX_ADC "stm32f2xx-adc" 62*8063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXADCState, STM32F2XX_ADC) 63d1f711d4SAlistair Francis 64db1015e9SEduardo Habkost struct STM32F2XXADCState { 65d1f711d4SAlistair Francis /* <private> */ 66d1f711d4SAlistair Francis SysBusDevice parent_obj; 67d1f711d4SAlistair Francis 68d1f711d4SAlistair Francis /* <public> */ 69d1f711d4SAlistair Francis MemoryRegion mmio; 70d1f711d4SAlistair Francis 71d1f711d4SAlistair Francis uint32_t adc_sr; 72d1f711d4SAlistair Francis uint32_t adc_cr1; 73d1f711d4SAlistair Francis uint32_t adc_cr2; 74d1f711d4SAlistair Francis uint32_t adc_smpr1; 75d1f711d4SAlistair Francis uint32_t adc_smpr2; 76d1f711d4SAlistair Francis uint32_t adc_jofr[4]; 77d1f711d4SAlistair Francis uint32_t adc_htr; 78d1f711d4SAlistair Francis uint32_t adc_ltr; 79d1f711d4SAlistair Francis uint32_t adc_sqr1; 80d1f711d4SAlistair Francis uint32_t adc_sqr2; 81d1f711d4SAlistair Francis uint32_t adc_sqr3; 82d1f711d4SAlistair Francis uint32_t adc_jsqr; 83d1f711d4SAlistair Francis uint32_t adc_jdr[4]; 84d1f711d4SAlistair Francis uint32_t adc_dr; 85d1f711d4SAlistair Francis 86d1f711d4SAlistair Francis qemu_irq irq; 87db1015e9SEduardo Habkost }; 88d1f711d4SAlistair Francis 89d1f711d4SAlistair Francis #endif /* HW_STM32F2XX_ADC_H */ 90