1 /* 2 * Generic intermediate code generation. 3 * 4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #ifndef EXEC__TRANSLATOR_H 11 #define EXEC__TRANSLATOR_H 12 13 /* 14 * Include this header from a target-specific file, and add a 15 * 16 * DisasContextBase base; 17 * 18 * member in your target-specific DisasContext. 19 */ 20 21 #include "qemu/bswap.h" 22 #include "exec/vaddr.h" 23 24 /** 25 * DisasJumpType: 26 * @DISAS_NEXT: Next instruction in program order. 27 * @DISAS_TOO_MANY: Too many instructions translated. 28 * @DISAS_NORETURN: Following code is dead. 29 * @DISAS_TARGET_*: Start of target-specific conditions. 30 * 31 * What instruction to disassemble next. 32 */ 33 typedef enum DisasJumpType { 34 DISAS_NEXT, 35 DISAS_TOO_MANY, 36 DISAS_NORETURN, 37 DISAS_TARGET_0, 38 DISAS_TARGET_1, 39 DISAS_TARGET_2, 40 DISAS_TARGET_3, 41 DISAS_TARGET_4, 42 DISAS_TARGET_5, 43 DISAS_TARGET_6, 44 DISAS_TARGET_7, 45 DISAS_TARGET_8, 46 DISAS_TARGET_9, 47 DISAS_TARGET_10, 48 DISAS_TARGET_11, 49 } DisasJumpType; 50 51 /** 52 * DisasContextBase: 53 * @tb: Translation block for this disassembly. 54 * @pc_first: Address of first guest instruction in this TB. 55 * @pc_next: Address of next guest instruction in this TB (current during 56 * disassembly). 57 * @is_jmp: What instruction to disassemble next. 58 * @num_insns: Number of translated instructions (including current). 59 * @max_insns: Maximum number of instructions to be translated in this TB. 60 * @plugin_enabled: TCG plugin enabled in this TB. 61 * @fake_insn: True if translator_fake_ldb used. 62 * @insn_start: The last op emitted by the insn_start hook, 63 * which is expected to be INDEX_op_insn_start. 64 * 65 * Architecture-agnostic disassembly context. 66 */ 67 struct DisasContextBase { 68 TranslationBlock *tb; 69 vaddr pc_first; 70 vaddr pc_next; 71 DisasJumpType is_jmp; 72 int num_insns; 73 int max_insns; 74 bool plugin_enabled; 75 bool fake_insn; 76 struct TCGOp *insn_start; 77 void *host_addr[2]; 78 79 /* 80 * Record insn data that we cannot read directly from host memory. 81 * There are only two reasons we cannot use host memory: 82 * (1) We are executing from I/O, 83 * (2) We are executing a synthetic instruction (s390x EX). 84 * In both cases we need record exactly one instruction, 85 * and thus the maximum amount of data we record is limited. 86 */ 87 int record_start; 88 int record_len; 89 uint8_t record[32]; 90 }; 91 92 /** 93 * TranslatorOps: 94 * @init_disas_context: 95 * Initialize the target-specific portions of DisasContext struct. 96 * The generic DisasContextBase has already been initialized. 97 * 98 * @tb_start: 99 * Emit any code required before the start of the main loop, 100 * after the generic gen_tb_start(). 101 * 102 * @insn_start: 103 * Emit the tcg_gen_insn_start opcode. 104 * 105 * @translate_insn: 106 * Disassemble one instruction and set db->pc_next for the start 107 * of the following instruction. Set db->is_jmp as necessary to 108 * terminate the main loop. 109 * 110 * @tb_stop: 111 * Emit any opcodes required to exit the TB, based on db->is_jmp. 112 * 113 * @disas_log: 114 * Print instruction disassembly to log. 115 */ 116 typedef struct TranslatorOps { 117 void (*init_disas_context)(DisasContextBase *db, CPUState *cpu); 118 void (*tb_start)(DisasContextBase *db, CPUState *cpu); 119 void (*insn_start)(DisasContextBase *db, CPUState *cpu); 120 void (*translate_insn)(DisasContextBase *db, CPUState *cpu); 121 void (*tb_stop)(DisasContextBase *db, CPUState *cpu); 122 bool (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f); 123 } TranslatorOps; 124 125 /** 126 * translator_loop: 127 * @cpu: Target vCPU. 128 * @tb: Translation block. 129 * @max_insns: Maximum number of insns to translate. 130 * @pc: guest virtual program counter address 131 * @host_pc: host physical program counter address 132 * @ops: Target-specific operations. 133 * @db: Disassembly context. 134 * 135 * Generic translator loop. 136 * 137 * Translation will stop in the following cases (in order): 138 * - When is_jmp set by #TranslatorOps::breakpoint_check. 139 * - set to DISAS_TOO_MANY exits after translating one more insn 140 * - set to any other value than DISAS_NEXT exits immediately. 141 * - When is_jmp set by #TranslatorOps::translate_insn. 142 * - set to any value other than DISAS_NEXT exits immediately. 143 * - When the TCG operation buffer is full. 144 * - When single-stepping is enabled (system-wide or on the current vCPU). 145 * - When too many instructions have been translated. 146 */ 147 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, 148 vaddr pc, void *host_pc, const TranslatorOps *ops, 149 DisasContextBase *db); 150 151 /** 152 * translator_use_goto_tb 153 * @db: Disassembly context 154 * @dest: target pc of the goto 155 * 156 * Return true if goto_tb is allowed between the current TB 157 * and the destination PC. 158 */ 159 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest); 160 161 /** 162 * translator_io_start 163 * @db: Disassembly context 164 * 165 * If icount is enabled, set cpu->can_do_io, adjust db->is_jmp to 166 * DISAS_TOO_MANY if it is still DISAS_NEXT, and return true. 167 * Otherwise return false. 168 */ 169 bool translator_io_start(DisasContextBase *db); 170 171 /* 172 * Translator Load Functions 173 * 174 * These are intended to replace the direct usage of the cpu_ld*_code 175 * functions and are mandatory for front-ends that have been migrated 176 * to the common translator_loop. These functions are only intended 177 * to be called from the translation stage and should not be called 178 * from helper functions. Those functions should be converted to encode 179 * the relevant information at translation time. 180 */ 181 182 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc); 183 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc); 184 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc); 185 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc); 186 187 static inline uint16_t 188 translator_lduw_swap(CPUArchState *env, DisasContextBase *db, 189 vaddr pc, bool do_swap) 190 { 191 uint16_t ret = translator_lduw(env, db, pc); 192 if (do_swap) { 193 ret = bswap16(ret); 194 } 195 return ret; 196 } 197 198 static inline uint32_t 199 translator_ldl_swap(CPUArchState *env, DisasContextBase *db, 200 vaddr pc, bool do_swap) 201 { 202 uint32_t ret = translator_ldl(env, db, pc); 203 if (do_swap) { 204 ret = bswap32(ret); 205 } 206 return ret; 207 } 208 209 static inline uint64_t 210 translator_ldq_swap(CPUArchState *env, DisasContextBase *db, 211 vaddr pc, bool do_swap) 212 { 213 uint64_t ret = translator_ldq(env, db, pc); 214 if (do_swap) { 215 ret = bswap64(ret); 216 } 217 return ret; 218 } 219 220 /** 221 * translator_fake_ld - fake instruction load 222 * @db: Disassembly context 223 * @data: bytes of instruction 224 * @len: number of bytes 225 * 226 * This is a special case helper used where the instruction we are 227 * about to translate comes from somewhere else (e.g. being 228 * re-synthesised for s390x "ex"). It ensures we update other areas of 229 * the translator with details of the executed instruction. 230 */ 231 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len); 232 233 /** 234 * translator_st 235 * @db: disassembly context 236 * @dest: address to copy into 237 * @addr: virtual address within TB 238 * @len: length 239 * 240 * Copy @len bytes from @addr into @dest. 241 * All bytes must have been read during translation. 242 * Return true on success or false on failure. 243 */ 244 bool translator_st(const DisasContextBase *db, void *dest, 245 vaddr addr, size_t len); 246 247 /** 248 * translator_st_len 249 * @db: disassembly context 250 * 251 * Return the number of bytes available to copy from the 252 * current translation block with translator_st. 253 */ 254 size_t translator_st_len(const DisasContextBase *db); 255 256 /** 257 * translator_is_same_page 258 * @db: disassembly context 259 * @addr: virtual address within TB 260 * 261 * Return whether @addr is on the same page as where disassembly started. 262 * Translators can use this to enforce the rule that only single-insn 263 * translation blocks are allowed to cross page boundaries. 264 */ 265 bool translator_is_same_page(const DisasContextBase *db, vaddr addr); 266 267 #endif /* EXEC__TRANSLATOR_H */ 268