177fc6f5eSLluís Vilanova /* 277fc6f5eSLluís Vilanova * Generic intermediate code generation. 377fc6f5eSLluís Vilanova * 477fc6f5eSLluís Vilanova * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu> 577fc6f5eSLluís Vilanova * 677fc6f5eSLluís Vilanova * This work is licensed under the terms of the GNU GPL, version 2 or later. 777fc6f5eSLluís Vilanova * See the COPYING file in the top-level directory. 877fc6f5eSLluís Vilanova */ 977fc6f5eSLluís Vilanova 1077fc6f5eSLluís Vilanova #ifndef EXEC__TRANSLATOR_H 1177fc6f5eSLluís Vilanova #define EXEC__TRANSLATOR_H 1277fc6f5eSLluís Vilanova 13bb2e0039SLluís Vilanova /* 14bb2e0039SLluís Vilanova * Include this header from a target-specific file, and add a 15bb2e0039SLluís Vilanova * 16bb2e0039SLluís Vilanova * DisasContextBase base; 17bb2e0039SLluís Vilanova * 18bb2e0039SLluís Vilanova * member in your target-specific DisasContext. 19bb2e0039SLluís Vilanova */ 20bb2e0039SLluís Vilanova 21bb2e0039SLluís Vilanova 22bb2e0039SLluís Vilanova #include "exec/exec-all.h" 23bb2e0039SLluís Vilanova #include "tcg/tcg.h" 24bb2e0039SLluís Vilanova 25bb2e0039SLluís Vilanova 2677fc6f5eSLluís Vilanova /** 2777fc6f5eSLluís Vilanova * DisasJumpType: 2877fc6f5eSLluís Vilanova * @DISAS_NEXT: Next instruction in program order. 2977fc6f5eSLluís Vilanova * @DISAS_TOO_MANY: Too many instructions translated. 3077fc6f5eSLluís Vilanova * @DISAS_NORETURN: Following code is dead. 3177fc6f5eSLluís Vilanova * @DISAS_TARGET_*: Start of target-specific conditions. 3277fc6f5eSLluís Vilanova * 3377fc6f5eSLluís Vilanova * What instruction to disassemble next. 3477fc6f5eSLluís Vilanova */ 3577fc6f5eSLluís Vilanova typedef enum DisasJumpType { 3677fc6f5eSLluís Vilanova DISAS_NEXT, 3777fc6f5eSLluís Vilanova DISAS_TOO_MANY, 3877fc6f5eSLluís Vilanova DISAS_NORETURN, 3977fc6f5eSLluís Vilanova DISAS_TARGET_0, 4077fc6f5eSLluís Vilanova DISAS_TARGET_1, 4177fc6f5eSLluís Vilanova DISAS_TARGET_2, 4277fc6f5eSLluís Vilanova DISAS_TARGET_3, 4377fc6f5eSLluís Vilanova DISAS_TARGET_4, 4477fc6f5eSLluís Vilanova DISAS_TARGET_5, 4577fc6f5eSLluís Vilanova DISAS_TARGET_6, 4677fc6f5eSLluís Vilanova DISAS_TARGET_7, 4777fc6f5eSLluís Vilanova DISAS_TARGET_8, 4877fc6f5eSLluís Vilanova DISAS_TARGET_9, 4977fc6f5eSLluís Vilanova DISAS_TARGET_10, 5077fc6f5eSLluís Vilanova DISAS_TARGET_11, 5177fc6f5eSLluís Vilanova } DisasJumpType; 5277fc6f5eSLluís Vilanova 53bb2e0039SLluís Vilanova /** 54bb2e0039SLluís Vilanova * DisasContextBase: 55bb2e0039SLluís Vilanova * @tb: Translation block for this disassembly. 56bb2e0039SLluís Vilanova * @pc_first: Address of first guest instruction in this TB. 57bb2e0039SLluís Vilanova * @pc_next: Address of next guest instruction in this TB (current during 58bb2e0039SLluís Vilanova * disassembly). 59bb2e0039SLluís Vilanova * @is_jmp: What instruction to disassemble next. 60bb2e0039SLluís Vilanova * @num_insns: Number of translated instructions (including current). 61b542683dSEmilio G. Cota * @max_insns: Maximum number of instructions to be translated in this TB. 62bb2e0039SLluís Vilanova * @singlestep_enabled: "Hardware" single stepping enabled. 63bb2e0039SLluís Vilanova * 64bb2e0039SLluís Vilanova * Architecture-agnostic disassembly context. 65bb2e0039SLluís Vilanova */ 66bb2e0039SLluís Vilanova typedef struct DisasContextBase { 67bb2e0039SLluís Vilanova TranslationBlock *tb; 68bb2e0039SLluís Vilanova target_ulong pc_first; 69bb2e0039SLluís Vilanova target_ulong pc_next; 70bb2e0039SLluís Vilanova DisasJumpType is_jmp; 71b542683dSEmilio G. Cota int num_insns; 72b542683dSEmilio G. Cota int max_insns; 73bb2e0039SLluís Vilanova bool singlestep_enabled; 74bb2e0039SLluís Vilanova } DisasContextBase; 75bb2e0039SLluís Vilanova 76bb2e0039SLluís Vilanova /** 77bb2e0039SLluís Vilanova * TranslatorOps: 78bb2e0039SLluís Vilanova * @init_disas_context: 79bb2e0039SLluís Vilanova * Initialize the target-specific portions of DisasContext struct. 80bb2e0039SLluís Vilanova * The generic DisasContextBase has already been initialized. 81bb2e0039SLluís Vilanova * 82bb2e0039SLluís Vilanova * @tb_start: 83bb2e0039SLluís Vilanova * Emit any code required before the start of the main loop, 84bb2e0039SLluís Vilanova * after the generic gen_tb_start(). 85bb2e0039SLluís Vilanova * 86bb2e0039SLluís Vilanova * @insn_start: 87bb2e0039SLluís Vilanova * Emit the tcg_gen_insn_start opcode. 88bb2e0039SLluís Vilanova * 89bb2e0039SLluís Vilanova * @breakpoint_check: 90bb2e0039SLluís Vilanova * When called, the breakpoint has already been checked to match the PC, 91bb2e0039SLluís Vilanova * but the target may decide the breakpoint missed the address 92bb2e0039SLluís Vilanova * (e.g., due to conditions encoded in their flags). Return true to 93bb2e0039SLluís Vilanova * indicate that the breakpoint did hit, in which case no more breakpoints 94bb2e0039SLluís Vilanova * are checked. If the breakpoint did hit, emit any code required to 95bb2e0039SLluís Vilanova * signal the exception, and set db->is_jmp as necessary to terminate 96bb2e0039SLluís Vilanova * the main loop. 97bb2e0039SLluís Vilanova * 98bb2e0039SLluís Vilanova * @translate_insn: 99bb2e0039SLluís Vilanova * Disassemble one instruction and set db->pc_next for the start 100bb2e0039SLluís Vilanova * of the following instruction. Set db->is_jmp as necessary to 101bb2e0039SLluís Vilanova * terminate the main loop. 102bb2e0039SLluís Vilanova * 103bb2e0039SLluís Vilanova * @tb_stop: 104bb2e0039SLluís Vilanova * Emit any opcodes required to exit the TB, based on db->is_jmp. 105bb2e0039SLluís Vilanova * 106bb2e0039SLluís Vilanova * @disas_log: 107bb2e0039SLluís Vilanova * Print instruction disassembly to log. 108bb2e0039SLluís Vilanova */ 109bb2e0039SLluís Vilanova typedef struct TranslatorOps { 110b542683dSEmilio G. Cota void (*init_disas_context)(DisasContextBase *db, CPUState *cpu); 111bb2e0039SLluís Vilanova void (*tb_start)(DisasContextBase *db, CPUState *cpu); 112bb2e0039SLluís Vilanova void (*insn_start)(DisasContextBase *db, CPUState *cpu); 113bb2e0039SLluís Vilanova bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu, 114bb2e0039SLluís Vilanova const CPUBreakpoint *bp); 115bb2e0039SLluís Vilanova void (*translate_insn)(DisasContextBase *db, CPUState *cpu); 116bb2e0039SLluís Vilanova void (*tb_stop)(DisasContextBase *db, CPUState *cpu); 117bb2e0039SLluís Vilanova void (*disas_log)(const DisasContextBase *db, CPUState *cpu); 118bb2e0039SLluís Vilanova } TranslatorOps; 119bb2e0039SLluís Vilanova 120bb2e0039SLluís Vilanova /** 121bb2e0039SLluís Vilanova * translator_loop: 122bb2e0039SLluís Vilanova * @ops: Target-specific operations. 123bb2e0039SLluís Vilanova * @db: Disassembly context. 124bb2e0039SLluís Vilanova * @cpu: Target vCPU. 125bb2e0039SLluís Vilanova * @tb: Translation block. 126*8b86d6d2SRichard Henderson * @max_insns: Maximum number of insns to translate. 127bb2e0039SLluís Vilanova * 128bb2e0039SLluís Vilanova * Generic translator loop. 129bb2e0039SLluís Vilanova * 130bb2e0039SLluís Vilanova * Translation will stop in the following cases (in order): 131bb2e0039SLluís Vilanova * - When is_jmp set by #TranslatorOps::breakpoint_check. 132bb2e0039SLluís Vilanova * - set to DISAS_TOO_MANY exits after translating one more insn 133bb2e0039SLluís Vilanova * - set to any other value than DISAS_NEXT exits immediately. 134bb2e0039SLluís Vilanova * - When is_jmp set by #TranslatorOps::translate_insn. 135bb2e0039SLluís Vilanova * - set to any value other than DISAS_NEXT exits immediately. 136bb2e0039SLluís Vilanova * - When the TCG operation buffer is full. 137bb2e0039SLluís Vilanova * - When single-stepping is enabled (system-wide or on the current vCPU). 138bb2e0039SLluís Vilanova * - When too many instructions have been translated. 139bb2e0039SLluís Vilanova */ 140bb2e0039SLluís Vilanova void translator_loop(const TranslatorOps *ops, DisasContextBase *db, 141*8b86d6d2SRichard Henderson CPUState *cpu, TranslationBlock *tb, int max_insns); 142bb2e0039SLluís Vilanova 143bb2e0039SLluís Vilanova void translator_loop_temp_check(DisasContextBase *db); 144bb2e0039SLluís Vilanova 14577fc6f5eSLluís Vilanova #endif /* EXEC__TRANSLATOR_H */ 146