1 /* 2 * Flags for use with cpu_interrupt() 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * SPDX-License-Identifier: LGPL-2.1-or-later 6 */ 7 8 #ifndef CPU_INTERRUPT_H 9 #define CPU_INTERRUPT_H 10 11 /* 12 * The numbers assigned here are non-sequential in order to preserve binary 13 * compatibility with the vmstate dump. Bit 0 (0x0001) was previously used 14 * for CPU_INTERRUPT_EXIT, and is cleared when loading the vmstate dump. 15 */ 16 17 /* 18 * External hardware interrupt pending. 19 * This is typically used for interrupts from devices. 20 */ 21 #define CPU_INTERRUPT_HARD 0x0002 22 23 /* 24 * Exit the current TB. This is typically used when some system-level device 25 * makes some change to the memory mapping. E.g. the a20 line change. 26 */ 27 #define CPU_INTERRUPT_EXITTB 0x0004 28 29 /* Halt the CPU. */ 30 #define CPU_INTERRUPT_HALT 0x0020 31 32 /* Debug event pending. */ 33 #define CPU_INTERRUPT_DEBUG 0x0080 34 35 /* Reset signal. */ 36 #define CPU_INTERRUPT_RESET 0x0400 37 38 /* 39 * Several target-specific external hardware interrupts. Each target/cpu.h 40 * should define proper names based on these defines. 41 */ 42 #define CPU_INTERRUPT_TGT_EXT_0 0x0008 43 #define CPU_INTERRUPT_TGT_EXT_1 0x0010 44 #define CPU_INTERRUPT_TGT_EXT_2 0x0040 45 #define CPU_INTERRUPT_TGT_EXT_3 0x0200 46 #define CPU_INTERRUPT_TGT_EXT_4 0x1000 47 48 /* 49 * Several target-specific internal interrupts. These differ from the 50 * preceding target-specific interrupts in that they are intended to 51 * originate from within the cpu itself, typically in response to some 52 * instruction being executed. These, therefore, are not masked while 53 * single-stepping within the debugger. 54 */ 55 #define CPU_INTERRUPT_TGT_INT_0 0x0100 56 #define CPU_INTERRUPT_TGT_INT_1 0x0800 57 #define CPU_INTERRUPT_TGT_INT_2 0x2000 58 59 /* First unused bit: 0x4000. */ 60 61 /* The set of all bits that should be masked when single-stepping. */ 62 #define CPU_INTERRUPT_SSTEP_MASK \ 63 (CPU_INTERRUPT_HARD \ 64 | CPU_INTERRUPT_TGT_EXT_0 \ 65 | CPU_INTERRUPT_TGT_EXT_1 \ 66 | CPU_INTERRUPT_TGT_EXT_2 \ 67 | CPU_INTERRUPT_TGT_EXT_3 \ 68 | CPU_INTERRUPT_TGT_EXT_4) 69 70 #endif /* CPU_INTERRUPT_H */ 71