xref: /qemu/include/accel/tcg/cpu-ldst-common.h (revision 0b6426ba6c218fa807fe97258d75cb4bc84c860d) 
1*0b6426baSRichard Henderson /*
2*0b6426baSRichard Henderson  * Software MMU support
3*0b6426baSRichard Henderson  *
4*0b6426baSRichard Henderson  * SPDX-License-Identifier: LGPL-2.1-or-later
5*0b6426baSRichard Henderson  */
6*0b6426baSRichard Henderson 
7*0b6426baSRichard Henderson #ifndef CPU_LDST_COMMON_H
8*0b6426baSRichard Henderson #define CPU_LDST_COMMON_H
9*0b6426baSRichard Henderson 
10*0b6426baSRichard Henderson #ifndef CONFIG_TCG
11*0b6426baSRichard Henderson #error Can only include this header with TCG
12*0b6426baSRichard Henderson #endif
13*0b6426baSRichard Henderson 
14*0b6426baSRichard Henderson #include "exec/memopidx.h"
15*0b6426baSRichard Henderson #include "exec/vaddr.h"
16*0b6426baSRichard Henderson #include "exec/mmu-access-type.h"
17*0b6426baSRichard Henderson #include "qemu/int128.h"
18*0b6426baSRichard Henderson 
19*0b6426baSRichard Henderson uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
20*0b6426baSRichard Henderson uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
21*0b6426baSRichard Henderson uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
22*0b6426baSRichard Henderson uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
23*0b6426baSRichard Henderson Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra);
24*0b6426baSRichard Henderson 
25*0b6426baSRichard Henderson void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val,
26*0b6426baSRichard Henderson                  MemOpIdx oi, uintptr_t ra);
27*0b6426baSRichard Henderson void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val,
28*0b6426baSRichard Henderson                  MemOpIdx oi, uintptr_t ra);
29*0b6426baSRichard Henderson void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val,
30*0b6426baSRichard Henderson                  MemOpIdx oi, uintptr_t ra);
31*0b6426baSRichard Henderson void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val,
32*0b6426baSRichard Henderson                  MemOpIdx oi, uintptr_t ra);
33*0b6426baSRichard Henderson void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
34*0b6426baSRichard Henderson                   MemOpIdx oi, uintptr_t ra);
35*0b6426baSRichard Henderson 
36*0b6426baSRichard Henderson uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr,
37*0b6426baSRichard Henderson                                  uint32_t cmpv, uint32_t newv,
38*0b6426baSRichard Henderson                                  MemOpIdx oi, uintptr_t retaddr);
39*0b6426baSRichard Henderson uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr,
40*0b6426baSRichard Henderson                                     uint32_t cmpv, uint32_t newv,
41*0b6426baSRichard Henderson                                     MemOpIdx oi, uintptr_t retaddr);
42*0b6426baSRichard Henderson uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr,
43*0b6426baSRichard Henderson                                     uint32_t cmpv, uint32_t newv,
44*0b6426baSRichard Henderson                                     MemOpIdx oi, uintptr_t retaddr);
45*0b6426baSRichard Henderson uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr,
46*0b6426baSRichard Henderson                                     uint64_t cmpv, uint64_t newv,
47*0b6426baSRichard Henderson                                     MemOpIdx oi, uintptr_t retaddr);
48*0b6426baSRichard Henderson uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr,
49*0b6426baSRichard Henderson                                     uint32_t cmpv, uint32_t newv,
50*0b6426baSRichard Henderson                                     MemOpIdx oi, uintptr_t retaddr);
51*0b6426baSRichard Henderson uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr,
52*0b6426baSRichard Henderson                                     uint32_t cmpv, uint32_t newv,
53*0b6426baSRichard Henderson                                     MemOpIdx oi, uintptr_t retaddr);
54*0b6426baSRichard Henderson uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr,
55*0b6426baSRichard Henderson                                     uint64_t cmpv, uint64_t newv,
56*0b6426baSRichard Henderson                                     MemOpIdx oi, uintptr_t retaddr);
57*0b6426baSRichard Henderson 
58*0b6426baSRichard Henderson #define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX)   \
59*0b6426baSRichard Henderson TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu      \
60*0b6426baSRichard Henderson     (CPUArchState *env, vaddr addr, TYPE val,   \
61*0b6426baSRichard Henderson      MemOpIdx oi, uintptr_t retaddr);
62*0b6426baSRichard Henderson 
63*0b6426baSRichard Henderson #ifdef CONFIG_ATOMIC64
64*0b6426baSRichard Henderson #define GEN_ATOMIC_HELPER_ALL(NAME)          \
65*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, b)     \
66*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, w_le)  \
67*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, w_be)  \
68*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, l_le)  \
69*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, l_be)  \
70*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint64_t, q_le)  \
71*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint64_t, q_be)
72*0b6426baSRichard Henderson #else
73*0b6426baSRichard Henderson #define GEN_ATOMIC_HELPER_ALL(NAME)          \
74*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, b)     \
75*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, w_le)  \
76*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, w_be)  \
77*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, l_le)  \
78*0b6426baSRichard Henderson     GEN_ATOMIC_HELPER(NAME, uint32_t, l_be)
79*0b6426baSRichard Henderson #endif
80*0b6426baSRichard Henderson 
81*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_add)
82*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_sub)
83*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_and)
84*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_or)
85*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_xor)
86*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_smin)
87*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_umin)
88*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_smax)
89*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(fetch_umax)
90*0b6426baSRichard Henderson 
91*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(add_fetch)
92*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(sub_fetch)
93*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(and_fetch)
94*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(or_fetch)
95*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(xor_fetch)
96*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(smin_fetch)
97*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(umin_fetch)
98*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(smax_fetch)
99*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(umax_fetch)
100*0b6426baSRichard Henderson 
101*0b6426baSRichard Henderson GEN_ATOMIC_HELPER_ALL(xchg)
102*0b6426baSRichard Henderson 
103*0b6426baSRichard Henderson #undef GEN_ATOMIC_HELPER_ALL
104*0b6426baSRichard Henderson #undef GEN_ATOMIC_HELPER
105*0b6426baSRichard Henderson 
106*0b6426baSRichard Henderson Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr,
107*0b6426baSRichard Henderson                                   Int128 cmpv, Int128 newv,
108*0b6426baSRichard Henderson                                   MemOpIdx oi, uintptr_t retaddr);
109*0b6426baSRichard Henderson Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr,
110*0b6426baSRichard Henderson                                   Int128 cmpv, Int128 newv,
111*0b6426baSRichard Henderson                                   MemOpIdx oi, uintptr_t retaddr);
112*0b6426baSRichard Henderson 
113*0b6426baSRichard Henderson uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
114*0b6426baSRichard Henderson                          MemOpIdx oi, uintptr_t ra);
115*0b6426baSRichard Henderson uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr,
116*0b6426baSRichard Henderson                           MemOpIdx oi, uintptr_t ra);
117*0b6426baSRichard Henderson uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr,
118*0b6426baSRichard Henderson                           MemOpIdx oi, uintptr_t ra);
119*0b6426baSRichard Henderson uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr,
120*0b6426baSRichard Henderson                           MemOpIdx oi, uintptr_t ra);
121*0b6426baSRichard Henderson 
122*0b6426baSRichard Henderson #endif /* CPU_LDST_COMMON_H */
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