xref: /qemu/hw/xtensa/sim.c (revision 9bca0edb282de0007a4f068d9d20f3e3c3aadef7)
147d05a86SMax Filippov /*
247d05a86SMax Filippov  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
347d05a86SMax Filippov  * All rights reserved.
447d05a86SMax Filippov  *
547d05a86SMax Filippov  * Redistribution and use in source and binary forms, with or without
647d05a86SMax Filippov  * modification, are permitted provided that the following conditions are met:
747d05a86SMax Filippov  *     * Redistributions of source code must retain the above copyright
847d05a86SMax Filippov  *       notice, this list of conditions and the following disclaimer.
947d05a86SMax Filippov  *     * Redistributions in binary form must reproduce the above copyright
1047d05a86SMax Filippov  *       notice, this list of conditions and the following disclaimer in the
1147d05a86SMax Filippov  *       documentation and/or other materials provided with the distribution.
1247d05a86SMax Filippov  *     * Neither the name of the Open Source and Linux Lab nor the
1347d05a86SMax Filippov  *       names of its contributors may be used to endorse or promote products
1447d05a86SMax Filippov  *       derived from this software without specific prior written permission.
1547d05a86SMax Filippov  *
1647d05a86SMax Filippov  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1747d05a86SMax Filippov  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1847d05a86SMax Filippov  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1947d05a86SMax Filippov  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
2047d05a86SMax Filippov  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2147d05a86SMax Filippov  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2247d05a86SMax Filippov  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
2347d05a86SMax Filippov  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2447d05a86SMax Filippov  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2547d05a86SMax Filippov  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2647d05a86SMax Filippov  */
2747d05a86SMax Filippov 
2809aae23dSPeter Maydell #include "qemu/osdep.h"
29da34e65cSMarkus Armbruster #include "qapi/error.h"
304771d756SPaolo Bonzini #include "qemu-common.h"
314771d756SPaolo Bonzini #include "cpu.h"
329c17d615SPaolo Bonzini #include "sysemu/sysemu.h"
3383c9f4caSPaolo Bonzini #include "hw/boards.h"
3483c9f4caSPaolo Bonzini #include "hw/loader.h"
3547d05a86SMax Filippov #include "elf.h"
36022c62cbSPaolo Bonzini #include "exec/memory.h"
37022c62cbSPaolo Bonzini #include "exec/address-spaces.h"
388488ab02SMax Filippov #include "qemu/error-report.h"
39e53fa62cSMax Filippov #include "xtensa_memory.h"
40b68755c1SMax Filippov 
4100b941e5SAndreas Färber static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
4247d05a86SMax Filippov {
4300b941e5SAndreas Färber     XtensaCPU *cpu = opaque;
4400b941e5SAndreas Färber 
4500b941e5SAndreas Färber     return cpu_get_phys_page_debug(CPU(cpu), addr);
4647d05a86SMax Filippov }
4747d05a86SMax Filippov 
4811e7bfd7SAndreas Färber static void sim_reset(void *opaque)
4947d05a86SMax Filippov {
5011e7bfd7SAndreas Färber     XtensaCPU *cpu = opaque;
5111e7bfd7SAndreas Färber 
5211e7bfd7SAndreas Färber     cpu_reset(CPU(cpu));
5347d05a86SMax Filippov }
5447d05a86SMax Filippov 
553ef96221SMarcel Apfelbaum static void xtensa_sim_init(MachineState *machine)
5647d05a86SMax Filippov {
5706d26274SAndreas Färber     XtensaCPU *cpu = NULL;
585bfcb36eSAndreas Färber     CPUXtensaState *env = NULL;
593ef96221SMarcel Apfelbaum     ram_addr_t ram_size = machine->ram_size;
603ef96221SMarcel Apfelbaum     const char *kernel_filename = machine->kernel_filename;
6147d05a86SMax Filippov     int n;
6247d05a86SMax Filippov 
6347d05a86SMax Filippov     for (n = 0; n < smp_cpus; n++) {
64d58eeae3SIgor Mammedov         cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
6506d26274SAndreas Färber         env = &cpu->env;
6606d26274SAndreas Färber 
6747d05a86SMax Filippov         env->sregs[PRID] = n;
6811e7bfd7SAndreas Färber         qemu_register_reset(sim_reset, cpu);
6947d05a86SMax Filippov         /* Need MMU initialized prior to ELF loading,
7047d05a86SMax Filippov          * so that ELF gets loaded into virtual addresses
7147d05a86SMax Filippov          */
7211e7bfd7SAndreas Färber         sim_reset(cpu);
7347d05a86SMax Filippov     }
7447d05a86SMax Filippov 
75b68755c1SMax Filippov     if (env) {
76b68755c1SMax Filippov         XtensaMemory sysram = env->config->sysram;
7747d05a86SMax Filippov 
78b68755c1SMax Filippov         sysram.location[0].size = ram_size;
79e53fa62cSMax Filippov         xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom",
80e53fa62cSMax Filippov                                      get_system_memory());
81e53fa62cSMax Filippov         xtensa_create_memory_regions(&env->config->instram, "xtensa.instram",
82e53fa62cSMax Filippov                                      get_system_memory());
83e53fa62cSMax Filippov         xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom",
84e53fa62cSMax Filippov                                      get_system_memory());
85e53fa62cSMax Filippov         xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram",
86e53fa62cSMax Filippov                                      get_system_memory());
87e53fa62cSMax Filippov         xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom",
88e53fa62cSMax Filippov                                      get_system_memory());
89e53fa62cSMax Filippov         xtensa_create_memory_regions(&sysram, "xtensa.sysram",
90e53fa62cSMax Filippov                                      get_system_memory());
91b68755c1SMax Filippov     }
9247d05a86SMax Filippov 
93*9bca0edbSPeter Maydell     if (serial_hd(0)) {
94*9bca0edbSPeter Maydell         xtensa_sim_open_console(serial_hd(0));
958128b3e0SMax Filippov     }
9647d05a86SMax Filippov     if (kernel_filename) {
9747d05a86SMax Filippov         uint64_t elf_entry;
9847d05a86SMax Filippov         uint64_t elf_lowaddr;
9947d05a86SMax Filippov #ifdef TARGET_WORDS_BIGENDIAN
10000b941e5SAndreas Färber         int success = load_elf(kernel_filename, translate_phys_addr, cpu,
1017ef295eaSPeter Crosthwaite                 &elf_entry, &elf_lowaddr, NULL, 1, EM_XTENSA, 0, 0);
10247d05a86SMax Filippov #else
10300b941e5SAndreas Färber         int success = load_elf(kernel_filename, translate_phys_addr, cpu,
1047ef295eaSPeter Crosthwaite                 &elf_entry, &elf_lowaddr, NULL, 0, EM_XTENSA, 0, 0);
10547d05a86SMax Filippov #endif
10647d05a86SMax Filippov         if (success > 0) {
10747d05a86SMax Filippov             env->pc = elf_entry;
10847d05a86SMax Filippov         }
10947d05a86SMax Filippov     }
11047d05a86SMax Filippov }
11147d05a86SMax Filippov 
112e264d29dSEduardo Habkost static void xtensa_sim_machine_init(MachineClass *mc)
11347d05a86SMax Filippov {
114e264d29dSEduardo Habkost     mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";
115e264d29dSEduardo Habkost     mc->is_default = true;
116e264d29dSEduardo Habkost     mc->init = xtensa_sim_init;
117e264d29dSEduardo Habkost     mc->max_cpus = 4;
1188128b3e0SMax Filippov     mc->no_serial = 1;
119d58eeae3SIgor Mammedov     mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
12047d05a86SMax Filippov }
12147d05a86SMax Filippov 
122e264d29dSEduardo Habkost DEFINE_MACHINE("sim", xtensa_sim_machine_init)
123