xref: /qemu/hw/xtensa/sim.c (revision 4771d756f46219762477aaeaaef9bd215e3d5c60)
147d05a86SMax Filippov /*
247d05a86SMax Filippov  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
347d05a86SMax Filippov  * All rights reserved.
447d05a86SMax Filippov  *
547d05a86SMax Filippov  * Redistribution and use in source and binary forms, with or without
647d05a86SMax Filippov  * modification, are permitted provided that the following conditions are met:
747d05a86SMax Filippov  *     * Redistributions of source code must retain the above copyright
847d05a86SMax Filippov  *       notice, this list of conditions and the following disclaimer.
947d05a86SMax Filippov  *     * Redistributions in binary form must reproduce the above copyright
1047d05a86SMax Filippov  *       notice, this list of conditions and the following disclaimer in the
1147d05a86SMax Filippov  *       documentation and/or other materials provided with the distribution.
1247d05a86SMax Filippov  *     * Neither the name of the Open Source and Linux Lab nor the
1347d05a86SMax Filippov  *       names of its contributors may be used to endorse or promote products
1447d05a86SMax Filippov  *       derived from this software without specific prior written permission.
1547d05a86SMax Filippov  *
1647d05a86SMax Filippov  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1747d05a86SMax Filippov  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1847d05a86SMax Filippov  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1947d05a86SMax Filippov  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
2047d05a86SMax Filippov  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2147d05a86SMax Filippov  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2247d05a86SMax Filippov  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
2347d05a86SMax Filippov  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2447d05a86SMax Filippov  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2547d05a86SMax Filippov  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2647d05a86SMax Filippov  */
2747d05a86SMax Filippov 
2809aae23dSPeter Maydell #include "qemu/osdep.h"
29da34e65cSMarkus Armbruster #include "qapi/error.h"
30*4771d756SPaolo Bonzini #include "qemu-common.h"
31*4771d756SPaolo Bonzini #include "cpu.h"
329c17d615SPaolo Bonzini #include "sysemu/sysemu.h"
3383c9f4caSPaolo Bonzini #include "hw/boards.h"
3483c9f4caSPaolo Bonzini #include "hw/loader.h"
3547d05a86SMax Filippov #include "elf.h"
36022c62cbSPaolo Bonzini #include "exec/memory.h"
37022c62cbSPaolo Bonzini #include "exec/address-spaces.h"
388488ab02SMax Filippov #include "qemu/error-report.h"
3947d05a86SMax Filippov 
4000b941e5SAndreas Färber static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
4147d05a86SMax Filippov {
4200b941e5SAndreas Färber     XtensaCPU *cpu = opaque;
4300b941e5SAndreas Färber 
4400b941e5SAndreas Färber     return cpu_get_phys_page_debug(CPU(cpu), addr);
4547d05a86SMax Filippov }
4647d05a86SMax Filippov 
4711e7bfd7SAndreas Färber static void sim_reset(void *opaque)
4847d05a86SMax Filippov {
4911e7bfd7SAndreas Färber     XtensaCPU *cpu = opaque;
5011e7bfd7SAndreas Färber 
5111e7bfd7SAndreas Färber     cpu_reset(CPU(cpu));
5247d05a86SMax Filippov }
5347d05a86SMax Filippov 
543ef96221SMarcel Apfelbaum static void xtensa_sim_init(MachineState *machine)
5547d05a86SMax Filippov {
5606d26274SAndreas Färber     XtensaCPU *cpu = NULL;
575bfcb36eSAndreas Färber     CPUXtensaState *env = NULL;
5847d05a86SMax Filippov     MemoryRegion *ram, *rom;
593ef96221SMarcel Apfelbaum     ram_addr_t ram_size = machine->ram_size;
603ef96221SMarcel Apfelbaum     const char *cpu_model = machine->cpu_model;
613ef96221SMarcel Apfelbaum     const char *kernel_filename = machine->kernel_filename;
6247d05a86SMax Filippov     int n;
6347d05a86SMax Filippov 
6450cd7214SMax Filippov     if (!cpu_model) {
6550cd7214SMax Filippov         cpu_model = XTENSA_DEFAULT_CPU_MODEL;
6650cd7214SMax Filippov     }
6750cd7214SMax Filippov 
6847d05a86SMax Filippov     for (n = 0; n < smp_cpus; n++) {
6906d26274SAndreas Färber         cpu = cpu_xtensa_init(cpu_model);
7006d26274SAndreas Färber         if (cpu == NULL) {
71ebbb419aSGonglei             error_report("unable to find CPU definition '%s'",
728488ab02SMax Filippov                          cpu_model);
738488ab02SMax Filippov             exit(EXIT_FAILURE);
7447d05a86SMax Filippov         }
7506d26274SAndreas Färber         env = &cpu->env;
7606d26274SAndreas Färber 
7747d05a86SMax Filippov         env->sregs[PRID] = n;
7811e7bfd7SAndreas Färber         qemu_register_reset(sim_reset, cpu);
7947d05a86SMax Filippov         /* Need MMU initialized prior to ELF loading,
8047d05a86SMax Filippov          * so that ELF gets loaded into virtual addresses
8147d05a86SMax Filippov          */
8211e7bfd7SAndreas Färber         sim_reset(cpu);
8347d05a86SMax Filippov     }
8447d05a86SMax Filippov 
8547d05a86SMax Filippov     ram = g_malloc(sizeof(*ram));
86f8ed85acSMarkus Armbruster     memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size, &error_fatal);
87c5705a77SAvi Kivity     vmstate_register_ram_global(ram);
8847d05a86SMax Filippov     memory_region_add_subregion(get_system_memory(), 0, ram);
8947d05a86SMax Filippov 
9047d05a86SMax Filippov     rom = g_malloc(sizeof(*rom));
91f8ed85acSMarkus Armbruster     memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000, &error_fatal);
92c5705a77SAvi Kivity     vmstate_register_ram_global(rom);
9347d05a86SMax Filippov     memory_region_add_subregion(get_system_memory(), 0xfe000000, rom);
9447d05a86SMax Filippov 
9547d05a86SMax Filippov     if (kernel_filename) {
9647d05a86SMax Filippov         uint64_t elf_entry;
9747d05a86SMax Filippov         uint64_t elf_lowaddr;
9847d05a86SMax Filippov #ifdef TARGET_WORDS_BIGENDIAN
9900b941e5SAndreas Färber         int success = load_elf(kernel_filename, translate_phys_addr, cpu,
1007ef295eaSPeter Crosthwaite                 &elf_entry, &elf_lowaddr, NULL, 1, EM_XTENSA, 0, 0);
10147d05a86SMax Filippov #else
10200b941e5SAndreas Färber         int success = load_elf(kernel_filename, translate_phys_addr, cpu,
1037ef295eaSPeter Crosthwaite                 &elf_entry, &elf_lowaddr, NULL, 0, EM_XTENSA, 0, 0);
10447d05a86SMax Filippov #endif
10547d05a86SMax Filippov         if (success > 0) {
10647d05a86SMax Filippov             env->pc = elf_entry;
10747d05a86SMax Filippov         }
10847d05a86SMax Filippov     }
10947d05a86SMax Filippov }
11047d05a86SMax Filippov 
111e264d29dSEduardo Habkost static void xtensa_sim_machine_init(MachineClass *mc)
11247d05a86SMax Filippov {
113e264d29dSEduardo Habkost     mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";
114e264d29dSEduardo Habkost     mc->is_default = true;
115e264d29dSEduardo Habkost     mc->init = xtensa_sim_init;
116e264d29dSEduardo Habkost     mc->max_cpus = 4;
11747d05a86SMax Filippov }
11847d05a86SMax Filippov 
119e264d29dSEduardo Habkost DEFINE_MACHINE("sim", xtensa_sim_machine_init)
120