1854123bfSCédric Le Goater /*
2854123bfSCédric Le Goater * ASPEED Watchdog Controller
3854123bfSCédric Le Goater *
4854123bfSCédric Le Goater * Copyright (C) 2016-2017 IBM Corp.
5854123bfSCédric Le Goater *
6854123bfSCédric Le Goater * This code is licensed under the GPL version 2 or later. See the
7854123bfSCédric Le Goater * COPYING file in the top-level directory.
8854123bfSCédric Le Goater */
9854123bfSCédric Le Goater
10854123bfSCédric Le Goater #include "qemu/osdep.h"
11f55d613bSAndrew Jeffery
12f55d613bSAndrew Jeffery #include "qapi/error.h"
13854123bfSCédric Le Goater #include "qemu/log.h"
140b8fa32fSMarkus Armbruster #include "qemu/module.h"
15854123bfSCédric Le Goater #include "qemu/timer.h"
1632cad1ffSPhilippe Mathieu-Daudé #include "system/watchdog.h"
17a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h"
18f55d613bSAndrew Jeffery #include "hw/sysbus.h"
19854123bfSCédric Le Goater #include "hw/watchdog/wdt_aspeed.h"
20d6454270SMarkus Armbruster #include "migration/vmstate.h"
21a8eb9a43SCédric Le Goater #include "trace.h"
22854123bfSCédric Le Goater
23854123bfSCédric Le Goater #define WDT_STATUS (0x00 / 4)
24854123bfSCédric Le Goater #define WDT_RELOAD_VALUE (0x04 / 4)
25854123bfSCédric Le Goater #define WDT_RESTART (0x08 / 4)
26854123bfSCédric Le Goater #define WDT_CTRL (0x0C / 4)
27854123bfSCédric Le Goater #define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
28854123bfSCédric Le Goater #define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
29854123bfSCédric Le Goater #define WDT_CTRL_1MHZ_CLK BIT(4)
30854123bfSCédric Le Goater #define WDT_CTRL_WDT_EXT BIT(3)
31854123bfSCédric Le Goater #define WDT_CTRL_WDT_INTR BIT(2)
32854123bfSCédric Le Goater #define WDT_CTRL_RESET_SYSTEM BIT(1)
33854123bfSCédric Le Goater #define WDT_CTRL_ENABLE BIT(0)
34f55d613bSAndrew Jeffery #define WDT_RESET_WIDTH (0x18 / 4)
35f55d613bSAndrew Jeffery #define WDT_RESET_WIDTH_ACTIVE_HIGH BIT(31)
36f55d613bSAndrew Jeffery #define WDT_POLARITY_MASK (0xFF << 24)
37f55d613bSAndrew Jeffery #define WDT_ACTIVE_HIGH_MAGIC (0xA5 << 24)
38f55d613bSAndrew Jeffery #define WDT_ACTIVE_LOW_MAGIC (0x5A << 24)
39f55d613bSAndrew Jeffery #define WDT_RESET_WIDTH_PUSH_PULL BIT(30)
40f55d613bSAndrew Jeffery #define WDT_DRIVE_TYPE_MASK (0xFF << 24)
41f55d613bSAndrew Jeffery #define WDT_PUSH_PULL_MAGIC (0xA8 << 24)
42f55d613bSAndrew Jeffery #define WDT_OPEN_DRAIN_MAGIC (0x8A << 24)
436b2b2a70SJoel Stanley #define WDT_RESET_MASK1 (0x1c / 4)
44f8ad8958SPhilippe Mathieu-Daudé #define WDT_RESET_MASK2 (0x20 / 4)
45f8ad8958SPhilippe Mathieu-Daudé
46f8ad8958SPhilippe Mathieu-Daudé #define WDT_SW_RESET_CTRL (0x24 / 4)
47f8ad8958SPhilippe Mathieu-Daudé #define WDT_SW_RESET_MASK1 (0x28 / 4)
48f8ad8958SPhilippe Mathieu-Daudé #define WDT_SW_RESET_MASK2 (0x2c / 4)
49854123bfSCédric Le Goater
50854123bfSCédric Le Goater #define WDT_TIMEOUT_STATUS (0x10 / 4)
51854123bfSCédric Le Goater #define WDT_TIMEOUT_CLEAR (0x14 / 4)
52854123bfSCédric Le Goater
53854123bfSCédric Le Goater #define WDT_RESTART_MAGIC 0x4755
54a22acbb2SJamin Lin #define WDT_SW_RESET_ENABLE 0xAEEDF123
55854123bfSCédric Le Goater
566b2b2a70SJoel Stanley #define AST2600_SCU_RESET_CONTROL1 (0x40 / 4)
573059c2f5SJoel Stanley #define SCU_RESET_CONTROL1 (0x04 / 4)
583059c2f5SJoel Stanley #define SCU_RESET_SDRAM BIT(0)
593059c2f5SJoel Stanley
aspeed_wdt_is_soc_reset_mode(const AspeedWDTState * s)60a22acbb2SJamin Lin static bool aspeed_wdt_is_soc_reset_mode(const AspeedWDTState *s)
61a22acbb2SJamin Lin {
62a22acbb2SJamin Lin uint32_t mode;
63a22acbb2SJamin Lin
64a22acbb2SJamin Lin mode = extract32(s->regs[WDT_CTRL], 5, 2);
65a22acbb2SJamin Lin return (mode == WDT_CTRL_RESET_MODE_SOC);
66a22acbb2SJamin Lin }
67a22acbb2SJamin Lin
aspeed_wdt_is_enabled(const AspeedWDTState * s)68854123bfSCédric Le Goater static bool aspeed_wdt_is_enabled(const AspeedWDTState *s)
69854123bfSCédric Le Goater {
70854123bfSCédric Le Goater return s->regs[WDT_CTRL] & WDT_CTRL_ENABLE;
71854123bfSCédric Le Goater }
72854123bfSCédric Le Goater
aspeed_wdt_read(void * opaque,hwaddr offset,unsigned size)73854123bfSCédric Le Goater static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size)
74854123bfSCédric Le Goater {
75854123bfSCédric Le Goater AspeedWDTState *s = ASPEED_WDT(opaque);
76854123bfSCédric Le Goater
77a8eb9a43SCédric Le Goater trace_aspeed_wdt_read(offset, size);
78a8eb9a43SCédric Le Goater
79854123bfSCédric Le Goater offset >>= 2;
80854123bfSCédric Le Goater
81854123bfSCédric Le Goater switch (offset) {
82854123bfSCédric Le Goater case WDT_STATUS:
83854123bfSCédric Le Goater return s->regs[WDT_STATUS];
84854123bfSCédric Le Goater case WDT_RELOAD_VALUE:
85854123bfSCédric Le Goater return s->regs[WDT_RELOAD_VALUE];
86854123bfSCédric Le Goater case WDT_RESTART:
87854123bfSCédric Le Goater qemu_log_mask(LOG_GUEST_ERROR,
88854123bfSCédric Le Goater "%s: read from write-only reg at offset 0x%"
89854123bfSCédric Le Goater HWADDR_PRIx "\n", __func__, offset);
90854123bfSCédric Le Goater return 0;
91854123bfSCédric Le Goater case WDT_CTRL:
92854123bfSCédric Le Goater return s->regs[WDT_CTRL];
93f55d613bSAndrew Jeffery case WDT_RESET_WIDTH:
94f55d613bSAndrew Jeffery return s->regs[WDT_RESET_WIDTH];
956b2b2a70SJoel Stanley case WDT_RESET_MASK1:
966b2b2a70SJoel Stanley return s->regs[WDT_RESET_MASK1];
97854123bfSCédric Le Goater case WDT_TIMEOUT_STATUS:
98854123bfSCédric Le Goater case WDT_TIMEOUT_CLEAR:
99f8ad8958SPhilippe Mathieu-Daudé case WDT_RESET_MASK2:
100f8ad8958SPhilippe Mathieu-Daudé case WDT_SW_RESET_CTRL:
101f8ad8958SPhilippe Mathieu-Daudé case WDT_SW_RESET_MASK1:
102f8ad8958SPhilippe Mathieu-Daudé case WDT_SW_RESET_MASK2:
103854123bfSCédric Le Goater qemu_log_mask(LOG_UNIMP,
104854123bfSCédric Le Goater "%s: uninmplemented read at offset 0x%" HWADDR_PRIx "\n",
105854123bfSCédric Le Goater __func__, offset);
106854123bfSCédric Le Goater return 0;
107854123bfSCédric Le Goater default:
108854123bfSCédric Le Goater qemu_log_mask(LOG_GUEST_ERROR,
109854123bfSCédric Le Goater "%s: Out-of-bounds read at offset 0x%" HWADDR_PRIx "\n",
110854123bfSCédric Le Goater __func__, offset);
111854123bfSCédric Le Goater return 0;
112854123bfSCédric Le Goater }
113854123bfSCédric Le Goater
114854123bfSCédric Le Goater }
115854123bfSCédric Le Goater
aspeed_wdt_reload(AspeedWDTState * s)11628c80f15SJoel Stanley static void aspeed_wdt_reload(AspeedWDTState *s)
117854123bfSCédric Le Goater {
118f958537aSCédric Le Goater uint64_t reload;
119854123bfSCédric Le Goater
12028c80f15SJoel Stanley if (!(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK)) {
121854123bfSCédric Le Goater reload = muldiv64(s->regs[WDT_RELOAD_VALUE], NANOSECONDS_PER_SECOND,
122854123bfSCédric Le Goater s->pclk_freq);
123854123bfSCédric Le Goater } else {
124f958537aSCédric Le Goater reload = s->regs[WDT_RELOAD_VALUE] * 1000ULL;
125854123bfSCédric Le Goater }
126854123bfSCédric Le Goater
127854123bfSCédric Le Goater if (aspeed_wdt_is_enabled(s)) {
128854123bfSCédric Le Goater timer_mod(s->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + reload);
129854123bfSCédric Le Goater }
130854123bfSCédric Le Goater }
131854123bfSCédric Le Goater
aspeed_wdt_reload_1mhz(AspeedWDTState * s)13228c80f15SJoel Stanley static void aspeed_wdt_reload_1mhz(AspeedWDTState *s)
13328c80f15SJoel Stanley {
13428c80f15SJoel Stanley uint64_t reload = s->regs[WDT_RELOAD_VALUE] * 1000ULL;
13528c80f15SJoel Stanley
13628c80f15SJoel Stanley if (aspeed_wdt_is_enabled(s)) {
13728c80f15SJoel Stanley timer_mod(s->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + reload);
13828c80f15SJoel Stanley }
13928c80f15SJoel Stanley }
14028c80f15SJoel Stanley
aspeed_2400_sanitize_ctrl(uint64_t data)141709098fdSAndrew Jeffery static uint64_t aspeed_2400_sanitize_ctrl(uint64_t data)
142709098fdSAndrew Jeffery {
143709098fdSAndrew Jeffery return data & 0xffff;
144709098fdSAndrew Jeffery }
145709098fdSAndrew Jeffery
aspeed_2500_sanitize_ctrl(uint64_t data)146709098fdSAndrew Jeffery static uint64_t aspeed_2500_sanitize_ctrl(uint64_t data)
147709098fdSAndrew Jeffery {
148709098fdSAndrew Jeffery return (data & ~(0xfUL << 8)) | WDT_CTRL_1MHZ_CLK;
149709098fdSAndrew Jeffery }
150709098fdSAndrew Jeffery
aspeed_2600_sanitize_ctrl(uint64_t data)151709098fdSAndrew Jeffery static uint64_t aspeed_2600_sanitize_ctrl(uint64_t data)
152709098fdSAndrew Jeffery {
153709098fdSAndrew Jeffery return data & ~(0x7UL << 7);
154709098fdSAndrew Jeffery }
15528c80f15SJoel Stanley
aspeed_wdt_write(void * opaque,hwaddr offset,uint64_t data,unsigned size)156854123bfSCédric Le Goater static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data,
157854123bfSCédric Le Goater unsigned size)
158854123bfSCédric Le Goater {
159854123bfSCédric Le Goater AspeedWDTState *s = ASPEED_WDT(opaque);
1606112bd6dSCédric Le Goater AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(s);
161709098fdSAndrew Jeffery bool enable;
162854123bfSCédric Le Goater
163a8eb9a43SCédric Le Goater trace_aspeed_wdt_write(offset, size, data);
164a8eb9a43SCédric Le Goater
165854123bfSCédric Le Goater offset >>= 2;
166854123bfSCédric Le Goater
167854123bfSCédric Le Goater switch (offset) {
168854123bfSCédric Le Goater case WDT_STATUS:
169854123bfSCédric Le Goater qemu_log_mask(LOG_GUEST_ERROR,
170854123bfSCédric Le Goater "%s: write to read-only reg at offset 0x%"
171854123bfSCédric Le Goater HWADDR_PRIx "\n", __func__, offset);
172854123bfSCédric Le Goater break;
173854123bfSCédric Le Goater case WDT_RELOAD_VALUE:
174854123bfSCédric Le Goater s->regs[WDT_RELOAD_VALUE] = data;
175854123bfSCédric Le Goater break;
176854123bfSCédric Le Goater case WDT_RESTART:
177854123bfSCédric Le Goater if ((data & 0xFFFF) == WDT_RESTART_MAGIC) {
178854123bfSCédric Le Goater s->regs[WDT_STATUS] = s->regs[WDT_RELOAD_VALUE];
17928c80f15SJoel Stanley awc->wdt_reload(s);
180854123bfSCédric Le Goater }
181854123bfSCédric Le Goater break;
182854123bfSCédric Le Goater case WDT_CTRL:
183709098fdSAndrew Jeffery data = awc->sanitize_ctrl(data);
184709098fdSAndrew Jeffery enable = data & WDT_CTRL_ENABLE;
185854123bfSCédric Le Goater if (enable && !aspeed_wdt_is_enabled(s)) {
186854123bfSCédric Le Goater s->regs[WDT_CTRL] = data;
18728c80f15SJoel Stanley awc->wdt_reload(s);
188854123bfSCédric Le Goater } else if (!enable && aspeed_wdt_is_enabled(s)) {
189854123bfSCédric Le Goater s->regs[WDT_CTRL] = data;
190854123bfSCédric Le Goater timer_del(s->timer);
19174b67e1fSAndrew Jeffery } else {
19274b67e1fSAndrew Jeffery s->regs[WDT_CTRL] = data;
193854123bfSCédric Le Goater }
194854123bfSCédric Le Goater break;
195f55d613bSAndrew Jeffery case WDT_RESET_WIDTH:
1966112bd6dSCédric Le Goater if (awc->reset_pulse) {
1976112bd6dSCédric Le Goater awc->reset_pulse(s, data & WDT_POLARITY_MASK);
198f55d613bSAndrew Jeffery }
1996112bd6dSCédric Le Goater s->regs[WDT_RESET_WIDTH] &= ~awc->ext_pulse_width_mask;
2006112bd6dSCédric Le Goater s->regs[WDT_RESET_WIDTH] |= data & awc->ext_pulse_width_mask;
201f55d613bSAndrew Jeffery break;
2026112bd6dSCédric Le Goater
2036b2b2a70SJoel Stanley case WDT_RESET_MASK1:
2046b2b2a70SJoel Stanley /* TODO: implement */
2056b2b2a70SJoel Stanley s->regs[WDT_RESET_MASK1] = data;
2066b2b2a70SJoel Stanley break;
2076b2b2a70SJoel Stanley
208854123bfSCédric Le Goater case WDT_TIMEOUT_STATUS:
209854123bfSCédric Le Goater case WDT_TIMEOUT_CLEAR:
210f8ad8958SPhilippe Mathieu-Daudé case WDT_RESET_MASK2:
211f8ad8958SPhilippe Mathieu-Daudé case WDT_SW_RESET_MASK1:
212f8ad8958SPhilippe Mathieu-Daudé case WDT_SW_RESET_MASK2:
213854123bfSCédric Le Goater qemu_log_mask(LOG_UNIMP,
214854123bfSCédric Le Goater "%s: uninmplemented write at offset 0x%" HWADDR_PRIx "\n",
215854123bfSCédric Le Goater __func__, offset);
216854123bfSCédric Le Goater break;
217a22acbb2SJamin Lin case WDT_SW_RESET_CTRL:
218a22acbb2SJamin Lin if (aspeed_wdt_is_soc_reset_mode(s) &&
219a22acbb2SJamin Lin (data == WDT_SW_RESET_ENABLE)) {
220a22acbb2SJamin Lin watchdog_perform_action();
221a22acbb2SJamin Lin }
222a22acbb2SJamin Lin break;
223854123bfSCédric Le Goater default:
224854123bfSCédric Le Goater qemu_log_mask(LOG_GUEST_ERROR,
225854123bfSCédric Le Goater "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n",
226854123bfSCédric Le Goater __func__, offset);
227854123bfSCédric Le Goater }
228854123bfSCédric Le Goater }
229854123bfSCédric Le Goater
230854123bfSCédric Le Goater static const VMStateDescription vmstate_aspeed_wdt = {
231854123bfSCédric Le Goater .name = "vmstate_aspeed_wdt",
232854123bfSCédric Le Goater .version_id = 0,
233854123bfSCédric Le Goater .minimum_version_id = 0,
23445bc669eSRichard Henderson .fields = (const VMStateField[]) {
235854123bfSCédric Le Goater VMSTATE_TIMER_PTR(timer, AspeedWDTState),
236854123bfSCédric Le Goater VMSTATE_UINT32_ARRAY(regs, AspeedWDTState, ASPEED_WDT_REGS_MAX),
237854123bfSCédric Le Goater VMSTATE_END_OF_LIST()
238854123bfSCédric Le Goater }
239854123bfSCédric Le Goater };
240854123bfSCédric Le Goater
241854123bfSCédric Le Goater static const MemoryRegionOps aspeed_wdt_ops = {
242854123bfSCédric Le Goater .read = aspeed_wdt_read,
243854123bfSCédric Le Goater .write = aspeed_wdt_write,
244854123bfSCédric Le Goater .endianness = DEVICE_LITTLE_ENDIAN,
245854123bfSCédric Le Goater .valid.min_access_size = 4,
246854123bfSCédric Le Goater .valid.max_access_size = 4,
247854123bfSCédric Le Goater .valid.unaligned = false,
248854123bfSCédric Le Goater };
249854123bfSCédric Le Goater
aspeed_wdt_reset(DeviceState * dev)250854123bfSCédric Le Goater static void aspeed_wdt_reset(DeviceState *dev)
251854123bfSCédric Le Goater {
252854123bfSCédric Le Goater AspeedWDTState *s = ASPEED_WDT(dev);
253709098fdSAndrew Jeffery AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(s);
254854123bfSCédric Le Goater
255018134abSSteven Lee s->regs[WDT_STATUS] = awc->default_status;
256018134abSSteven Lee s->regs[WDT_RELOAD_VALUE] = awc->default_reload_value;
257854123bfSCédric Le Goater s->regs[WDT_RESTART] = 0;
258709098fdSAndrew Jeffery s->regs[WDT_CTRL] = awc->sanitize_ctrl(0);
259f55d613bSAndrew Jeffery s->regs[WDT_RESET_WIDTH] = 0xFF;
260854123bfSCédric Le Goater
261854123bfSCédric Le Goater timer_del(s->timer);
262854123bfSCédric Le Goater }
263854123bfSCédric Le Goater
aspeed_wdt_timer_expired(void * dev)264854123bfSCédric Le Goater static void aspeed_wdt_timer_expired(void *dev)
265854123bfSCédric Le Goater {
266854123bfSCédric Le Goater AspeedWDTState *s = ASPEED_WDT(dev);
2676112bd6dSCédric Le Goater uint32_t reset_ctrl_reg = ASPEED_WDT_GET_CLASS(s)->reset_ctrl_reg;
268854123bfSCédric Le Goater
2693059c2f5SJoel Stanley /* Do not reset on SDRAM controller reset */
2706112bd6dSCédric Le Goater if (s->scu->regs[reset_ctrl_reg] & SCU_RESET_SDRAM) {
2713059c2f5SJoel Stanley timer_del(s->timer);
2723059c2f5SJoel Stanley s->regs[WDT_CTRL] = 0;
2733059c2f5SJoel Stanley return;
2743059c2f5SJoel Stanley }
2753059c2f5SJoel Stanley
276aabf1de4SJoel Stanley qemu_log_mask(CPU_LOG_RESET, "Watchdog timer %" HWADDR_PRIx " expired.\n",
277aabf1de4SJoel Stanley s->iomem.addr);
278854123bfSCédric Le Goater watchdog_perform_action();
279854123bfSCédric Le Goater timer_del(s->timer);
280854123bfSCédric Le Goater }
281854123bfSCédric Le Goater
282854123bfSCédric Le Goater #define PCLK_HZ 24000000
283854123bfSCédric Le Goater
aspeed_wdt_realize(DeviceState * dev,Error ** errp)284854123bfSCédric Le Goater static void aspeed_wdt_realize(DeviceState *dev, Error **errp)
285854123bfSCédric Le Goater {
286854123bfSCédric Le Goater SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
287854123bfSCédric Le Goater AspeedWDTState *s = ASPEED_WDT(dev);
2884ef24766SPhilippe Mathieu-Daudé AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(dev);
2893059c2f5SJoel Stanley
2902ec11f23SCédric Le Goater assert(s->scu);
291854123bfSCédric Le Goater
292854123bfSCédric Le Goater s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, aspeed_wdt_timer_expired, dev);
293854123bfSCédric Le Goater
294668f29e1SJamin Lin /*
295668f29e1SJamin Lin * FIXME: This setting should be derived from the SCU hw strapping
296854123bfSCédric Le Goater * register SCU70
297854123bfSCédric Le Goater */
298854123bfSCédric Le Goater s->pclk_freq = PCLK_HZ;
299854123bfSCédric Le Goater
300854123bfSCédric Le Goater memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_wdt_ops, s,
3014ef24766SPhilippe Mathieu-Daudé TYPE_ASPEED_WDT, awc->iosize);
302854123bfSCédric Le Goater sysbus_init_mmio(sbd, &s->iomem);
303854123bfSCédric Le Goater }
304854123bfSCédric Le Goater
30589996947SRichard Henderson static const Property aspeed_wdt_properties[] = {
3062ec11f23SCédric Le Goater DEFINE_PROP_LINK("scu", AspeedWDTState, scu, TYPE_ASPEED_SCU,
3072ec11f23SCédric Le Goater AspeedSCUState *),
3082ec11f23SCédric Le Goater };
3092ec11f23SCédric Le Goater
aspeed_wdt_class_init(ObjectClass * klass,const void * data)310*12d1a768SPhilippe Mathieu-Daudé static void aspeed_wdt_class_init(ObjectClass *klass, const void *data)
311854123bfSCédric Le Goater {
312854123bfSCédric Le Goater DeviceClass *dc = DEVICE_CLASS(klass);
313854123bfSCédric Le Goater
3146112bd6dSCédric Le Goater dc->desc = "ASPEED Watchdog Controller";
315854123bfSCédric Le Goater dc->realize = aspeed_wdt_realize;
316e3d08143SPeter Maydell device_class_set_legacy_reset(dc, aspeed_wdt_reset);
317b10cb627SPaolo Bonzini set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories);
318854123bfSCédric Le Goater dc->vmsd = &vmstate_aspeed_wdt;
3194f67d30bSMarc-André Lureau device_class_set_props(dc, aspeed_wdt_properties);
320b10cb627SPaolo Bonzini dc->desc = "Aspeed watchdog device";
321854123bfSCédric Le Goater }
322854123bfSCédric Le Goater
323854123bfSCédric Le Goater static const TypeInfo aspeed_wdt_info = {
324854123bfSCédric Le Goater .parent = TYPE_SYS_BUS_DEVICE,
325854123bfSCédric Le Goater .name = TYPE_ASPEED_WDT,
326854123bfSCédric Le Goater .instance_size = sizeof(AspeedWDTState),
327854123bfSCédric Le Goater .class_init = aspeed_wdt_class_init,
3286112bd6dSCédric Le Goater .class_size = sizeof(AspeedWDTClass),
3296112bd6dSCédric Le Goater .abstract = true,
3306112bd6dSCédric Le Goater };
3316112bd6dSCédric Le Goater
aspeed_2400_wdt_class_init(ObjectClass * klass,const void * data)332*12d1a768SPhilippe Mathieu-Daudé static void aspeed_2400_wdt_class_init(ObjectClass *klass, const void *data)
3336112bd6dSCédric Le Goater {
3346112bd6dSCédric Le Goater DeviceClass *dc = DEVICE_CLASS(klass);
3356112bd6dSCédric Le Goater AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass);
3366112bd6dSCédric Le Goater
3376112bd6dSCédric Le Goater dc->desc = "ASPEED 2400 Watchdog Controller";
3386fdb4381SPhilippe Mathieu-Daudé awc->iosize = 0x20;
3396112bd6dSCédric Le Goater awc->ext_pulse_width_mask = 0xff;
3406112bd6dSCédric Le Goater awc->reset_ctrl_reg = SCU_RESET_CONTROL1;
34128c80f15SJoel Stanley awc->wdt_reload = aspeed_wdt_reload;
342709098fdSAndrew Jeffery awc->sanitize_ctrl = aspeed_2400_sanitize_ctrl;
343018134abSSteven Lee awc->default_status = 0x03EF1480;
344018134abSSteven Lee awc->default_reload_value = 0x03EF1480;
3456112bd6dSCédric Le Goater }
3466112bd6dSCédric Le Goater
3476112bd6dSCédric Le Goater static const TypeInfo aspeed_2400_wdt_info = {
3486112bd6dSCédric Le Goater .name = TYPE_ASPEED_2400_WDT,
3496112bd6dSCédric Le Goater .parent = TYPE_ASPEED_WDT,
3506112bd6dSCédric Le Goater .instance_size = sizeof(AspeedWDTState),
3516112bd6dSCédric Le Goater .class_init = aspeed_2400_wdt_class_init,
3526112bd6dSCédric Le Goater };
3536112bd6dSCédric Le Goater
aspeed_2500_wdt_reset_pulse(AspeedWDTState * s,uint32_t property)3546112bd6dSCédric Le Goater static void aspeed_2500_wdt_reset_pulse(AspeedWDTState *s, uint32_t property)
3556112bd6dSCédric Le Goater {
3566112bd6dSCédric Le Goater if (property) {
3576112bd6dSCédric Le Goater if (property == WDT_ACTIVE_HIGH_MAGIC) {
3586112bd6dSCédric Le Goater s->regs[WDT_RESET_WIDTH] |= WDT_RESET_WIDTH_ACTIVE_HIGH;
3596112bd6dSCédric Le Goater } else if (property == WDT_ACTIVE_LOW_MAGIC) {
3606112bd6dSCédric Le Goater s->regs[WDT_RESET_WIDTH] &= ~WDT_RESET_WIDTH_ACTIVE_HIGH;
3616112bd6dSCédric Le Goater } else if (property == WDT_PUSH_PULL_MAGIC) {
3626112bd6dSCédric Le Goater s->regs[WDT_RESET_WIDTH] |= WDT_RESET_WIDTH_PUSH_PULL;
3636112bd6dSCédric Le Goater } else if (property == WDT_OPEN_DRAIN_MAGIC) {
3646112bd6dSCédric Le Goater s->regs[WDT_RESET_WIDTH] &= ~WDT_RESET_WIDTH_PUSH_PULL;
3656112bd6dSCédric Le Goater }
3666112bd6dSCédric Le Goater }
3676112bd6dSCédric Le Goater }
3686112bd6dSCédric Le Goater
aspeed_2500_wdt_class_init(ObjectClass * klass,const void * data)369*12d1a768SPhilippe Mathieu-Daudé static void aspeed_2500_wdt_class_init(ObjectClass *klass, const void *data)
3706112bd6dSCédric Le Goater {
3716112bd6dSCédric Le Goater DeviceClass *dc = DEVICE_CLASS(klass);
3726112bd6dSCédric Le Goater AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass);
3736112bd6dSCédric Le Goater
3746112bd6dSCédric Le Goater dc->desc = "ASPEED 2500 Watchdog Controller";
3756fdb4381SPhilippe Mathieu-Daudé awc->iosize = 0x20;
3766112bd6dSCédric Le Goater awc->ext_pulse_width_mask = 0xfffff;
3776112bd6dSCédric Le Goater awc->reset_ctrl_reg = SCU_RESET_CONTROL1;
3786112bd6dSCédric Le Goater awc->reset_pulse = aspeed_2500_wdt_reset_pulse;
37928c80f15SJoel Stanley awc->wdt_reload = aspeed_wdt_reload_1mhz;
380709098fdSAndrew Jeffery awc->sanitize_ctrl = aspeed_2500_sanitize_ctrl;
381018134abSSteven Lee awc->default_status = 0x014FB180;
382018134abSSteven Lee awc->default_reload_value = 0x014FB180;
3836112bd6dSCédric Le Goater }
3846112bd6dSCédric Le Goater
3856112bd6dSCédric Le Goater static const TypeInfo aspeed_2500_wdt_info = {
3866112bd6dSCédric Le Goater .name = TYPE_ASPEED_2500_WDT,
3876112bd6dSCédric Le Goater .parent = TYPE_ASPEED_WDT,
3886112bd6dSCédric Le Goater .instance_size = sizeof(AspeedWDTState),
3896112bd6dSCédric Le Goater .class_init = aspeed_2500_wdt_class_init,
390854123bfSCédric Le Goater };
391854123bfSCédric Le Goater
aspeed_2600_wdt_class_init(ObjectClass * klass,const void * data)392*12d1a768SPhilippe Mathieu-Daudé static void aspeed_2600_wdt_class_init(ObjectClass *klass, const void *data)
3936b2b2a70SJoel Stanley {
3946b2b2a70SJoel Stanley DeviceClass *dc = DEVICE_CLASS(klass);
3956b2b2a70SJoel Stanley AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass);
3966b2b2a70SJoel Stanley
3976b2b2a70SJoel Stanley dc->desc = "ASPEED 2600 Watchdog Controller";
3986fdb4381SPhilippe Mathieu-Daudé awc->iosize = 0x40;
3996b2b2a70SJoel Stanley awc->ext_pulse_width_mask = 0xfffff; /* TODO */
4006b2b2a70SJoel Stanley awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1;
4016b2b2a70SJoel Stanley awc->reset_pulse = aspeed_2500_wdt_reset_pulse;
40228c80f15SJoel Stanley awc->wdt_reload = aspeed_wdt_reload_1mhz;
403709098fdSAndrew Jeffery awc->sanitize_ctrl = aspeed_2600_sanitize_ctrl;
404018134abSSteven Lee awc->default_status = 0x014FB180;
405018134abSSteven Lee awc->default_reload_value = 0x014FB180;
4066b2b2a70SJoel Stanley }
4076b2b2a70SJoel Stanley
4086b2b2a70SJoel Stanley static const TypeInfo aspeed_2600_wdt_info = {
4096b2b2a70SJoel Stanley .name = TYPE_ASPEED_2600_WDT,
4106b2b2a70SJoel Stanley .parent = TYPE_ASPEED_WDT,
4116b2b2a70SJoel Stanley .instance_size = sizeof(AspeedWDTState),
4126b2b2a70SJoel Stanley .class_init = aspeed_2600_wdt_class_init,
4136b2b2a70SJoel Stanley };
4146b2b2a70SJoel Stanley
aspeed_1030_wdt_class_init(ObjectClass * klass,const void * data)415*12d1a768SPhilippe Mathieu-Daudé static void aspeed_1030_wdt_class_init(ObjectClass *klass, const void *data)
416e259e01eSSteven Lee {
417e259e01eSSteven Lee DeviceClass *dc = DEVICE_CLASS(klass);
418e259e01eSSteven Lee AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass);
419e259e01eSSteven Lee
420e259e01eSSteven Lee dc->desc = "ASPEED 1030 Watchdog Controller";
4216fdb4381SPhilippe Mathieu-Daudé awc->iosize = 0x80;
422e259e01eSSteven Lee awc->ext_pulse_width_mask = 0xfffff; /* TODO */
423e259e01eSSteven Lee awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1;
424e259e01eSSteven Lee awc->reset_pulse = aspeed_2500_wdt_reset_pulse;
425e259e01eSSteven Lee awc->wdt_reload = aspeed_wdt_reload_1mhz;
426e259e01eSSteven Lee awc->sanitize_ctrl = aspeed_2600_sanitize_ctrl;
427e259e01eSSteven Lee awc->default_status = 0x014FB180;
428e259e01eSSteven Lee awc->default_reload_value = 0x014FB180;
429e259e01eSSteven Lee }
430e259e01eSSteven Lee
431e259e01eSSteven Lee static const TypeInfo aspeed_1030_wdt_info = {
432e259e01eSSteven Lee .name = TYPE_ASPEED_1030_WDT,
433e259e01eSSteven Lee .parent = TYPE_ASPEED_WDT,
434e259e01eSSteven Lee .instance_size = sizeof(AspeedWDTState),
435e259e01eSSteven Lee .class_init = aspeed_1030_wdt_class_init,
436e259e01eSSteven Lee };
437e259e01eSSteven Lee
aspeed_2700_wdt_class_init(ObjectClass * klass,const void * data)438*12d1a768SPhilippe Mathieu-Daudé static void aspeed_2700_wdt_class_init(ObjectClass *klass, const void *data)
4398db36a4fSJamin Lin {
4408db36a4fSJamin Lin DeviceClass *dc = DEVICE_CLASS(klass);
4418db36a4fSJamin Lin AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass);
4428db36a4fSJamin Lin
4438db36a4fSJamin Lin dc->desc = "ASPEED 2700 Watchdog Controller";
4448db36a4fSJamin Lin awc->iosize = 0x80;
4458db36a4fSJamin Lin awc->ext_pulse_width_mask = 0xfffff; /* TODO */
4468db36a4fSJamin Lin awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1;
4478db36a4fSJamin Lin awc->reset_pulse = aspeed_2500_wdt_reset_pulse;
4488db36a4fSJamin Lin awc->wdt_reload = aspeed_wdt_reload_1mhz;
4498db36a4fSJamin Lin awc->sanitize_ctrl = aspeed_2600_sanitize_ctrl;
4508db36a4fSJamin Lin awc->default_status = 0x014FB180;
4518db36a4fSJamin Lin awc->default_reload_value = 0x014FB180;
4528db36a4fSJamin Lin }
4538db36a4fSJamin Lin
4548db36a4fSJamin Lin static const TypeInfo aspeed_2700_wdt_info = {
4558db36a4fSJamin Lin .name = TYPE_ASPEED_2700_WDT,
4568db36a4fSJamin Lin .parent = TYPE_ASPEED_WDT,
4578db36a4fSJamin Lin .instance_size = sizeof(AspeedWDTState),
4588db36a4fSJamin Lin .class_init = aspeed_2700_wdt_class_init,
4598db36a4fSJamin Lin };
4608db36a4fSJamin Lin
wdt_aspeed_register_types(void)461854123bfSCédric Le Goater static void wdt_aspeed_register_types(void)
462854123bfSCédric Le Goater {
463854123bfSCédric Le Goater type_register_static(&aspeed_wdt_info);
4646112bd6dSCédric Le Goater type_register_static(&aspeed_2400_wdt_info);
4656112bd6dSCédric Le Goater type_register_static(&aspeed_2500_wdt_info);
4666b2b2a70SJoel Stanley type_register_static(&aspeed_2600_wdt_info);
4678db36a4fSJamin Lin type_register_static(&aspeed_2700_wdt_info);
468e259e01eSSteven Lee type_register_static(&aspeed_1030_wdt_info);
469854123bfSCédric Le Goater }
470854123bfSCédric Le Goater
471854123bfSCédric Le Goater type_init(wdt_aspeed_register_types)
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