1 /* 2 * VMApple machine emulation 3 * 4 * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved. 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 * 9 * SPDX-License-Identifier: GPL-2.0-or-later 10 * 11 * VMApple is the device model that the macOS built-in hypervisor called 12 * "Virtualization.framework" exposes to Apple Silicon macOS guests. The 13 * machine model in this file implements the same device model in QEMU, but 14 * does not use any code from Virtualization.Framework. 15 */ 16 17 #include "qemu/osdep.h" 18 #include "qemu/bitops.h" 19 #include "qemu/datadir.h" 20 #include "qemu/error-report.h" 21 #include "qemu/guest-random.h" 22 #include "qemu/help-texts.h" 23 #include "qemu/log.h" 24 #include "qemu/module.h" 25 #include "qemu/option.h" 26 #include "qemu/units.h" 27 #include "monitor/qdev.h" 28 #include "hw/boards.h" 29 #include "hw/irq.h" 30 #include "hw/loader.h" 31 #include "hw/qdev-properties.h" 32 #include "hw/sysbus.h" 33 #include "hw/usb.h" 34 #include "hw/arm/boot.h" 35 #include "hw/arm/primecell.h" 36 #include "hw/char/pl011.h" 37 #include "hw/intc/arm_gic.h" 38 #include "hw/intc/arm_gicv3_common.h" 39 #include "hw/misc/pvpanic.h" 40 #include "hw/pci-host/gpex.h" 41 #include "hw/usb/hcd-xhci-pci.h" 42 #include "hw/virtio/virtio-pci.h" 43 #include "hw/vmapple/vmapple.h" 44 #include "net/net.h" 45 #include "qapi/error.h" 46 #include "qapi/visitor.h" 47 #include "qapi/qapi-visit-common.h" 48 #include "qobject/qlist.h" 49 #include "standard-headers/linux/input.h" 50 #include "system/hvf.h" 51 #include "system/reset.h" 52 #include "system/runstate.h" 53 #include "system/system.h" 54 55 struct VMAppleMachineState { 56 MachineState parent; 57 58 Notifier machine_done; 59 struct arm_boot_info bootinfo; 60 const MemMapEntry *memmap; 61 const int *irqmap; 62 DeviceState *gic; 63 DeviceState *cfg; 64 DeviceState *pvpanic; 65 Notifier powerdown_notifier; 66 PCIBus *bus; 67 MemoryRegion fw_mr; 68 MemoryRegion ecam_alias; 69 uint64_t uuid; 70 }; 71 72 #define TYPE_VMAPPLE_MACHINE MACHINE_TYPE_NAME("vmapple") 73 OBJECT_DECLARE_SIMPLE_TYPE(VMAppleMachineState, VMAPPLE_MACHINE) 74 75 /* Number of external interrupt lines to configure the GIC with */ 76 #define NUM_IRQS 256 77 78 enum { 79 VMAPPLE_FIRMWARE, 80 VMAPPLE_CONFIG, 81 VMAPPLE_MEM, 82 VMAPPLE_GIC_DIST, 83 VMAPPLE_GIC_REDIST, 84 VMAPPLE_UART, 85 VMAPPLE_RTC, 86 VMAPPLE_PCIE, 87 VMAPPLE_PCIE_MMIO, 88 VMAPPLE_PCIE_ECAM, 89 VMAPPLE_GPIO, 90 VMAPPLE_PVPANIC, 91 VMAPPLE_APV_GFX, 92 VMAPPLE_APV_IOSFC, 93 VMAPPLE_AES_1, 94 VMAPPLE_AES_2, 95 VMAPPLE_BDOOR, 96 VMAPPLE_MEMMAP_LAST, 97 }; 98 99 static const MemMapEntry memmap[] = { 100 [VMAPPLE_FIRMWARE] = { 0x00100000, 0x00100000 }, 101 [VMAPPLE_CONFIG] = { 0x00400000, 0x00010000 }, 102 103 [VMAPPLE_GIC_DIST] = { 0x10000000, 0x00010000 }, 104 [VMAPPLE_GIC_REDIST] = { 0x10010000, 0x00400000 }, 105 106 [VMAPPLE_UART] = { 0x20010000, 0x00010000 }, 107 [VMAPPLE_RTC] = { 0x20050000, 0x00001000 }, 108 [VMAPPLE_GPIO] = { 0x20060000, 0x00001000 }, 109 [VMAPPLE_PVPANIC] = { 0x20070000, 0x00000002 }, 110 [VMAPPLE_BDOOR] = { 0x30000000, 0x00200000 }, 111 [VMAPPLE_APV_GFX] = { 0x30200000, 0x00010000 }, 112 [VMAPPLE_APV_IOSFC] = { 0x30210000, 0x00010000 }, 113 [VMAPPLE_AES_1] = { 0x30220000, 0x00004000 }, 114 [VMAPPLE_AES_2] = { 0x30230000, 0x00004000 }, 115 [VMAPPLE_PCIE_ECAM] = { 0x40000000, 0x10000000 }, 116 [VMAPPLE_PCIE_MMIO] = { 0x50000000, 0x1fff0000 }, 117 118 /* Actual RAM size depends on configuration */ 119 [VMAPPLE_MEM] = { 0x70000000ULL, GiB}, 120 }; 121 122 static const int irqmap[] = { 123 [VMAPPLE_UART] = 1, 124 [VMAPPLE_RTC] = 2, 125 [VMAPPLE_GPIO] = 0x5, 126 [VMAPPLE_APV_IOSFC] = 0x10, 127 [VMAPPLE_APV_GFX] = 0x11, 128 [VMAPPLE_AES_1] = 0x12, 129 [VMAPPLE_PCIE] = 0x20, 130 }; 131 132 #define GPEX_NUM_IRQS 16 133 134 static void create_bdif(VMAppleMachineState *vms, MemoryRegion *mem) 135 { 136 DeviceState *bdif; 137 SysBusDevice *bdif_sb; 138 DriveInfo *di_aux = drive_get(IF_PFLASH, 0, 0); 139 DriveInfo *di_root = drive_get(IF_PFLASH, 0, 1); 140 141 if (!di_aux) { 142 error_report("No AUX device. Please specify one as pflash drive."); 143 exit(1); 144 } 145 146 if (!di_root) { 147 /* Fall back to the first IF_VIRTIO device as root device */ 148 di_root = drive_get(IF_VIRTIO, 0, 0); 149 } 150 151 if (!di_root) { 152 error_report("No root device. Please specify one as virtio drive."); 153 exit(1); 154 } 155 156 /* PV backdoor device */ 157 bdif = qdev_new(TYPE_VMAPPLE_BDIF); 158 bdif_sb = SYS_BUS_DEVICE(bdif); 159 sysbus_mmio_map(bdif_sb, 0, vms->memmap[VMAPPLE_BDOOR].base); 160 161 qdev_prop_set_drive(DEVICE(bdif), "aux", blk_by_legacy_dinfo(di_aux)); 162 qdev_prop_set_drive(DEVICE(bdif), "root", blk_by_legacy_dinfo(di_root)); 163 164 sysbus_realize_and_unref(bdif_sb, &error_fatal); 165 } 166 167 static void create_pvpanic(VMAppleMachineState *vms, MemoryRegion *mem) 168 { 169 SysBusDevice *pvpanic; 170 171 vms->pvpanic = qdev_new(TYPE_PVPANIC_MMIO_DEVICE); 172 pvpanic = SYS_BUS_DEVICE(vms->pvpanic); 173 sysbus_mmio_map(pvpanic, 0, vms->memmap[VMAPPLE_PVPANIC].base); 174 175 sysbus_realize_and_unref(pvpanic, &error_fatal); 176 } 177 178 static bool create_cfg(VMAppleMachineState *vms, MemoryRegion *mem, 179 Error **errp) 180 { 181 ERRP_GUARD(); 182 SysBusDevice *cfg; 183 MachineState *machine = MACHINE(vms); 184 uint32_t rnd = 1; 185 186 vms->cfg = qdev_new(TYPE_VMAPPLE_CFG); 187 cfg = SYS_BUS_DEVICE(vms->cfg); 188 sysbus_mmio_map(cfg, 0, vms->memmap[VMAPPLE_CONFIG].base); 189 190 qemu_guest_getrandom_nofail(&rnd, sizeof(rnd)); 191 192 qdev_prop_set_uint32(vms->cfg, "nr-cpus", machine->smp.cpus); 193 qdev_prop_set_uint64(vms->cfg, "ecid", vms->uuid); 194 qdev_prop_set_uint64(vms->cfg, "ram-size", machine->ram_size); 195 qdev_prop_set_uint32(vms->cfg, "rnd", rnd); 196 197 if (!sysbus_realize_and_unref(cfg, errp)) { 198 error_prepend(errp, "Error creating vmapple cfg device: "); 199 return false; 200 } 201 202 return true; 203 } 204 205 static void create_gfx(VMAppleMachineState *vms, MemoryRegion *mem) 206 { 207 int irq_gfx = vms->irqmap[VMAPPLE_APV_GFX]; 208 int irq_iosfc = vms->irqmap[VMAPPLE_APV_IOSFC]; 209 SysBusDevice *gfx; 210 211 gfx = SYS_BUS_DEVICE(qdev_new("apple-gfx-mmio")); 212 sysbus_mmio_map(gfx, 0, vms->memmap[VMAPPLE_APV_GFX].base); 213 sysbus_mmio_map(gfx, 1, vms->memmap[VMAPPLE_APV_IOSFC].base); 214 sysbus_connect_irq(gfx, 0, qdev_get_gpio_in(vms->gic, irq_gfx)); 215 sysbus_connect_irq(gfx, 1, qdev_get_gpio_in(vms->gic, irq_iosfc)); 216 sysbus_realize_and_unref(gfx, &error_fatal); 217 } 218 219 static void create_aes(VMAppleMachineState *vms, MemoryRegion *mem) 220 { 221 int irq = vms->irqmap[VMAPPLE_AES_1]; 222 SysBusDevice *aes; 223 224 aes = SYS_BUS_DEVICE(qdev_new(TYPE_APPLE_AES)); 225 sysbus_mmio_map(aes, 0, vms->memmap[VMAPPLE_AES_1].base); 226 sysbus_mmio_map(aes, 1, vms->memmap[VMAPPLE_AES_2].base); 227 sysbus_connect_irq(aes, 0, qdev_get_gpio_in(vms->gic, irq)); 228 sysbus_realize_and_unref(aes, &error_fatal); 229 } 230 231 static int arm_gic_ppi_index(int cpu_nr, int ppi_index) 232 { 233 return NUM_IRQS + cpu_nr * GIC_INTERNAL + ppi_index; 234 } 235 236 static void create_gic(VMAppleMachineState *vms, MemoryRegion *mem) 237 { 238 MachineState *ms = MACHINE(vms); 239 /* We create a standalone GIC */ 240 SysBusDevice *gicbusdev; 241 QList *redist_region_count; 242 int i; 243 unsigned int smp_cpus = ms->smp.cpus; 244 245 vms->gic = qdev_new(gicv3_class_name()); 246 qdev_prop_set_uint32(vms->gic, "revision", 3); 247 qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); 248 /* 249 * Note that the num-irq property counts both internal and external 250 * interrupts; there are always 32 of the former (mandated by GIC spec). 251 */ 252 qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32); 253 254 uint32_t redist0_capacity = 255 vms->memmap[VMAPPLE_GIC_REDIST].size / GICV3_REDIST_SIZE; 256 uint32_t redist0_count = MIN(smp_cpus, redist0_capacity); 257 258 redist_region_count = qlist_new(); 259 qlist_append_int(redist_region_count, redist0_count); 260 qdev_prop_set_array(vms->gic, "redist-region-count", redist_region_count); 261 262 gicbusdev = SYS_BUS_DEVICE(vms->gic); 263 sysbus_realize_and_unref(gicbusdev, &error_fatal); 264 sysbus_mmio_map(gicbusdev, 0, vms->memmap[VMAPPLE_GIC_DIST].base); 265 sysbus_mmio_map(gicbusdev, 1, vms->memmap[VMAPPLE_GIC_REDIST].base); 266 267 /* 268 * Wire the outputs from each CPU's generic timer and the GICv3 269 * maintenance interrupt signal to the appropriate GIC PPI inputs, 270 * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs. 271 */ 272 for (i = 0; i < smp_cpus; i++) { 273 DeviceState *cpudev = DEVICE(qemu_get_cpu(i)); 274 275 /* Map the virt timer to PPI 27 */ 276 qdev_connect_gpio_out(cpudev, GTIMER_VIRT, 277 qdev_get_gpio_in(vms->gic, 278 arm_gic_ppi_index(i, 27))); 279 280 /* Map the GIC IRQ and FIQ lines to CPU */ 281 sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); 282 sysbus_connect_irq(gicbusdev, i + smp_cpus, 283 qdev_get_gpio_in(cpudev, ARM_CPU_FIQ)); 284 } 285 } 286 287 static void create_uart(const VMAppleMachineState *vms, int uart, 288 MemoryRegion *mem, Chardev *chr) 289 { 290 hwaddr base = vms->memmap[uart].base; 291 int irq = vms->irqmap[uart]; 292 DeviceState *dev = qdev_new(TYPE_PL011); 293 SysBusDevice *s = SYS_BUS_DEVICE(dev); 294 295 qdev_prop_set_chr(dev, "chardev", chr); 296 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 297 memory_region_add_subregion(mem, base, 298 sysbus_mmio_get_region(s, 0)); 299 sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); 300 } 301 302 static void create_rtc(const VMAppleMachineState *vms) 303 { 304 hwaddr base = vms->memmap[VMAPPLE_RTC].base; 305 int irq = vms->irqmap[VMAPPLE_RTC]; 306 307 sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq)); 308 } 309 310 static DeviceState *gpio_key_dev; 311 static void vmapple_powerdown_req(Notifier *n, void *opaque) 312 { 313 /* use gpio Pin 3 for power button event */ 314 qemu_set_irq(qdev_get_gpio_in(gpio_key_dev, 0), 1); 315 } 316 317 static void create_gpio_devices(const VMAppleMachineState *vms, int gpio, 318 MemoryRegion *mem) 319 { 320 DeviceState *pl061_dev; 321 hwaddr base = vms->memmap[gpio].base; 322 int irq = vms->irqmap[gpio]; 323 SysBusDevice *s; 324 325 pl061_dev = qdev_new("pl061"); 326 /* Pull lines down to 0 if not driven by the PL061 */ 327 qdev_prop_set_uint32(pl061_dev, "pullups", 0); 328 qdev_prop_set_uint32(pl061_dev, "pulldowns", 0xff); 329 s = SYS_BUS_DEVICE(pl061_dev); 330 sysbus_realize_and_unref(s, &error_fatal); 331 memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); 332 sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); 333 gpio_key_dev = sysbus_create_simple("gpio-key", -1, 334 qdev_get_gpio_in(pl061_dev, 3)); 335 } 336 337 static void vmapple_firmware_init(VMAppleMachineState *vms, 338 MemoryRegion *sysmem) 339 { 340 hwaddr size = vms->memmap[VMAPPLE_FIRMWARE].size; 341 hwaddr base = vms->memmap[VMAPPLE_FIRMWARE].base; 342 const char *bios_name; 343 int image_size; 344 char *fname; 345 346 bios_name = MACHINE(vms)->firmware; 347 if (!bios_name) { 348 error_report("No firmware specified"); 349 exit(1); 350 } 351 352 fname = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 353 if (!fname) { 354 error_report("Could not find ROM image '%s'", bios_name); 355 exit(1); 356 } 357 358 memory_region_init_ram(&vms->fw_mr, NULL, "firmware", size, &error_fatal); 359 image_size = load_image_mr(fname, &vms->fw_mr); 360 361 g_free(fname); 362 if (image_size < 0) { 363 error_report("Could not load ROM image '%s'", bios_name); 364 exit(1); 365 } 366 367 memory_region_add_subregion(get_system_memory(), base, &vms->fw_mr); 368 } 369 370 static void create_pcie(VMAppleMachineState *vms) 371 { 372 hwaddr base_mmio = vms->memmap[VMAPPLE_PCIE_MMIO].base; 373 hwaddr size_mmio = vms->memmap[VMAPPLE_PCIE_MMIO].size; 374 hwaddr base_ecam = vms->memmap[VMAPPLE_PCIE_ECAM].base; 375 hwaddr size_ecam = vms->memmap[VMAPPLE_PCIE_ECAM].size; 376 int irq = vms->irqmap[VMAPPLE_PCIE]; 377 MemoryRegion *mmio_alias; 378 MemoryRegion *mmio_reg; 379 MemoryRegion *ecam_reg; 380 DeviceState *dev; 381 int i; 382 PCIHostState *pci; 383 DeviceState *usb_controller; 384 USBBus *usb_bus; 385 386 dev = qdev_new(TYPE_GPEX_HOST); 387 qdev_prop_set_uint32(dev, "num-irqs", GPEX_NUM_IRQS); 388 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 389 390 /* Map only the first size_ecam bytes of ECAM space */ 391 ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); 392 memory_region_init_alias(&vms->ecam_alias, OBJECT(dev), "pcie-ecam", 393 ecam_reg, 0, size_ecam); 394 memory_region_add_subregion(get_system_memory(), base_ecam, 395 &vms->ecam_alias); 396 397 /* 398 * Map the MMIO window from [0x50000000-0x7fff0000] in PCI space into 399 * system address space at [0x50000000-0x7fff0000]. 400 */ 401 mmio_alias = g_new0(MemoryRegion, 1); 402 mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1); 403 memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", 404 mmio_reg, base_mmio, size_mmio); 405 memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias); 406 407 for (i = 0; i < GPEX_NUM_IRQS; i++) { 408 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 409 qdev_get_gpio_in(vms->gic, irq + i)); 410 gpex_set_irq_num(GPEX_HOST(dev), i, irq + i); 411 } 412 413 pci = PCI_HOST_BRIDGE(dev); 414 vms->bus = pci->bus; 415 g_assert(vms->bus); 416 417 while ((dev = qemu_create_nic_device("virtio-net-pci", true, NULL))) { 418 qdev_realize_and_unref(dev, BUS(vms->bus), &error_fatal); 419 } 420 421 if (defaults_enabled()) { 422 usb_controller = qdev_new(TYPE_QEMU_XHCI); 423 qdev_realize_and_unref(usb_controller, BUS(pci->bus), &error_fatal); 424 425 usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS, 426 &error_fatal)); 427 usb_create_simple(usb_bus, "usb-kbd"); 428 usb_create_simple(usb_bus, "usb-tablet"); 429 } 430 } 431 432 static void vmapple_reset(void *opaque) 433 { 434 VMAppleMachineState *vms = opaque; 435 hwaddr base = vms->memmap[VMAPPLE_FIRMWARE].base; 436 437 cpu_set_pc(first_cpu, base); 438 } 439 440 static void mach_vmapple_init(MachineState *machine) 441 { 442 VMAppleMachineState *vms = VMAPPLE_MACHINE(machine); 443 MachineClass *mc = MACHINE_GET_CLASS(machine); 444 const CPUArchIdList *possible_cpus; 445 MemoryRegion *sysmem = get_system_memory(); 446 int n; 447 unsigned int smp_cpus = machine->smp.cpus; 448 unsigned int max_cpus = machine->smp.max_cpus; 449 450 vms->memmap = memmap; 451 machine->usb = true; 452 453 possible_cpus = mc->possible_cpu_arch_ids(machine); 454 assert(possible_cpus->len == max_cpus); 455 for (n = 0; n < possible_cpus->len; n++) { 456 Object *cpu; 457 CPUState *cs; 458 459 if (n >= smp_cpus) { 460 break; 461 } 462 463 cpu = object_new(possible_cpus->cpus[n].type); 464 object_property_set_int(cpu, "mp-affinity", 465 possible_cpus->cpus[n].arch_id, &error_fatal); 466 467 cs = CPU(cpu); 468 cs->cpu_index = n; 469 470 numa_cpu_pre_plug(&possible_cpus->cpus[cs->cpu_index], DEVICE(cpu), 471 &error_fatal); 472 473 if (object_property_find(cpu, "has_el3")) { 474 object_property_set_bool(cpu, "has_el3", false, &error_fatal); 475 } 476 if (object_property_find(cpu, "has_el2")) { 477 object_property_set_bool(cpu, "has_el2", false, &error_fatal); 478 } 479 object_property_set_int(cpu, "psci-conduit", QEMU_PSCI_CONDUIT_HVC, 480 &error_fatal); 481 482 /* Secondary CPUs start in PSCI powered-down state */ 483 if (n > 0) { 484 object_property_set_bool(cpu, "start-powered-off", true, 485 &error_fatal); 486 } 487 488 object_property_set_link(cpu, "memory", OBJECT(sysmem), &error_abort); 489 qdev_realize(DEVICE(cpu), NULL, &error_fatal); 490 object_unref(cpu); 491 } 492 493 memory_region_add_subregion(sysmem, vms->memmap[VMAPPLE_MEM].base, 494 machine->ram); 495 496 create_gic(vms, sysmem); 497 create_bdif(vms, sysmem); 498 create_pvpanic(vms, sysmem); 499 create_aes(vms, sysmem); 500 create_gfx(vms, sysmem); 501 create_uart(vms, VMAPPLE_UART, sysmem, serial_hd(0)); 502 create_rtc(vms); 503 create_pcie(vms); 504 505 create_gpio_devices(vms, VMAPPLE_GPIO, sysmem); 506 507 vmapple_firmware_init(vms, sysmem); 508 create_cfg(vms, sysmem, &error_fatal); 509 510 /* connect powerdown request */ 511 vms->powerdown_notifier.notify = vmapple_powerdown_req; 512 qemu_register_powerdown_notifier(&vms->powerdown_notifier); 513 514 vms->bootinfo.ram_size = machine->ram_size; 515 vms->bootinfo.board_id = -1; 516 vms->bootinfo.loader_start = vms->memmap[VMAPPLE_MEM].base; 517 vms->bootinfo.skip_dtb_autoload = true; 518 vms->bootinfo.firmware_loaded = true; 519 arm_load_kernel(ARM_CPU(first_cpu), machine, &vms->bootinfo); 520 521 qemu_register_reset(vmapple_reset, vms); 522 } 523 524 static CpuInstanceProperties 525 vmapple_cpu_index_to_props(MachineState *ms, unsigned cpu_index) 526 { 527 MachineClass *mc = MACHINE_GET_CLASS(ms); 528 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 529 530 assert(cpu_index < possible_cpus->len); 531 return possible_cpus->cpus[cpu_index].props; 532 } 533 534 535 static int64_t vmapple_get_default_cpu_node_id(const MachineState *ms, int idx) 536 { 537 return idx % ms->numa_state->num_nodes; 538 } 539 540 static const CPUArchIdList *vmapple_possible_cpu_arch_ids(MachineState *ms) 541 { 542 int n; 543 unsigned int max_cpus = ms->smp.max_cpus; 544 545 if (ms->possible_cpus) { 546 assert(ms->possible_cpus->len == max_cpus); 547 return ms->possible_cpus; 548 } 549 550 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 551 sizeof(CPUArchId) * max_cpus); 552 ms->possible_cpus->len = max_cpus; 553 for (n = 0; n < ms->possible_cpus->len; n++) { 554 ms->possible_cpus->cpus[n].type = ms->cpu_type; 555 ms->possible_cpus->cpus[n].arch_id = 556 arm_build_mp_affinity(n, GICV3_TARGETLIST_BITS); 557 ms->possible_cpus->cpus[n].props.has_thread_id = true; 558 ms->possible_cpus->cpus[n].props.thread_id = n; 559 } 560 return ms->possible_cpus; 561 } 562 563 static GlobalProperty vmapple_compat_defaults[] = { 564 { TYPE_VIRTIO_PCI, "disable-legacy", "on" }, 565 /* 566 * macOS XHCI driver attempts to schedule events onto even rings 1 & 2 567 * even when (as here) there is no MSI(-X) support. Disabling interrupter 568 * mapping in the XHCI controller works around the problem. 569 */ 570 { TYPE_XHCI_PCI, "conditional-intr-mapping", "on" }, 571 }; 572 573 static void vmapple_machine_class_init(ObjectClass *oc, void *data) 574 { 575 MachineClass *mc = MACHINE_CLASS(oc); 576 577 mc->init = mach_vmapple_init; 578 mc->max_cpus = 32; 579 mc->block_default_type = IF_VIRTIO; 580 mc->no_cdrom = 1; 581 mc->pci_allow_0_address = true; 582 mc->minimum_page_bits = 12; 583 mc->possible_cpu_arch_ids = vmapple_possible_cpu_arch_ids; 584 mc->cpu_index_to_instance_props = vmapple_cpu_index_to_props; 585 mc->default_cpu_type = ARM_CPU_TYPE_NAME("host"); 586 mc->get_default_cpu_node_id = vmapple_get_default_cpu_node_id; 587 mc->default_ram_id = "mach-vmapple.ram"; 588 mc->desc = "Apple aarch64 Virtual Machine"; 589 590 compat_props_add(mc->compat_props, vmapple_compat_defaults, 591 G_N_ELEMENTS(vmapple_compat_defaults)); 592 } 593 594 static void vmapple_instance_init(Object *obj) 595 { 596 VMAppleMachineState *vms = VMAPPLE_MACHINE(obj); 597 598 vms->irqmap = irqmap; 599 600 object_property_add_uint64_ptr(obj, "uuid", &vms->uuid, 601 OBJ_PROP_FLAG_READWRITE); 602 object_property_set_description(obj, "uuid", "Machine UUID (SDOM)"); 603 } 604 605 static const TypeInfo vmapple_machine_info = { 606 .name = TYPE_VMAPPLE_MACHINE, 607 .parent = TYPE_MACHINE, 608 .instance_size = sizeof(VMAppleMachineState), 609 .class_init = vmapple_machine_class_init, 610 .instance_init = vmapple_instance_init, 611 }; 612 613 static void machvmapple_machine_init(void) 614 { 615 type_register_static(&vmapple_machine_info); 616 } 617 type_init(machvmapple_machine_init); 618 619