1 /* 2 * vfio based device assignment support - PCI devices 3 * 4 * Copyright Red Hat, Inc. 2012-2015 5 * 6 * Authors: 7 * Alex Williamson <alex.williamson@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2. See 10 * the COPYING file in the top-level directory. 11 */ 12 #ifndef HW_VFIO_VFIO_PCI_H 13 #define HW_VFIO_VFIO_PCI_H 14 15 #include "qemu-common.h" 16 #include "exec/memory.h" 17 #include "hw/pci/pci.h" 18 #include "hw/vfio/vfio-common.h" 19 #include "qemu/event_notifier.h" 20 #include "qemu/queue.h" 21 #include "qemu/timer.h" 22 23 struct VFIOPCIDevice; 24 25 typedef struct VFIOLegacyQuirk { 26 struct VFIOPCIDevice *vdev; 27 MemoryRegion *mem; 28 struct { 29 uint32_t base_offset:TARGET_PAGE_BITS; 30 uint32_t address_offset:TARGET_PAGE_BITS; 31 uint32_t address_size:3; 32 uint32_t bar:3; 33 34 uint32_t address_match; 35 uint32_t address_mask; 36 37 uint32_t address_val:TARGET_PAGE_BITS; 38 uint32_t data_offset:TARGET_PAGE_BITS; 39 uint32_t data_size:3; 40 41 uint8_t flags; 42 uint8_t read_flags; 43 uint8_t write_flags; 44 } data; 45 } VFIOLegacyQuirk; 46 47 typedef struct VFIOQuirk { 48 QLIST_ENTRY(VFIOQuirk) next; 49 void *data; 50 int nr_mem; 51 MemoryRegion *mem; 52 } VFIOQuirk; 53 54 typedef struct VFIOBAR { 55 VFIORegion region; 56 bool ioport; 57 bool mem64; 58 QLIST_HEAD(, VFIOQuirk) quirks; 59 } VFIOBAR; 60 61 typedef struct VFIOVGARegion { 62 MemoryRegion mem; 63 off_t offset; 64 int nr; 65 QLIST_HEAD(, VFIOQuirk) quirks; 66 } VFIOVGARegion; 67 68 typedef struct VFIOVGA { 69 off_t fd_offset; 70 int fd; 71 VFIOVGARegion region[QEMU_PCI_VGA_NUM_REGIONS]; 72 } VFIOVGA; 73 74 typedef struct VFIOINTx { 75 bool pending; /* interrupt pending */ 76 bool kvm_accel; /* set when QEMU bypass through KVM enabled */ 77 uint8_t pin; /* which pin to pull for qemu_set_irq */ 78 EventNotifier interrupt; /* eventfd triggered on interrupt */ 79 EventNotifier unmask; /* eventfd for unmask on QEMU bypass */ 80 PCIINTxRoute route; /* routing info for QEMU bypass */ 81 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */ 82 QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */ 83 } VFIOINTx; 84 85 typedef struct VFIOMSIVector { 86 /* 87 * Two interrupt paths are configured per vector. The first, is only used 88 * for interrupts injected via QEMU. This is typically the non-accel path, 89 * but may also be used when we want QEMU to handle masking and pending 90 * bits. The KVM path bypasses QEMU and is therefore higher performance, 91 * but requires masking at the device. virq is used to track the MSI route 92 * through KVM, thus kvm_interrupt is only available when virq is set to a 93 * valid (>= 0) value. 94 */ 95 EventNotifier interrupt; 96 EventNotifier kvm_interrupt; 97 struct VFIOPCIDevice *vdev; /* back pointer to device */ 98 int virq; 99 bool use; 100 } VFIOMSIVector; 101 102 enum { 103 VFIO_INT_NONE = 0, 104 VFIO_INT_INTx = 1, 105 VFIO_INT_MSI = 2, 106 VFIO_INT_MSIX = 3, 107 }; 108 109 /* Cache of MSI-X setup plus extra mmap and memory region for split BAR map */ 110 typedef struct VFIOMSIXInfo { 111 uint8_t table_bar; 112 uint8_t pba_bar; 113 uint16_t entries; 114 uint32_t table_offset; 115 uint32_t pba_offset; 116 MemoryRegion mmap_mem; 117 void *mmap; 118 } VFIOMSIXInfo; 119 120 typedef struct VFIOPCIDevice { 121 PCIDevice pdev; 122 VFIODevice vbasedev; 123 VFIOINTx intx; 124 unsigned int config_size; 125 uint8_t *emulated_config_bits; /* QEMU emulated bits, little-endian */ 126 off_t config_offset; /* Offset of config space region within device fd */ 127 unsigned int rom_size; 128 off_t rom_offset; /* Offset of ROM region within device fd */ 129 void *rom; 130 int msi_cap_size; 131 VFIOMSIVector *msi_vectors; 132 VFIOMSIXInfo *msix; 133 int nr_vectors; /* Number of MSI/MSIX vectors currently in use */ 134 int interrupt; /* Current interrupt type */ 135 VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */ 136 VFIOVGA vga; /* 0xa0000, 0x3b0, 0x3c0 */ 137 PCIHostDeviceAddress host; 138 EventNotifier err_notifier; 139 EventNotifier req_notifier; 140 int (*resetfn)(struct VFIOPCIDevice *); 141 uint32_t features; 142 #define VFIO_FEATURE_ENABLE_VGA_BIT 0 143 #define VFIO_FEATURE_ENABLE_VGA (1 << VFIO_FEATURE_ENABLE_VGA_BIT) 144 #define VFIO_FEATURE_ENABLE_REQ_BIT 1 145 #define VFIO_FEATURE_ENABLE_REQ (1 << VFIO_FEATURE_ENABLE_REQ_BIT) 146 int32_t bootindex; 147 uint8_t pm_cap; 148 bool has_vga; 149 bool pci_aer; 150 bool req_enabled; 151 bool has_flr; 152 bool has_pm_reset; 153 bool rom_read_failed; 154 bool no_kvm_intx; 155 bool no_kvm_msi; 156 bool no_kvm_msix; 157 } VFIOPCIDevice; 158 159 uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len); 160 void vfio_pci_write_config(PCIDevice *pdev, 161 uint32_t addr, uint32_t val, int len); 162 163 uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size); 164 void vfio_vga_write(void *opaque, hwaddr addr, uint64_t data, unsigned size); 165 166 bool vfio_blacklist_opt_rom(VFIOPCIDevice *vdev); 167 void vfio_vga_quirk_setup(VFIOPCIDevice *vdev); 168 void vfio_vga_quirk_teardown(VFIOPCIDevice *vdev); 169 void vfio_vga_quirk_free(VFIOPCIDevice *vdev); 170 void vfio_bar_quirk_setup(VFIOPCIDevice *vdev, int nr); 171 void vfio_bar_quirk_teardown(VFIOPCIDevice *vdev, int nr); 172 void vfio_bar_quirk_free(VFIOPCIDevice *vdev, int nr); 173 174 #endif /* HW_VFIO_VFIO_PCI_H */ 175