1 /* 2 * USB xHCI controller emulation 3 * 4 * Copyright (c) 2011 Securiforest 5 * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com> 6 * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 7 * 8 * This library is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU Lesser General Public 10 * License as published by the Free Software Foundation; either 11 * version 2.1 of the License, or (at your option) any later version. 12 * 13 * This library is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * Lesser General Public License for more details. 17 * 18 * You should have received a copy of the GNU Lesser General Public 19 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #ifndef HW_USB_HCD_XHCI_H 23 #define HW_USB_HCD_XHCI_H 24 #include "qom/object.h" 25 26 #include "hw/usb.h" 27 #include "hw/usb/xhci.h" 28 #include "sysemu/dma.h" 29 30 OBJECT_DECLARE_SIMPLE_TYPE(XHCIState, XHCI) 31 32 /* Very pessimistic, let's hope it's enough for all cases */ 33 #define EV_QUEUE (((3 * 24) + 16) * XHCI_MAXSLOTS) 34 35 typedef struct XHCIStreamContext XHCIStreamContext; 36 typedef struct XHCIEPContext XHCIEPContext; 37 38 enum xhci_flags { 39 XHCI_FLAG_SS_FIRST = 1, 40 XHCI_FLAG_ENABLE_STREAMS, 41 }; 42 43 typedef enum TRBType { 44 TRB_RESERVED = 0, 45 TR_NORMAL, 46 TR_SETUP, 47 TR_DATA, 48 TR_STATUS, 49 TR_ISOCH, 50 TR_LINK, 51 TR_EVDATA, 52 TR_NOOP, 53 CR_ENABLE_SLOT, 54 CR_DISABLE_SLOT, 55 CR_ADDRESS_DEVICE, 56 CR_CONFIGURE_ENDPOINT, 57 CR_EVALUATE_CONTEXT, 58 CR_RESET_ENDPOINT, 59 CR_STOP_ENDPOINT, 60 CR_SET_TR_DEQUEUE, 61 CR_RESET_DEVICE, 62 CR_FORCE_EVENT, 63 CR_NEGOTIATE_BW, 64 CR_SET_LATENCY_TOLERANCE, 65 CR_GET_PORT_BANDWIDTH, 66 CR_FORCE_HEADER, 67 CR_NOOP, 68 ER_TRANSFER = 32, 69 ER_COMMAND_COMPLETE, 70 ER_PORT_STATUS_CHANGE, 71 ER_BANDWIDTH_REQUEST, 72 ER_DOORBELL, 73 ER_HOST_CONTROLLER, 74 ER_DEVICE_NOTIFICATION, 75 ER_MFINDEX_WRAP, 76 /* vendor specific bits */ 77 CR_VENDOR_NEC_FIRMWARE_REVISION = 49, 78 CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50, 79 } TRBType; 80 81 typedef enum TRBCCode { 82 CC_INVALID = 0, 83 CC_SUCCESS, 84 CC_DATA_BUFFER_ERROR, 85 CC_BABBLE_DETECTED, 86 CC_USB_TRANSACTION_ERROR, 87 CC_TRB_ERROR, 88 CC_STALL_ERROR, 89 CC_RESOURCE_ERROR, 90 CC_BANDWIDTH_ERROR, 91 CC_NO_SLOTS_ERROR, 92 CC_INVALID_STREAM_TYPE_ERROR, 93 CC_SLOT_NOT_ENABLED_ERROR, 94 CC_EP_NOT_ENABLED_ERROR, 95 CC_SHORT_PACKET, 96 CC_RING_UNDERRUN, 97 CC_RING_OVERRUN, 98 CC_VF_ER_FULL, 99 CC_PARAMETER_ERROR, 100 CC_BANDWIDTH_OVERRUN, 101 CC_CONTEXT_STATE_ERROR, 102 CC_NO_PING_RESPONSE_ERROR, 103 CC_EVENT_RING_FULL_ERROR, 104 CC_INCOMPATIBLE_DEVICE_ERROR, 105 CC_MISSED_SERVICE_ERROR, 106 CC_COMMAND_RING_STOPPED, 107 CC_COMMAND_ABORTED, 108 CC_STOPPED, 109 CC_STOPPED_LENGTH_INVALID, 110 CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29, 111 CC_ISOCH_BUFFER_OVERRUN = 31, 112 CC_EVENT_LOST_ERROR, 113 CC_UNDEFINED_ERROR, 114 CC_INVALID_STREAM_ID_ERROR, 115 CC_SECONDARY_BANDWIDTH_ERROR, 116 CC_SPLIT_TRANSACTION_ERROR 117 } TRBCCode; 118 119 typedef struct XHCIRing { 120 dma_addr_t dequeue; 121 bool ccs; 122 } XHCIRing; 123 124 typedef struct XHCIPort { 125 XHCIState *xhci; 126 uint32_t portsc; 127 uint32_t portnr; 128 USBPort *uport; 129 uint32_t speedmask; 130 char name[20]; 131 MemoryRegion mem; 132 } XHCIPort; 133 134 typedef struct XHCISlot { 135 bool enabled; 136 bool addressed; 137 uint16_t intr; 138 dma_addr_t ctx; 139 USBPort *uport; 140 XHCIEPContext *eps[31]; 141 } XHCISlot; 142 143 typedef struct XHCIEvent { 144 TRBType type; 145 TRBCCode ccode; 146 uint64_t ptr; 147 uint32_t length; 148 uint32_t flags; 149 uint8_t slotid; 150 uint8_t epid; 151 } XHCIEvent; 152 153 typedef struct XHCIInterrupter { 154 uint32_t iman; 155 uint32_t imod; 156 uint32_t erstsz; 157 uint32_t erstba_low; 158 uint32_t erstba_high; 159 uint32_t erdp_low; 160 uint32_t erdp_high; 161 162 bool msix_used, er_pcs; 163 164 dma_addr_t er_start; 165 uint32_t er_size; 166 unsigned int er_ep_idx; 167 168 /* kept for live migration compat only */ 169 bool er_full_unused; 170 XHCIEvent ev_buffer[EV_QUEUE]; 171 unsigned int ev_buffer_put; 172 unsigned int ev_buffer_get; 173 174 } XHCIInterrupter; 175 176 typedef struct XHCIState { 177 DeviceState parent; 178 179 USBBus bus; 180 MemoryRegion mem; 181 MemoryRegion *dma_mr; 182 AddressSpace *as; 183 MemoryRegion mem_cap; 184 MemoryRegion mem_oper; 185 MemoryRegion mem_runtime; 186 MemoryRegion mem_doorbell; 187 188 /* properties */ 189 uint32_t numports_2; 190 uint32_t numports_3; 191 uint32_t numintrs; 192 uint32_t numslots; 193 uint32_t flags; 194 uint32_t max_pstreams_mask; 195 void (*intr_update)(XHCIState *s, int n, bool enable); 196 bool (*intr_raise)(XHCIState *s, int n, bool level); 197 DeviceState *hostOpaque; 198 199 /* Operational Registers */ 200 uint32_t usbcmd; 201 uint32_t usbsts; 202 uint32_t dnctrl; 203 uint32_t crcr_low; 204 uint32_t crcr_high; 205 uint32_t dcbaap_low; 206 uint32_t dcbaap_high; 207 uint32_t config; 208 209 USBPort uports[MAX_CONST(XHCI_MAXPORTS_2, XHCI_MAXPORTS_3)]; 210 XHCIPort ports[XHCI_MAXPORTS]; 211 XHCISlot slots[XHCI_MAXSLOTS]; 212 uint32_t numports; 213 214 /* Runtime Registers */ 215 int64_t mfindex_start; 216 QEMUTimer *mfwrap_timer; 217 XHCIInterrupter intr[XHCI_MAXINTRS]; 218 219 XHCIRing cmd_ring; 220 221 bool nec_quirks; 222 } XHCIState; 223 224 extern const VMStateDescription vmstate_xhci; 225 bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); 226 void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); 227 #endif 228