1*9a4e12a6SPhilippe Mathieu-Daudé /* 2*9a4e12a6SPhilippe Mathieu-Daudé * USB UHCI controller emulation 3*9a4e12a6SPhilippe Mathieu-Daudé * 4*9a4e12a6SPhilippe Mathieu-Daudé * Copyright (c) 2005 Fabrice Bellard 5*9a4e12a6SPhilippe Mathieu-Daudé * 6*9a4e12a6SPhilippe Mathieu-Daudé * Copyright (c) 2008 Max Krasnyansky 7*9a4e12a6SPhilippe Mathieu-Daudé * Magor rewrite of the UHCI data structures parser and frame processor 8*9a4e12a6SPhilippe Mathieu-Daudé * Support for fully async operation and multiple outstanding transactions 9*9a4e12a6SPhilippe Mathieu-Daudé * 10*9a4e12a6SPhilippe Mathieu-Daudé * Permission is hereby granted, free of charge, to any person obtaining a copy 11*9a4e12a6SPhilippe Mathieu-Daudé * of this software and associated documentation files (the "Software"), to deal 12*9a4e12a6SPhilippe Mathieu-Daudé * in the Software without restriction, including without limitation the rights 13*9a4e12a6SPhilippe Mathieu-Daudé * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 14*9a4e12a6SPhilippe Mathieu-Daudé * copies of the Software, and to permit persons to whom the Software is 15*9a4e12a6SPhilippe Mathieu-Daudé * furnished to do so, subject to the following conditions: 16*9a4e12a6SPhilippe Mathieu-Daudé * 17*9a4e12a6SPhilippe Mathieu-Daudé * The above copyright notice and this permission notice shall be included in 18*9a4e12a6SPhilippe Mathieu-Daudé * all copies or substantial portions of the Software. 19*9a4e12a6SPhilippe Mathieu-Daudé * 20*9a4e12a6SPhilippe Mathieu-Daudé * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 21*9a4e12a6SPhilippe Mathieu-Daudé * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 22*9a4e12a6SPhilippe Mathieu-Daudé * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 23*9a4e12a6SPhilippe Mathieu-Daudé * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 24*9a4e12a6SPhilippe Mathieu-Daudé * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 25*9a4e12a6SPhilippe Mathieu-Daudé * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 26*9a4e12a6SPhilippe Mathieu-Daudé * THE SOFTWARE. 27*9a4e12a6SPhilippe Mathieu-Daudé */ 28*9a4e12a6SPhilippe Mathieu-Daudé #ifndef HW_USB_HCD_UHCI_H 29*9a4e12a6SPhilippe Mathieu-Daudé #define HW_USB_HCD_UHCI_H 30*9a4e12a6SPhilippe Mathieu-Daudé 31*9a4e12a6SPhilippe Mathieu-Daudé #include "exec/memory.h" 32*9a4e12a6SPhilippe Mathieu-Daudé #include "qemu/timer.h" 33*9a4e12a6SPhilippe Mathieu-Daudé #include "hw/pci/pci.h" 34*9a4e12a6SPhilippe Mathieu-Daudé #include "hw/usb.h" 35*9a4e12a6SPhilippe Mathieu-Daudé 36*9a4e12a6SPhilippe Mathieu-Daudé typedef struct UHCIQueue UHCIQueue; 37*9a4e12a6SPhilippe Mathieu-Daudé 38*9a4e12a6SPhilippe Mathieu-Daudé #define NB_PORTS 2 39*9a4e12a6SPhilippe Mathieu-Daudé 40*9a4e12a6SPhilippe Mathieu-Daudé typedef struct UHCIPort { 41*9a4e12a6SPhilippe Mathieu-Daudé USBPort port; 42*9a4e12a6SPhilippe Mathieu-Daudé uint16_t ctrl; 43*9a4e12a6SPhilippe Mathieu-Daudé } UHCIPort; 44*9a4e12a6SPhilippe Mathieu-Daudé 45*9a4e12a6SPhilippe Mathieu-Daudé typedef struct UHCIState { 46*9a4e12a6SPhilippe Mathieu-Daudé PCIDevice dev; 47*9a4e12a6SPhilippe Mathieu-Daudé MemoryRegion io_bar; 48*9a4e12a6SPhilippe Mathieu-Daudé USBBus bus; /* Note unused when we're a companion controller */ 49*9a4e12a6SPhilippe Mathieu-Daudé uint16_t cmd; /* cmd register */ 50*9a4e12a6SPhilippe Mathieu-Daudé uint16_t status; 51*9a4e12a6SPhilippe Mathieu-Daudé uint16_t intr; /* interrupt enable register */ 52*9a4e12a6SPhilippe Mathieu-Daudé uint16_t frnum; /* frame number */ 53*9a4e12a6SPhilippe Mathieu-Daudé uint32_t fl_base_addr; /* frame list base address */ 54*9a4e12a6SPhilippe Mathieu-Daudé uint8_t sof_timing; 55*9a4e12a6SPhilippe Mathieu-Daudé uint8_t status2; /* bit 0 and 1 are used to generate UHCI_STS_USBINT */ 56*9a4e12a6SPhilippe Mathieu-Daudé int64_t expire_time; 57*9a4e12a6SPhilippe Mathieu-Daudé QEMUTimer *frame_timer; 58*9a4e12a6SPhilippe Mathieu-Daudé QEMUBH *bh; 59*9a4e12a6SPhilippe Mathieu-Daudé uint32_t frame_bytes; 60*9a4e12a6SPhilippe Mathieu-Daudé uint32_t frame_bandwidth; 61*9a4e12a6SPhilippe Mathieu-Daudé bool completions_only; 62*9a4e12a6SPhilippe Mathieu-Daudé UHCIPort ports[NB_PORTS]; 63*9a4e12a6SPhilippe Mathieu-Daudé 64*9a4e12a6SPhilippe Mathieu-Daudé /* Interrupts that should be raised at the end of the current frame. */ 65*9a4e12a6SPhilippe Mathieu-Daudé uint32_t pending_int_mask; 66*9a4e12a6SPhilippe Mathieu-Daudé 67*9a4e12a6SPhilippe Mathieu-Daudé /* Active packets */ 68*9a4e12a6SPhilippe Mathieu-Daudé QTAILQ_HEAD(, UHCIQueue) queues; 69*9a4e12a6SPhilippe Mathieu-Daudé uint8_t num_ports_vmstate; 70*9a4e12a6SPhilippe Mathieu-Daudé 71*9a4e12a6SPhilippe Mathieu-Daudé /* Properties */ 72*9a4e12a6SPhilippe Mathieu-Daudé char *masterbus; 73*9a4e12a6SPhilippe Mathieu-Daudé uint32_t firstport; 74*9a4e12a6SPhilippe Mathieu-Daudé uint32_t maxframes; 75*9a4e12a6SPhilippe Mathieu-Daudé } UHCIState; 76*9a4e12a6SPhilippe Mathieu-Daudé 77*9a4e12a6SPhilippe Mathieu-Daudé #define TYPE_UHCI "pci-uhci-usb" 78*9a4e12a6SPhilippe Mathieu-Daudé DECLARE_INSTANCE_CHECKER(UHCIState, UHCI, TYPE_UHCI) 79*9a4e12a6SPhilippe Mathieu-Daudé 80*9a4e12a6SPhilippe Mathieu-Daudé typedef struct UHCIInfo { 81*9a4e12a6SPhilippe Mathieu-Daudé const char *name; 82*9a4e12a6SPhilippe Mathieu-Daudé uint16_t vendor_id; 83*9a4e12a6SPhilippe Mathieu-Daudé uint16_t device_id; 84*9a4e12a6SPhilippe Mathieu-Daudé uint8_t revision; 85*9a4e12a6SPhilippe Mathieu-Daudé uint8_t irq_pin; 86*9a4e12a6SPhilippe Mathieu-Daudé void (*realize)(PCIDevice *dev, Error **errp); 87*9a4e12a6SPhilippe Mathieu-Daudé bool unplug; 88*9a4e12a6SPhilippe Mathieu-Daudé } UHCIInfo; 89*9a4e12a6SPhilippe Mathieu-Daudé 90*9a4e12a6SPhilippe Mathieu-Daudé void uhci_data_class_init(ObjectClass *klass, void *data); 91*9a4e12a6SPhilippe Mathieu-Daudé void usb_uhci_common_realize(PCIDevice *dev, Error **errp); 92*9a4e12a6SPhilippe Mathieu-Daudé 93*9a4e12a6SPhilippe Mathieu-Daudé #endif 94