1 /* 2 * SMBIOS Support 3 * 4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. 5 * Copyright (C) 2013 Red Hat, Inc. 6 * 7 * Authors: 8 * Alex Williamson <alex.williamson@hp.com> 9 * Markus Armbruster <armbru@redhat.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/units.h" 20 #include "qapi/error.h" 21 #include "qemu/config-file.h" 22 #include "qemu/error-report.h" 23 #include "qemu/module.h" 24 #include "qemu/option.h" 25 #include "sysemu/sysemu.h" 26 #include "qemu/uuid.h" 27 #include "hw/firmware/smbios.h" 28 #include "hw/loader.h" 29 #include "hw/boards.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/pci/pci_device.h" 32 #include "smbios_build.h" 33 34 /* legacy structures and constants for <= 2.0 machines */ 35 struct smbios_header { 36 uint16_t length; 37 uint8_t type; 38 } QEMU_PACKED; 39 40 struct smbios_field { 41 struct smbios_header header; 42 uint8_t type; 43 uint16_t offset; 44 uint8_t data[]; 45 } QEMU_PACKED; 46 47 struct smbios_table { 48 struct smbios_header header; 49 uint8_t data[]; 50 } QEMU_PACKED; 51 52 #define SMBIOS_FIELD_ENTRY 0 53 #define SMBIOS_TABLE_ENTRY 1 54 55 static uint8_t *smbios_entries; 56 static size_t smbios_entries_len; 57 static bool smbios_uuid_encoded = true; 58 /* end: legacy structures & constants for <= 2.0 machines */ 59 60 61 uint8_t *smbios_tables; 62 size_t smbios_tables_len; 63 unsigned smbios_table_max; 64 unsigned smbios_table_cnt; 65 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 66 67 static SmbiosEntryPoint ep; 68 69 static int smbios_type4_count = 0; 70 static bool smbios_immutable; 71 static bool smbios_have_defaults; 72 static uint32_t smbios_cpuid_version, smbios_cpuid_features; 73 74 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1); 75 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1); 76 77 static struct { 78 const char *vendor, *version, *date; 79 bool have_major_minor, uefi; 80 uint8_t major, minor; 81 } type0; 82 83 static struct { 84 const char *manufacturer, *product, *version, *serial, *sku, *family; 85 /* uuid is in qemu_uuid */ 86 } type1; 87 88 static struct { 89 const char *manufacturer, *product, *version, *serial, *asset, *location; 90 } type2; 91 92 static struct { 93 const char *manufacturer, *version, *serial, *asset, *sku; 94 } type3; 95 96 /* 97 * SVVP requires max_speed and current_speed to be set and not being 98 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the 99 * default value to 2000MHz as we did before. 100 */ 101 #define DEFAULT_CPU_SPEED 2000 102 103 static struct { 104 uint16_t processor_family; 105 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; 106 uint64_t max_speed; 107 uint64_t current_speed; 108 uint64_t processor_id; 109 } type4 = { 110 .max_speed = DEFAULT_CPU_SPEED, 111 .current_speed = DEFAULT_CPU_SPEED, 112 .processor_id = 0, 113 .processor_family = 0x01, /* Other */ 114 }; 115 116 struct type8_instance { 117 const char *internal_reference, *external_reference; 118 uint8_t connector_type, port_type; 119 QTAILQ_ENTRY(type8_instance) next; 120 }; 121 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8); 122 123 /* type 9 instance for parsing */ 124 struct type9_instance { 125 const char *slot_designation, *pcidev; 126 uint8_t slot_type, slot_data_bus_width, current_usage, slot_length, 127 slot_characteristics1, slot_characteristics2; 128 uint16_t slot_id; 129 QTAILQ_ENTRY(type9_instance) next; 130 }; 131 static QTAILQ_HEAD(, type9_instance) type9 = QTAILQ_HEAD_INITIALIZER(type9); 132 133 static struct { 134 size_t nvalues; 135 char **values; 136 } type11; 137 138 static struct { 139 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part; 140 uint16_t speed; 141 } type17; 142 143 static QEnumLookup type41_kind_lookup = { 144 .array = (const char *const[]) { 145 "other", 146 "unknown", 147 "video", 148 "scsi", 149 "ethernet", 150 "tokenring", 151 "sound", 152 "pata", 153 "sata", 154 "sas", 155 }, 156 .size = 10 157 }; 158 struct type41_instance { 159 const char *designation, *pcidev; 160 uint8_t instance, kind; 161 QTAILQ_ENTRY(type41_instance) next; 162 }; 163 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41); 164 165 static QemuOptsList qemu_smbios_opts = { 166 .name = "smbios", 167 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head), 168 .desc = { 169 /* 170 * no elements => accept any params 171 * validation will happen later 172 */ 173 { /* end of list */ } 174 } 175 }; 176 177 static const QemuOptDesc qemu_smbios_file_opts[] = { 178 { 179 .name = "file", 180 .type = QEMU_OPT_STRING, 181 .help = "binary file containing an SMBIOS element", 182 }, 183 { /* end of list */ } 184 }; 185 186 static const QemuOptDesc qemu_smbios_type0_opts[] = { 187 { 188 .name = "type", 189 .type = QEMU_OPT_NUMBER, 190 .help = "SMBIOS element type", 191 },{ 192 .name = "vendor", 193 .type = QEMU_OPT_STRING, 194 .help = "vendor name", 195 },{ 196 .name = "version", 197 .type = QEMU_OPT_STRING, 198 .help = "version number", 199 },{ 200 .name = "date", 201 .type = QEMU_OPT_STRING, 202 .help = "release date", 203 },{ 204 .name = "release", 205 .type = QEMU_OPT_STRING, 206 .help = "revision number", 207 },{ 208 .name = "uefi", 209 .type = QEMU_OPT_BOOL, 210 .help = "uefi support", 211 }, 212 { /* end of list */ } 213 }; 214 215 static const QemuOptDesc qemu_smbios_type1_opts[] = { 216 { 217 .name = "type", 218 .type = QEMU_OPT_NUMBER, 219 .help = "SMBIOS element type", 220 },{ 221 .name = "manufacturer", 222 .type = QEMU_OPT_STRING, 223 .help = "manufacturer name", 224 },{ 225 .name = "product", 226 .type = QEMU_OPT_STRING, 227 .help = "product name", 228 },{ 229 .name = "version", 230 .type = QEMU_OPT_STRING, 231 .help = "version number", 232 },{ 233 .name = "serial", 234 .type = QEMU_OPT_STRING, 235 .help = "serial number", 236 },{ 237 .name = "uuid", 238 .type = QEMU_OPT_STRING, 239 .help = "UUID", 240 },{ 241 .name = "sku", 242 .type = QEMU_OPT_STRING, 243 .help = "SKU number", 244 },{ 245 .name = "family", 246 .type = QEMU_OPT_STRING, 247 .help = "family name", 248 }, 249 { /* end of list */ } 250 }; 251 252 static const QemuOptDesc qemu_smbios_type2_opts[] = { 253 { 254 .name = "type", 255 .type = QEMU_OPT_NUMBER, 256 .help = "SMBIOS element type", 257 },{ 258 .name = "manufacturer", 259 .type = QEMU_OPT_STRING, 260 .help = "manufacturer name", 261 },{ 262 .name = "product", 263 .type = QEMU_OPT_STRING, 264 .help = "product name", 265 },{ 266 .name = "version", 267 .type = QEMU_OPT_STRING, 268 .help = "version number", 269 },{ 270 .name = "serial", 271 .type = QEMU_OPT_STRING, 272 .help = "serial number", 273 },{ 274 .name = "asset", 275 .type = QEMU_OPT_STRING, 276 .help = "asset tag number", 277 },{ 278 .name = "location", 279 .type = QEMU_OPT_STRING, 280 .help = "location in chassis", 281 }, 282 { /* end of list */ } 283 }; 284 285 static const QemuOptDesc qemu_smbios_type3_opts[] = { 286 { 287 .name = "type", 288 .type = QEMU_OPT_NUMBER, 289 .help = "SMBIOS element type", 290 },{ 291 .name = "manufacturer", 292 .type = QEMU_OPT_STRING, 293 .help = "manufacturer name", 294 },{ 295 .name = "version", 296 .type = QEMU_OPT_STRING, 297 .help = "version number", 298 },{ 299 .name = "serial", 300 .type = QEMU_OPT_STRING, 301 .help = "serial number", 302 },{ 303 .name = "asset", 304 .type = QEMU_OPT_STRING, 305 .help = "asset tag number", 306 },{ 307 .name = "sku", 308 .type = QEMU_OPT_STRING, 309 .help = "SKU number", 310 }, 311 { /* end of list */ } 312 }; 313 314 static const QemuOptDesc qemu_smbios_type4_opts[] = { 315 { 316 .name = "type", 317 .type = QEMU_OPT_NUMBER, 318 .help = "SMBIOS element type", 319 },{ 320 .name = "sock_pfx", 321 .type = QEMU_OPT_STRING, 322 .help = "socket designation string prefix", 323 },{ 324 .name = "manufacturer", 325 .type = QEMU_OPT_STRING, 326 .help = "manufacturer name", 327 },{ 328 .name = "version", 329 .type = QEMU_OPT_STRING, 330 .help = "version number", 331 },{ 332 .name = "max-speed", 333 .type = QEMU_OPT_NUMBER, 334 .help = "max speed in MHz", 335 },{ 336 .name = "current-speed", 337 .type = QEMU_OPT_NUMBER, 338 .help = "speed at system boot in MHz", 339 },{ 340 .name = "serial", 341 .type = QEMU_OPT_STRING, 342 .help = "serial number", 343 },{ 344 .name = "asset", 345 .type = QEMU_OPT_STRING, 346 .help = "asset tag number", 347 },{ 348 .name = "part", 349 .type = QEMU_OPT_STRING, 350 .help = "part number", 351 }, { 352 .name = "processor-family", 353 .type = QEMU_OPT_NUMBER, 354 .help = "processor family", 355 }, { 356 .name = "processor-id", 357 .type = QEMU_OPT_NUMBER, 358 .help = "processor id", 359 }, 360 { /* end of list */ } 361 }; 362 363 static const QemuOptDesc qemu_smbios_type8_opts[] = { 364 { 365 .name = "type", 366 .type = QEMU_OPT_NUMBER, 367 .help = "SMBIOS element type", 368 }, 369 { 370 .name = "internal_reference", 371 .type = QEMU_OPT_STRING, 372 .help = "internal reference designator", 373 }, 374 { 375 .name = "external_reference", 376 .type = QEMU_OPT_STRING, 377 .help = "external reference designator", 378 }, 379 { 380 .name = "connector_type", 381 .type = QEMU_OPT_NUMBER, 382 .help = "connector type", 383 }, 384 { 385 .name = "port_type", 386 .type = QEMU_OPT_NUMBER, 387 .help = "port type", 388 }, 389 { /* end of list */ } 390 }; 391 392 static const QemuOptDesc qemu_smbios_type9_opts[] = { 393 { 394 .name = "type", 395 .type = QEMU_OPT_NUMBER, 396 .help = "SMBIOS element type", 397 }, 398 { 399 .name = "slot_designation", 400 .type = QEMU_OPT_STRING, 401 .help = "string number for reference designation", 402 }, 403 { 404 .name = "slot_type", 405 .type = QEMU_OPT_NUMBER, 406 .help = "connector type", 407 }, 408 { 409 .name = "slot_data_bus_width", 410 .type = QEMU_OPT_NUMBER, 411 .help = "port type", 412 }, 413 { 414 .name = "current_usage", 415 .type = QEMU_OPT_NUMBER, 416 .help = "current usage", 417 }, 418 { 419 .name = "slot_length", 420 .type = QEMU_OPT_NUMBER, 421 .help = "system slot length", 422 }, 423 { 424 .name = "slot_id", 425 .type = QEMU_OPT_NUMBER, 426 .help = "system slot id", 427 }, 428 { 429 .name = "slot_characteristics1", 430 .type = QEMU_OPT_NUMBER, 431 .help = "slot characteristics1, see the spec", 432 }, 433 { 434 .name = "slot_characteristics2", 435 .type = QEMU_OPT_NUMBER, 436 .help = "slot characteristics2, see the spec", 437 }, 438 { 439 .name = "pci_device", 440 .type = QEMU_OPT_STRING, 441 .help = "PCI device, if provided." 442 } 443 }; 444 445 static const QemuOptDesc qemu_smbios_type11_opts[] = { 446 { 447 .name = "type", 448 .type = QEMU_OPT_NUMBER, 449 .help = "SMBIOS element type", 450 }, 451 { 452 .name = "value", 453 .type = QEMU_OPT_STRING, 454 .help = "OEM string data", 455 }, 456 { 457 .name = "path", 458 .type = QEMU_OPT_STRING, 459 .help = "OEM string data from file", 460 }, 461 { /* end of list */ } 462 }; 463 464 static const QemuOptDesc qemu_smbios_type17_opts[] = { 465 { 466 .name = "type", 467 .type = QEMU_OPT_NUMBER, 468 .help = "SMBIOS element type", 469 },{ 470 .name = "loc_pfx", 471 .type = QEMU_OPT_STRING, 472 .help = "device locator string prefix", 473 },{ 474 .name = "bank", 475 .type = QEMU_OPT_STRING, 476 .help = "bank locator string", 477 },{ 478 .name = "manufacturer", 479 .type = QEMU_OPT_STRING, 480 .help = "manufacturer name", 481 },{ 482 .name = "serial", 483 .type = QEMU_OPT_STRING, 484 .help = "serial number", 485 },{ 486 .name = "asset", 487 .type = QEMU_OPT_STRING, 488 .help = "asset tag number", 489 },{ 490 .name = "part", 491 .type = QEMU_OPT_STRING, 492 .help = "part number", 493 },{ 494 .name = "speed", 495 .type = QEMU_OPT_NUMBER, 496 .help = "maximum capable speed", 497 }, 498 { /* end of list */ } 499 }; 500 501 static const QemuOptDesc qemu_smbios_type41_opts[] = { 502 { 503 .name = "type", 504 .type = QEMU_OPT_NUMBER, 505 .help = "SMBIOS element type", 506 },{ 507 .name = "designation", 508 .type = QEMU_OPT_STRING, 509 .help = "reference designation string", 510 },{ 511 .name = "kind", 512 .type = QEMU_OPT_STRING, 513 .help = "device type", 514 .def_value_str = "other", 515 },{ 516 .name = "instance", 517 .type = QEMU_OPT_NUMBER, 518 .help = "device type instance", 519 },{ 520 .name = "pcidev", 521 .type = QEMU_OPT_STRING, 522 .help = "PCI device", 523 }, 524 { /* end of list */ } 525 }; 526 527 static void smbios_register_config(void) 528 { 529 qemu_add_opts(&qemu_smbios_opts); 530 } 531 532 opts_init(smbios_register_config); 533 534 /* 535 * The SMBIOS 2.1 "structure table length" field in the 536 * entry point uses a 16-bit integer, so we're limited 537 * in total table size 538 */ 539 #define SMBIOS_21_MAX_TABLES_LEN 0xffff 540 541 static void smbios_validate_table(uint32_t expected_t4_count) 542 { 543 if (smbios_type4_count && smbios_type4_count != expected_t4_count) { 544 error_report("Expected %d SMBIOS Type 4 tables, got %d instead", 545 expected_t4_count, smbios_type4_count); 546 exit(1); 547 } 548 549 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 && 550 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) { 551 error_report("SMBIOS 2.1 table length %zu exceeds %d", 552 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN); 553 exit(1); 554 } 555 } 556 557 558 /* legacy setup functions for <= 2.0 machines */ 559 static void smbios_add_field(int type, int offset, const void *data, size_t len) 560 { 561 struct smbios_field *field; 562 563 if (!smbios_entries) { 564 smbios_entries_len = sizeof(uint16_t); 565 smbios_entries = g_malloc0(smbios_entries_len); 566 } 567 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 568 sizeof(*field) + len); 569 field = (struct smbios_field *)(smbios_entries + smbios_entries_len); 570 field->header.type = SMBIOS_FIELD_ENTRY; 571 field->header.length = cpu_to_le16(sizeof(*field) + len); 572 573 field->type = type; 574 field->offset = cpu_to_le16(offset); 575 memcpy(field->data, data, len); 576 577 smbios_entries_len += sizeof(*field) + len; 578 (*(uint16_t *)smbios_entries) = 579 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 580 } 581 582 static void smbios_maybe_add_str(int type, int offset, const char *data) 583 { 584 if (data) { 585 smbios_add_field(type, offset, data, strlen(data) + 1); 586 } 587 } 588 589 static void smbios_build_type_0_fields(void) 590 { 591 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), 592 type0.vendor); 593 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), 594 type0.version); 595 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, 596 bios_release_date_str), 597 type0.date); 598 if (type0.have_major_minor) { 599 smbios_add_field(0, offsetof(struct smbios_type_0, 600 system_bios_major_release), 601 &type0.major, 1); 602 smbios_add_field(0, offsetof(struct smbios_type_0, 603 system_bios_minor_release), 604 &type0.minor, 1); 605 } 606 } 607 608 static void smbios_build_type_1_fields(void) 609 { 610 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), 611 type1.manufacturer); 612 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), 613 type1.product); 614 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), 615 type1.version); 616 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), 617 type1.serial); 618 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), 619 type1.sku); 620 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str), 621 type1.family); 622 if (qemu_uuid_set) { 623 /* We don't encode the UUID in the "wire format" here because this 624 * function is for legacy mode and needs to keep the guest ABI, and 625 * because we don't know what's the SMBIOS version advertised by the 626 * BIOS. 627 */ 628 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 629 &qemu_uuid, 16); 630 } 631 } 632 633 uint8_t *smbios_get_table_legacy(uint32_t expected_t4_count, size_t *length) 634 { 635 /* drop unwanted version of command-line file blob(s) */ 636 g_free(smbios_tables); 637 smbios_tables = NULL; 638 639 /* also complain if fields were given for types > 1 */ 640 if (find_next_bit(have_fields_bitmap, 641 SMBIOS_MAX_TYPE + 1, 2) < SMBIOS_MAX_TYPE + 1) { 642 error_report("can't process fields for smbios " 643 "types > 1 on machine versions < 2.1!"); 644 exit(1); 645 } 646 647 if (!smbios_immutable) { 648 smbios_build_type_0_fields(); 649 smbios_build_type_1_fields(); 650 smbios_validate_table(expected_t4_count); 651 smbios_immutable = true; 652 } 653 *length = smbios_entries_len; 654 return smbios_entries; 655 } 656 /* end: legacy setup functions for <= 2.0 machines */ 657 658 659 bool smbios_skip_table(uint8_t type, bool required_table) 660 { 661 if (test_bit(type, have_binfile_bitmap)) { 662 return true; /* user provided their own binary blob(s) */ 663 } 664 if (test_bit(type, have_fields_bitmap)) { 665 return false; /* user provided fields via command line */ 666 } 667 if (smbios_have_defaults && required_table) { 668 return false; /* we're building tables, and this one's required */ 669 } 670 return true; 671 } 672 673 #define T0_BASE 0x000 674 #define T1_BASE 0x100 675 #define T2_BASE 0x200 676 #define T3_BASE 0x300 677 #define T4_BASE 0x400 678 #define T9_BASE 0x900 679 #define T11_BASE 0xe00 680 681 #define T16_BASE 0x1000 682 #define T17_BASE 0x1100 683 #define T19_BASE 0x1300 684 #define T32_BASE 0x2000 685 #define T41_BASE 0x2900 686 #define T127_BASE 0x7F00 687 688 static void smbios_build_type_0_table(void) 689 { 690 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */ 691 692 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor); 693 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version); 694 695 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */ 696 697 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date); 698 699 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */ 700 701 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */ 702 t->bios_characteristics_extension_bytes[0] = 0; 703 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */ 704 if (type0.uefi) { 705 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */ 706 } 707 708 if (type0.have_major_minor) { 709 t->system_bios_major_release = type0.major; 710 t->system_bios_minor_release = type0.minor; 711 } else { 712 t->system_bios_major_release = 0; 713 t->system_bios_minor_release = 0; 714 } 715 716 /* hardcoded in SeaBIOS */ 717 t->embedded_controller_major_release = 0xFF; 718 t->embedded_controller_minor_release = 0xFF; 719 720 SMBIOS_BUILD_TABLE_POST; 721 } 722 723 /* Encode UUID from the big endian encoding described on RFC4122 to the wire 724 * format specified by SMBIOS version 2.6. 725 */ 726 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) 727 { 728 memcpy(uuid, in, 16); 729 if (smbios_uuid_encoded) { 730 uuid->time_low = bswap32(uuid->time_low); 731 uuid->time_mid = bswap16(uuid->time_mid); 732 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); 733 } 734 } 735 736 static void smbios_build_type_1_table(void) 737 { 738 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */ 739 740 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer); 741 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product); 742 SMBIOS_TABLE_SET_STR(1, version_str, type1.version); 743 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial); 744 if (qemu_uuid_set) { 745 smbios_encode_uuid(&t->uuid, &qemu_uuid); 746 } else { 747 memset(&t->uuid, 0, 16); 748 } 749 t->wake_up_type = 0x06; /* power switch */ 750 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku); 751 SMBIOS_TABLE_SET_STR(1, family_str, type1.family); 752 753 SMBIOS_BUILD_TABLE_POST; 754 } 755 756 static void smbios_build_type_2_table(void) 757 { 758 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */ 759 760 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer); 761 SMBIOS_TABLE_SET_STR(2, product_str, type2.product); 762 SMBIOS_TABLE_SET_STR(2, version_str, type2.version); 763 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial); 764 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset); 765 t->feature_flags = 0x01; /* Motherboard */ 766 SMBIOS_TABLE_SET_STR(2, location_str, type2.location); 767 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */ 768 t->board_type = 0x0A; /* Motherboard */ 769 t->contained_element_count = 0; 770 771 SMBIOS_BUILD_TABLE_POST; 772 } 773 774 static void smbios_build_type_3_table(void) 775 { 776 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */ 777 778 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer); 779 t->type = 0x01; /* Other */ 780 SMBIOS_TABLE_SET_STR(3, version_str, type3.version); 781 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial); 782 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset); 783 t->boot_up_state = 0x03; /* Safe */ 784 t->power_supply_state = 0x03; /* Safe */ 785 t->thermal_state = 0x03; /* Safe */ 786 t->security_status = 0x02; /* Unknown */ 787 t->oem_defined = cpu_to_le32(0); 788 t->height = 0; 789 t->number_of_power_cords = 0; 790 t->contained_element_count = 0; 791 t->contained_element_record_length = 0; 792 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku); 793 794 SMBIOS_BUILD_TABLE_POST; 795 } 796 797 static void smbios_build_type_4_table(MachineState *ms, unsigned instance) 798 { 799 char sock_str[128]; 800 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28; 801 unsigned threads_per_socket; 802 unsigned cores_per_socket; 803 804 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) { 805 tbl_len = SMBIOS_TYPE_4_LEN_V30; 806 } 807 808 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance, 809 true, tbl_len); /* required */ 810 811 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); 812 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); 813 t->processor_type = 0x03; /* CPU */ 814 t->processor_family = 0xfe; /* use Processor Family 2 field */ 815 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); 816 if (type4.processor_id == 0) { 817 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); 818 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); 819 } else { 820 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); 821 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); 822 } 823 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); 824 t->voltage = 0; 825 t->external_clock = cpu_to_le16(0); /* Unknown */ 826 t->max_speed = cpu_to_le16(type4.max_speed); 827 t->current_speed = cpu_to_le16(type4.current_speed); 828 t->status = 0x41; /* Socket populated, CPU enabled */ 829 t->processor_upgrade = 0x01; /* Other */ 830 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 831 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 832 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 833 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial); 834 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset); 835 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part); 836 837 threads_per_socket = machine_topo_get_threads_per_socket(ms); 838 cores_per_socket = machine_topo_get_cores_per_socket(ms); 839 840 t->core_count = (cores_per_socket > 255) ? 0xFF : cores_per_socket; 841 t->core_enabled = t->core_count; 842 843 t->thread_count = (threads_per_socket > 255) ? 0xFF : threads_per_socket; 844 845 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ 846 t->processor_family2 = cpu_to_le16(type4.processor_family); 847 848 if (tbl_len == SMBIOS_TYPE_4_LEN_V30) { 849 t->core_count2 = t->core_enabled2 = cpu_to_le16(cores_per_socket); 850 t->thread_count2 = cpu_to_le16(threads_per_socket); 851 } 852 853 SMBIOS_BUILD_TABLE_POST; 854 smbios_type4_count++; 855 } 856 857 static void smbios_build_type_8_table(void) 858 { 859 unsigned instance = 0; 860 struct type8_instance *t8; 861 862 QTAILQ_FOREACH(t8, &type8, next) { 863 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true); 864 865 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference); 866 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference); 867 /* most vendors seem to set this to None */ 868 t->internal_connector_type = 0x0; 869 t->external_connector_type = t8->connector_type; 870 t->port_type = t8->port_type; 871 872 SMBIOS_BUILD_TABLE_POST; 873 instance++; 874 } 875 } 876 877 static void smbios_build_type_9_table(Error **errp) 878 { 879 unsigned instance = 0; 880 struct type9_instance *t9; 881 882 QTAILQ_FOREACH(t9, &type9, next) { 883 SMBIOS_BUILD_TABLE_PRE(9, T9_BASE + instance, true); 884 885 SMBIOS_TABLE_SET_STR(9, slot_designation, t9->slot_designation); 886 t->slot_type = t9->slot_type; 887 t->slot_data_bus_width = t9->slot_data_bus_width; 888 t->current_usage = t9->current_usage; 889 t->slot_length = t9->slot_length; 890 t->slot_id = t9->slot_id; 891 t->slot_characteristics1 = t9->slot_characteristics1; 892 t->slot_characteristics2 = t9->slot_characteristics2; 893 894 if (t9->pcidev) { 895 PCIDevice *pdev = NULL; 896 int rc = pci_qdev_find_device(t9->pcidev, &pdev); 897 if (rc != 0) { 898 error_setg(errp, 899 "No PCI device %s for SMBIOS type 9 entry %s", 900 t9->pcidev, t9->slot_designation); 901 return; 902 } 903 /* 904 * We only handle the case were the device is attached to 905 * the PCI root bus. The general case is more complex as 906 * bridges are enumerated later and the table would need 907 * to be updated at this moment. 908 */ 909 if (!pci_bus_is_root(pci_get_bus(pdev))) { 910 error_setg(errp, 911 "Cannot create type 9 entry for PCI device %s: " 912 "not attached to the root bus", 913 t9->pcidev); 914 return; 915 } 916 t->segment_group_number = cpu_to_le16(0); 917 t->bus_number = pci_dev_bus_num(pdev); 918 t->device_number = pdev->devfn; 919 } else { 920 /* 921 * Per SMBIOS spec, For slots that are not of the PCI, AGP, PCI-X, 922 * or PCI-Express type that do not have bus/device/function 923 * information, 0FFh should be populated in the fields of Segment 924 * Group Number, Bus Number, Device/Function Number. 925 */ 926 t->segment_group_number = 0xff; 927 t->bus_number = 0xff; 928 t->device_number = 0xff; 929 } 930 931 SMBIOS_BUILD_TABLE_POST; 932 instance++; 933 } 934 } 935 936 static void smbios_build_type_11_table(void) 937 { 938 char count_str[128]; 939 size_t i; 940 941 if (type11.nvalues == 0) { 942 return; 943 } 944 945 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */ 946 947 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues); 948 t->count = type11.nvalues; 949 950 for (i = 0; i < type11.nvalues; i++) { 951 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]); 952 g_free(type11.values[i]); 953 type11.values[i] = NULL; 954 } 955 956 SMBIOS_BUILD_TABLE_POST; 957 } 958 959 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */ 960 961 static void smbios_build_type_16_table(unsigned dimm_cnt) 962 { 963 uint64_t size_kb; 964 965 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */ 966 967 t->location = 0x01; /* Other */ 968 t->use = 0x03; /* System memory */ 969 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */ 970 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB; 971 if (size_kb < MAX_T16_STD_SZ) { 972 t->maximum_capacity = cpu_to_le32(size_kb); 973 t->extended_maximum_capacity = cpu_to_le64(0); 974 } else { 975 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ); 976 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size); 977 } 978 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 979 t->number_of_memory_devices = cpu_to_le16(dimm_cnt); 980 981 SMBIOS_BUILD_TABLE_POST; 982 } 983 984 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */ 985 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */ 986 987 static void smbios_build_type_17_table(unsigned instance, uint64_t size) 988 { 989 char loc_str[128]; 990 uint64_t size_mb; 991 992 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */ 993 994 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 995 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 996 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */ 997 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ 998 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB; 999 if (size_mb < MAX_T17_STD_SZ) { 1000 t->size = cpu_to_le16(size_mb); 1001 t->extended_size = cpu_to_le32(0); 1002 } else { 1003 assert(size_mb < MAX_T17_EXT_SZ); 1004 t->size = cpu_to_le16(MAX_T17_STD_SZ); 1005 t->extended_size = cpu_to_le32(size_mb); 1006 } 1007 t->form_factor = 0x09; /* DIMM */ 1008 t->device_set = 0; /* Not in a set */ 1009 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance); 1010 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); 1011 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); 1012 t->memory_type = 0x07; /* RAM */ 1013 t->type_detail = cpu_to_le16(0x02); /* Other */ 1014 t->speed = cpu_to_le16(type17.speed); 1015 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); 1016 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); 1017 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset); 1018 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part); 1019 t->attributes = 0; /* Unknown */ 1020 t->configured_clock_speed = t->speed; /* reuse value for max speed */ 1021 t->minimum_voltage = cpu_to_le16(0); /* Unknown */ 1022 t->maximum_voltage = cpu_to_le16(0); /* Unknown */ 1023 t->configured_voltage = cpu_to_le16(0); /* Unknown */ 1024 1025 SMBIOS_BUILD_TABLE_POST; 1026 } 1027 1028 static void smbios_build_type_19_table(unsigned instance, unsigned offset, 1029 uint64_t start, uint64_t size) 1030 { 1031 uint64_t end, start_kb, end_kb; 1032 1033 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance, 1034 true); /* required */ 1035 1036 end = start + size - 1; 1037 assert(end > start); 1038 start_kb = start / KiB; 1039 end_kb = end / KiB; 1040 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) { 1041 t->starting_address = cpu_to_le32(start_kb); 1042 t->ending_address = cpu_to_le32(end_kb); 1043 t->extended_starting_address = 1044 t->extended_ending_address = cpu_to_le64(0); 1045 } else { 1046 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX); 1047 t->extended_starting_address = cpu_to_le64(start); 1048 t->extended_ending_address = cpu_to_le64(end); 1049 } 1050 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 1051 t->partition_width = 1; /* One device per row */ 1052 1053 SMBIOS_BUILD_TABLE_POST; 1054 } 1055 1056 static void smbios_build_type_32_table(void) 1057 { 1058 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */ 1059 1060 memset(t->reserved, 0, 6); 1061 t->boot_status = 0; /* No errors detected */ 1062 1063 SMBIOS_BUILD_TABLE_POST; 1064 } 1065 1066 static void smbios_build_type_41_table(Error **errp) 1067 { 1068 unsigned instance = 0; 1069 struct type41_instance *t41; 1070 1071 QTAILQ_FOREACH(t41, &type41, next) { 1072 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true); 1073 1074 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation); 1075 t->device_type = t41->kind; 1076 t->device_type_instance = t41->instance; 1077 t->segment_group_number = cpu_to_le16(0); 1078 t->bus_number = 0; 1079 t->device_number = 0; 1080 1081 if (t41->pcidev) { 1082 PCIDevice *pdev = NULL; 1083 int rc = pci_qdev_find_device(t41->pcidev, &pdev); 1084 if (rc != 0) { 1085 error_setg(errp, 1086 "No PCI device %s for SMBIOS type 41 entry %s", 1087 t41->pcidev, t41->designation); 1088 return; 1089 } 1090 /* 1091 * We only handle the case were the device is attached to 1092 * the PCI root bus. The general case is more complex as 1093 * bridges are enumerated later and the table would need 1094 * to be updated at this moment. 1095 */ 1096 if (!pci_bus_is_root(pci_get_bus(pdev))) { 1097 error_setg(errp, 1098 "Cannot create type 41 entry for PCI device %s: " 1099 "not attached to the root bus", 1100 t41->pcidev); 1101 return; 1102 } 1103 t->segment_group_number = cpu_to_le16(0); 1104 t->bus_number = pci_dev_bus_num(pdev); 1105 t->device_number = pdev->devfn; 1106 } 1107 1108 SMBIOS_BUILD_TABLE_POST; 1109 instance++; 1110 } 1111 } 1112 1113 static void smbios_build_type_127_table(void) 1114 { 1115 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */ 1116 SMBIOS_BUILD_TABLE_POST; 1117 } 1118 1119 void smbios_set_cpuid(uint32_t version, uint32_t features) 1120 { 1121 smbios_cpuid_version = version; 1122 smbios_cpuid_features = features; 1123 } 1124 1125 #define SMBIOS_SET_DEFAULT(field, value) \ 1126 if (!field) { \ 1127 field = value; \ 1128 } 1129 1130 void smbios_set_default_processor_family(uint16_t processor_family) 1131 { 1132 if (type4.processor_family <= 0x01) { 1133 type4.processor_family = processor_family; 1134 } 1135 } 1136 1137 void smbios_set_defaults(const char *manufacturer, const char *product, 1138 const char *version, 1139 bool uuid_encoded, SmbiosEntryPointType ep_type) 1140 { 1141 smbios_have_defaults = true; 1142 smbios_uuid_encoded = uuid_encoded; 1143 smbios_ep_type = ep_type; 1144 1145 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); 1146 SMBIOS_SET_DEFAULT(type1.product, product); 1147 SMBIOS_SET_DEFAULT(type1.version, version); 1148 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); 1149 SMBIOS_SET_DEFAULT(type2.product, product); 1150 SMBIOS_SET_DEFAULT(type2.version, version); 1151 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); 1152 SMBIOS_SET_DEFAULT(type3.version, version); 1153 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); 1154 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); 1155 SMBIOS_SET_DEFAULT(type4.version, version); 1156 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); 1157 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); 1158 } 1159 1160 static void smbios_entry_point_setup(void) 1161 { 1162 switch (smbios_ep_type) { 1163 case SMBIOS_ENTRY_POINT_TYPE_32: 1164 memcpy(ep.ep21.anchor_string, "_SM_", 4); 1165 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); 1166 ep.ep21.length = sizeof(struct smbios_21_entry_point); 1167 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ 1168 memset(ep.ep21.formatted_area, 0, 5); 1169 1170 /* compliant with smbios spec v2.8 */ 1171 ep.ep21.smbios_major_version = 2; 1172 ep.ep21.smbios_minor_version = 8; 1173 ep.ep21.smbios_bcd_revision = 0x28; 1174 1175 /* set during table construction, but BIOS may override: */ 1176 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); 1177 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); 1178 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); 1179 1180 /* BIOS must recalculate */ 1181 ep.ep21.checksum = 0; 1182 ep.ep21.intermediate_checksum = 0; 1183 ep.ep21.structure_table_address = cpu_to_le32(0); 1184 1185 break; 1186 case SMBIOS_ENTRY_POINT_TYPE_64: 1187 memcpy(ep.ep30.anchor_string, "_SM3_", 5); 1188 ep.ep30.length = sizeof(struct smbios_30_entry_point); 1189 ep.ep30.entry_point_revision = 1; 1190 ep.ep30.reserved = 0; 1191 1192 /* compliant with smbios spec 3.0 */ 1193 ep.ep30.smbios_major_version = 3; 1194 ep.ep30.smbios_minor_version = 0; 1195 ep.ep30.smbios_doc_rev = 0; 1196 1197 /* set during table construct, but BIOS might override */ 1198 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); 1199 1200 /* BIOS must recalculate */ 1201 ep.ep30.checksum = 0; 1202 ep.ep30.structure_table_address = cpu_to_le64(0); 1203 1204 break; 1205 default: 1206 abort(); 1207 break; 1208 } 1209 } 1210 1211 void smbios_get_tables(MachineState *ms, 1212 const struct smbios_phys_mem_area *mem_array, 1213 const unsigned int mem_array_size, 1214 uint8_t **tables, size_t *tables_len, 1215 uint8_t **anchor, size_t *anchor_len, 1216 Error **errp) 1217 { 1218 unsigned i, dimm_cnt, offset; 1219 1220 /* drop unwanted (legacy) version of command-line file blob(s) */ 1221 g_free(smbios_entries); 1222 smbios_entries = NULL; 1223 1224 if (!smbios_immutable) { 1225 smbios_build_type_0_table(); 1226 smbios_build_type_1_table(); 1227 smbios_build_type_2_table(); 1228 smbios_build_type_3_table(); 1229 1230 assert(ms->smp.sockets >= 1); 1231 1232 for (i = 0; i < ms->smp.sockets; i++) { 1233 smbios_build_type_4_table(ms, i); 1234 } 1235 1236 smbios_build_type_8_table(); 1237 smbios_build_type_9_table(errp); 1238 smbios_build_type_11_table(); 1239 1240 #define MAX_DIMM_SZ (16 * GiB) 1241 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \ 1242 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1) 1243 1244 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ; 1245 1246 /* 1247 * The offset determines if we need to keep additional space between 1248 * table 17 and table 19 header handle numbers so that they do 1249 * not overlap. For example, for a VM with larger than 8 TB guest 1250 * memory and DIMM like chunks of 16 GiB, the default space between 1251 * the two tables (T19_BASE - T17_BASE = 512) is not enough. 1252 */ 1253 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \ 1254 dimm_cnt - (T19_BASE - T17_BASE) : 0; 1255 1256 smbios_build_type_16_table(dimm_cnt); 1257 1258 for (i = 0; i < dimm_cnt; i++) { 1259 smbios_build_type_17_table(i, GET_DIMM_SZ); 1260 } 1261 1262 for (i = 0; i < mem_array_size; i++) { 1263 smbios_build_type_19_table(i, offset, mem_array[i].address, 1264 mem_array[i].length); 1265 } 1266 1267 /* 1268 * make sure 16 bit handle numbers in the headers of tables 19 1269 * and 32 do not overlap. 1270 */ 1271 assert((mem_array_size + offset) < (T32_BASE - T19_BASE)); 1272 1273 smbios_build_type_32_table(); 1274 smbios_build_type_38_table(); 1275 smbios_build_type_41_table(errp); 1276 smbios_build_type_127_table(); 1277 1278 smbios_validate_table(ms->smp.sockets); 1279 smbios_entry_point_setup(); 1280 smbios_immutable = true; 1281 } 1282 1283 /* return tables blob and entry point (anchor), and their sizes */ 1284 *tables = smbios_tables; 1285 *tables_len = smbios_tables_len; 1286 *anchor = (uint8_t *)&ep; 1287 1288 /* calculate length based on anchor string */ 1289 if (!strncmp((char *)&ep, "_SM_", 4)) { 1290 *anchor_len = sizeof(struct smbios_21_entry_point); 1291 } else if (!strncmp((char *)&ep, "_SM3_", 5)) { 1292 *anchor_len = sizeof(struct smbios_30_entry_point); 1293 } else { 1294 abort(); 1295 } 1296 } 1297 1298 static void save_opt(const char **dest, QemuOpts *opts, const char *name) 1299 { 1300 const char *val = qemu_opt_get(opts, name); 1301 1302 if (val) { 1303 *dest = val; 1304 } 1305 } 1306 1307 1308 struct opt_list { 1309 size_t *ndest; 1310 char ***dest; 1311 }; 1312 1313 static int save_opt_one(void *opaque, 1314 const char *name, const char *value, 1315 Error **errp) 1316 { 1317 struct opt_list *opt = opaque; 1318 1319 if (g_str_equal(name, "path")) { 1320 g_autoptr(GByteArray) data = g_byte_array_new(); 1321 g_autofree char *buf = g_new(char, 4096); 1322 ssize_t ret; 1323 int fd = qemu_open(value, O_RDONLY, errp); 1324 if (fd < 0) { 1325 return -1; 1326 } 1327 1328 while (1) { 1329 ret = read(fd, buf, 4096); 1330 if (ret == 0) { 1331 break; 1332 } 1333 if (ret < 0) { 1334 error_setg(errp, "Unable to read from %s: %s", 1335 value, strerror(errno)); 1336 qemu_close(fd); 1337 return -1; 1338 } 1339 if (memchr(buf, '\0', ret)) { 1340 error_setg(errp, "NUL in OEM strings value in %s", value); 1341 qemu_close(fd); 1342 return -1; 1343 } 1344 g_byte_array_append(data, (guint8 *)buf, ret); 1345 } 1346 1347 qemu_close(fd); 1348 1349 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1350 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE); 1351 (*opt->ndest)++; 1352 data = NULL; 1353 } else if (g_str_equal(name, "value")) { 1354 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1355 (*opt->dest)[*opt->ndest] = g_strdup(value); 1356 (*opt->ndest)++; 1357 } else if (!g_str_equal(name, "type")) { 1358 error_setg(errp, "Unexpected option %s", name); 1359 return -1; 1360 } 1361 1362 return 0; 1363 } 1364 1365 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts, 1366 Error **errp) 1367 { 1368 struct opt_list opt = { 1369 ndest, dest, 1370 }; 1371 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) { 1372 return false; 1373 } 1374 return true; 1375 } 1376 1377 void smbios_entry_add(QemuOpts *opts, Error **errp) 1378 { 1379 const char *val; 1380 1381 assert(!smbios_immutable); 1382 1383 val = qemu_opt_get(opts, "file"); 1384 if (val) { 1385 struct smbios_structure_header *header; 1386 int size; 1387 struct smbios_table *table; /* legacy mode only */ 1388 1389 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) { 1390 return; 1391 } 1392 1393 size = get_image_size(val); 1394 if (size == -1 || size < sizeof(struct smbios_structure_header)) { 1395 error_setg(errp, "Cannot read SMBIOS file %s", val); 1396 return; 1397 } 1398 1399 /* 1400 * NOTE: standard double '\0' terminator expected, per smbios spec. 1401 * (except in legacy mode, where the second '\0' is implicit and 1402 * will be inserted by the BIOS). 1403 */ 1404 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size); 1405 header = (struct smbios_structure_header *)(smbios_tables + 1406 smbios_tables_len); 1407 1408 if (load_image_size(val, (uint8_t *)header, size) != size) { 1409 error_setg(errp, "Failed to load SMBIOS file %s", val); 1410 return; 1411 } 1412 1413 if (header->type <= SMBIOS_MAX_TYPE) { 1414 if (test_bit(header->type, have_fields_bitmap)) { 1415 error_setg(errp, 1416 "can't load type %d struct, fields already specified!", 1417 header->type); 1418 return; 1419 } 1420 set_bit(header->type, have_binfile_bitmap); 1421 } 1422 1423 if (header->type == 4) { 1424 smbios_type4_count++; 1425 } 1426 1427 smbios_tables_len += size; 1428 if (size > smbios_table_max) { 1429 smbios_table_max = size; 1430 } 1431 smbios_table_cnt++; 1432 1433 /* add a copy of the newly loaded blob to legacy smbios_entries */ 1434 /* NOTE: This code runs before smbios_set_defaults(), so we don't 1435 * yet know which mode (legacy vs. aggregate-table) will be 1436 * required. We therefore add the binary blob to both legacy 1437 * (smbios_entries) and aggregate (smbios_tables) tables, and 1438 * delete the one we don't need from smbios_set_defaults(), 1439 * once we know which machine version has been requested. 1440 */ 1441 if (!smbios_entries) { 1442 smbios_entries_len = sizeof(uint16_t); 1443 smbios_entries = g_malloc0(smbios_entries_len); 1444 } 1445 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 1446 size + sizeof(*table)); 1447 table = (struct smbios_table *)(smbios_entries + smbios_entries_len); 1448 table->header.type = SMBIOS_TABLE_ENTRY; 1449 table->header.length = cpu_to_le16(sizeof(*table) + size); 1450 memcpy(table->data, header, size); 1451 smbios_entries_len += sizeof(*table) + size; 1452 (*(uint16_t *)smbios_entries) = 1453 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 1454 /* end: add a copy of the newly loaded blob to legacy smbios_entries */ 1455 1456 return; 1457 } 1458 1459 val = qemu_opt_get(opts, "type"); 1460 if (val) { 1461 unsigned long type = strtoul(val, NULL, 0); 1462 1463 if (type > SMBIOS_MAX_TYPE) { 1464 error_setg(errp, "out of range!"); 1465 return; 1466 } 1467 1468 if (test_bit(type, have_binfile_bitmap)) { 1469 error_setg(errp, "can't add fields, binary file already loaded!"); 1470 return; 1471 } 1472 set_bit(type, have_fields_bitmap); 1473 1474 switch (type) { 1475 case 0: 1476 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) { 1477 return; 1478 } 1479 save_opt(&type0.vendor, opts, "vendor"); 1480 save_opt(&type0.version, opts, "version"); 1481 save_opt(&type0.date, opts, "date"); 1482 type0.uefi = qemu_opt_get_bool(opts, "uefi", false); 1483 1484 val = qemu_opt_get(opts, "release"); 1485 if (val) { 1486 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) { 1487 error_setg(errp, "Invalid release"); 1488 return; 1489 } 1490 type0.have_major_minor = true; 1491 } 1492 return; 1493 case 1: 1494 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) { 1495 return; 1496 } 1497 save_opt(&type1.manufacturer, opts, "manufacturer"); 1498 save_opt(&type1.product, opts, "product"); 1499 save_opt(&type1.version, opts, "version"); 1500 save_opt(&type1.serial, opts, "serial"); 1501 save_opt(&type1.sku, opts, "sku"); 1502 save_opt(&type1.family, opts, "family"); 1503 1504 val = qemu_opt_get(opts, "uuid"); 1505 if (val) { 1506 if (qemu_uuid_parse(val, &qemu_uuid) != 0) { 1507 error_setg(errp, "Invalid UUID"); 1508 return; 1509 } 1510 qemu_uuid_set = true; 1511 } 1512 return; 1513 case 2: 1514 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) { 1515 return; 1516 } 1517 save_opt(&type2.manufacturer, opts, "manufacturer"); 1518 save_opt(&type2.product, opts, "product"); 1519 save_opt(&type2.version, opts, "version"); 1520 save_opt(&type2.serial, opts, "serial"); 1521 save_opt(&type2.asset, opts, "asset"); 1522 save_opt(&type2.location, opts, "location"); 1523 return; 1524 case 3: 1525 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) { 1526 return; 1527 } 1528 save_opt(&type3.manufacturer, opts, "manufacturer"); 1529 save_opt(&type3.version, opts, "version"); 1530 save_opt(&type3.serial, opts, "serial"); 1531 save_opt(&type3.asset, opts, "asset"); 1532 save_opt(&type3.sku, opts, "sku"); 1533 return; 1534 case 4: 1535 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) { 1536 return; 1537 } 1538 save_opt(&type4.sock_pfx, opts, "sock_pfx"); 1539 type4.processor_family = qemu_opt_get_number(opts, 1540 "processor-family", 1541 0x01 /* Other */); 1542 save_opt(&type4.manufacturer, opts, "manufacturer"); 1543 save_opt(&type4.version, opts, "version"); 1544 save_opt(&type4.serial, opts, "serial"); 1545 save_opt(&type4.asset, opts, "asset"); 1546 save_opt(&type4.part, opts, "part"); 1547 /* If the value is 0, it will take the value from the CPU model. */ 1548 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); 1549 type4.max_speed = qemu_opt_get_number(opts, "max-speed", 1550 DEFAULT_CPU_SPEED); 1551 type4.current_speed = qemu_opt_get_number(opts, "current-speed", 1552 DEFAULT_CPU_SPEED); 1553 if (type4.max_speed > UINT16_MAX || 1554 type4.current_speed > UINT16_MAX) { 1555 error_setg(errp, "SMBIOS CPU speed is too large (> %d)", 1556 UINT16_MAX); 1557 } 1558 return; 1559 case 8: 1560 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) { 1561 return; 1562 } 1563 struct type8_instance *t8_i; 1564 t8_i = g_new0(struct type8_instance, 1); 1565 save_opt(&t8_i->internal_reference, opts, "internal_reference"); 1566 save_opt(&t8_i->external_reference, opts, "external_reference"); 1567 t8_i->connector_type = qemu_opt_get_number(opts, 1568 "connector_type", 0); 1569 t8_i->port_type = qemu_opt_get_number(opts, "port_type", 0); 1570 QTAILQ_INSERT_TAIL(&type8, t8_i, next); 1571 return; 1572 case 9: { 1573 if (!qemu_opts_validate(opts, qemu_smbios_type9_opts, errp)) { 1574 return; 1575 } 1576 struct type9_instance *t; 1577 t = g_new0(struct type9_instance, 1); 1578 save_opt(&t->slot_designation, opts, "slot_designation"); 1579 t->slot_type = qemu_opt_get_number(opts, "slot_type", 0); 1580 t->slot_data_bus_width = 1581 qemu_opt_get_number(opts, "slot_data_bus_width", 0); 1582 t->current_usage = qemu_opt_get_number(opts, "current_usage", 0); 1583 t->slot_length = qemu_opt_get_number(opts, "slot_length", 0); 1584 t->slot_id = qemu_opt_get_number(opts, "slot_id", 0); 1585 t->slot_characteristics1 = 1586 qemu_opt_get_number(opts, "slot_characteristics1", 0); 1587 t->slot_characteristics2 = 1588 qemu_opt_get_number(opts, "slot_characteristics2", 0); 1589 save_opt(&t->pcidev, opts, "pcidev"); 1590 QTAILQ_INSERT_TAIL(&type9, t, next); 1591 return; 1592 } 1593 case 11: 1594 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) { 1595 return; 1596 } 1597 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) { 1598 return; 1599 } 1600 return; 1601 case 17: 1602 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) { 1603 return; 1604 } 1605 save_opt(&type17.loc_pfx, opts, "loc_pfx"); 1606 save_opt(&type17.bank, opts, "bank"); 1607 save_opt(&type17.manufacturer, opts, "manufacturer"); 1608 save_opt(&type17.serial, opts, "serial"); 1609 save_opt(&type17.asset, opts, "asset"); 1610 save_opt(&type17.part, opts, "part"); 1611 type17.speed = qemu_opt_get_number(opts, "speed", 0); 1612 return; 1613 case 41: { 1614 struct type41_instance *t41_i; 1615 Error *local_err = NULL; 1616 1617 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) { 1618 return; 1619 } 1620 t41_i = g_new0(struct type41_instance, 1); 1621 save_opt(&t41_i->designation, opts, "designation"); 1622 t41_i->kind = qapi_enum_parse(&type41_kind_lookup, 1623 qemu_opt_get(opts, "kind"), 1624 0, &local_err) + 1; 1625 t41_i->kind |= 0x80; /* enabled */ 1626 if (local_err != NULL) { 1627 error_propagate(errp, local_err); 1628 g_free(t41_i); 1629 return; 1630 } 1631 t41_i->instance = qemu_opt_get_number(opts, "instance", 1); 1632 save_opt(&t41_i->pcidev, opts, "pcidev"); 1633 1634 QTAILQ_INSERT_TAIL(&type41, t41_i, next); 1635 return; 1636 } 1637 default: 1638 error_setg(errp, 1639 "Don't know how to build fields for SMBIOS type %ld", 1640 type); 1641 return; 1642 } 1643 } 1644 1645 error_setg(errp, "Must specify type= or file="); 1646 } 1647