1 /* 2 * SMBIOS Support 3 * 4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. 5 * Copyright (C) 2013 Red Hat, Inc. 6 * 7 * Authors: 8 * Alex Williamson <alex.williamson@hp.com> 9 * Markus Armbruster <armbru@redhat.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/units.h" 20 #include "qapi/error.h" 21 #include "qemu/config-file.h" 22 #include "qemu/error-report.h" 23 #include "qemu/module.h" 24 #include "qemu/option.h" 25 #include "sysemu/sysemu.h" 26 #include "qemu/uuid.h" 27 #include "hw/firmware/smbios.h" 28 #include "hw/loader.h" 29 #include "hw/boards.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/pci/pci_device.h" 32 #include "smbios_build.h" 33 34 /* legacy structures and constants for <= 2.0 machines */ 35 struct smbios_header { 36 uint16_t length; 37 uint8_t type; 38 } QEMU_PACKED; 39 40 struct smbios_field { 41 struct smbios_header header; 42 uint8_t type; 43 uint16_t offset; 44 uint8_t data[]; 45 } QEMU_PACKED; 46 47 struct smbios_table { 48 struct smbios_header header; 49 uint8_t data[]; 50 } QEMU_PACKED; 51 52 #define SMBIOS_FIELD_ENTRY 0 53 #define SMBIOS_TABLE_ENTRY 1 54 55 static uint8_t *smbios_entries; 56 static size_t smbios_entries_len; 57 static bool smbios_legacy = true; 58 static bool smbios_uuid_encoded = true; 59 /* end: legacy structures & constants for <= 2.0 machines */ 60 61 62 uint8_t *smbios_tables; 63 size_t smbios_tables_len; 64 unsigned smbios_table_max; 65 unsigned smbios_table_cnt; 66 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 67 68 static SmbiosEntryPoint ep; 69 70 static int smbios_type4_count = 0; 71 static bool smbios_immutable; 72 static bool smbios_have_defaults; 73 static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets; 74 75 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1); 76 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1); 77 78 static struct { 79 const char *vendor, *version, *date; 80 bool have_major_minor, uefi; 81 uint8_t major, minor; 82 } type0; 83 84 static struct { 85 const char *manufacturer, *product, *version, *serial, *sku, *family; 86 /* uuid is in qemu_uuid */ 87 } type1; 88 89 static struct { 90 const char *manufacturer, *product, *version, *serial, *asset, *location; 91 } type2; 92 93 static struct { 94 const char *manufacturer, *version, *serial, *asset, *sku; 95 } type3; 96 97 /* 98 * SVVP requires max_speed and current_speed to be set and not being 99 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the 100 * default value to 2000MHz as we did before. 101 */ 102 #define DEFAULT_CPU_SPEED 2000 103 104 static struct { 105 uint16_t processor_family; 106 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; 107 uint64_t max_speed; 108 uint64_t current_speed; 109 uint64_t processor_id; 110 } type4 = { 111 .max_speed = DEFAULT_CPU_SPEED, 112 .current_speed = DEFAULT_CPU_SPEED, 113 .processor_id = 0, 114 .processor_family = 0x01, /* Other */ 115 }; 116 117 struct type8_instance { 118 const char *internal_reference, *external_reference; 119 uint8_t connector_type, port_type; 120 QTAILQ_ENTRY(type8_instance) next; 121 }; 122 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8); 123 124 /* type 9 instance for parsing */ 125 struct type9_instance { 126 const char *slot_designation; 127 uint8_t slot_type, slot_data_bus_width, current_usage, slot_length, 128 slot_characteristics1, slot_characteristics2; 129 uint16_t slot_id; 130 QTAILQ_ENTRY(type9_instance) next; 131 }; 132 static QTAILQ_HEAD(, type9_instance) type9 = QTAILQ_HEAD_INITIALIZER(type9); 133 134 static struct { 135 size_t nvalues; 136 char **values; 137 } type11; 138 139 static struct { 140 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part; 141 uint16_t speed; 142 } type17; 143 144 static QEnumLookup type41_kind_lookup = { 145 .array = (const char *const[]) { 146 "other", 147 "unknown", 148 "video", 149 "scsi", 150 "ethernet", 151 "tokenring", 152 "sound", 153 "pata", 154 "sata", 155 "sas", 156 }, 157 .size = 10 158 }; 159 struct type41_instance { 160 const char *designation, *pcidev; 161 uint8_t instance, kind; 162 QTAILQ_ENTRY(type41_instance) next; 163 }; 164 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41); 165 166 static QemuOptsList qemu_smbios_opts = { 167 .name = "smbios", 168 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head), 169 .desc = { 170 /* 171 * no elements => accept any params 172 * validation will happen later 173 */ 174 { /* end of list */ } 175 } 176 }; 177 178 static const QemuOptDesc qemu_smbios_file_opts[] = { 179 { 180 .name = "file", 181 .type = QEMU_OPT_STRING, 182 .help = "binary file containing an SMBIOS element", 183 }, 184 { /* end of list */ } 185 }; 186 187 static const QemuOptDesc qemu_smbios_type0_opts[] = { 188 { 189 .name = "type", 190 .type = QEMU_OPT_NUMBER, 191 .help = "SMBIOS element type", 192 },{ 193 .name = "vendor", 194 .type = QEMU_OPT_STRING, 195 .help = "vendor name", 196 },{ 197 .name = "version", 198 .type = QEMU_OPT_STRING, 199 .help = "version number", 200 },{ 201 .name = "date", 202 .type = QEMU_OPT_STRING, 203 .help = "release date", 204 },{ 205 .name = "release", 206 .type = QEMU_OPT_STRING, 207 .help = "revision number", 208 },{ 209 .name = "uefi", 210 .type = QEMU_OPT_BOOL, 211 .help = "uefi support", 212 }, 213 { /* end of list */ } 214 }; 215 216 static const QemuOptDesc qemu_smbios_type1_opts[] = { 217 { 218 .name = "type", 219 .type = QEMU_OPT_NUMBER, 220 .help = "SMBIOS element type", 221 },{ 222 .name = "manufacturer", 223 .type = QEMU_OPT_STRING, 224 .help = "manufacturer name", 225 },{ 226 .name = "product", 227 .type = QEMU_OPT_STRING, 228 .help = "product name", 229 },{ 230 .name = "version", 231 .type = QEMU_OPT_STRING, 232 .help = "version number", 233 },{ 234 .name = "serial", 235 .type = QEMU_OPT_STRING, 236 .help = "serial number", 237 },{ 238 .name = "uuid", 239 .type = QEMU_OPT_STRING, 240 .help = "UUID", 241 },{ 242 .name = "sku", 243 .type = QEMU_OPT_STRING, 244 .help = "SKU number", 245 },{ 246 .name = "family", 247 .type = QEMU_OPT_STRING, 248 .help = "family name", 249 }, 250 { /* end of list */ } 251 }; 252 253 static const QemuOptDesc qemu_smbios_type2_opts[] = { 254 { 255 .name = "type", 256 .type = QEMU_OPT_NUMBER, 257 .help = "SMBIOS element type", 258 },{ 259 .name = "manufacturer", 260 .type = QEMU_OPT_STRING, 261 .help = "manufacturer name", 262 },{ 263 .name = "product", 264 .type = QEMU_OPT_STRING, 265 .help = "product name", 266 },{ 267 .name = "version", 268 .type = QEMU_OPT_STRING, 269 .help = "version number", 270 },{ 271 .name = "serial", 272 .type = QEMU_OPT_STRING, 273 .help = "serial number", 274 },{ 275 .name = "asset", 276 .type = QEMU_OPT_STRING, 277 .help = "asset tag number", 278 },{ 279 .name = "location", 280 .type = QEMU_OPT_STRING, 281 .help = "location in chassis", 282 }, 283 { /* end of list */ } 284 }; 285 286 static const QemuOptDesc qemu_smbios_type3_opts[] = { 287 { 288 .name = "type", 289 .type = QEMU_OPT_NUMBER, 290 .help = "SMBIOS element type", 291 },{ 292 .name = "manufacturer", 293 .type = QEMU_OPT_STRING, 294 .help = "manufacturer name", 295 },{ 296 .name = "version", 297 .type = QEMU_OPT_STRING, 298 .help = "version number", 299 },{ 300 .name = "serial", 301 .type = QEMU_OPT_STRING, 302 .help = "serial number", 303 },{ 304 .name = "asset", 305 .type = QEMU_OPT_STRING, 306 .help = "asset tag number", 307 },{ 308 .name = "sku", 309 .type = QEMU_OPT_STRING, 310 .help = "SKU number", 311 }, 312 { /* end of list */ } 313 }; 314 315 static const QemuOptDesc qemu_smbios_type4_opts[] = { 316 { 317 .name = "type", 318 .type = QEMU_OPT_NUMBER, 319 .help = "SMBIOS element type", 320 },{ 321 .name = "sock_pfx", 322 .type = QEMU_OPT_STRING, 323 .help = "socket designation string prefix", 324 },{ 325 .name = "manufacturer", 326 .type = QEMU_OPT_STRING, 327 .help = "manufacturer name", 328 },{ 329 .name = "version", 330 .type = QEMU_OPT_STRING, 331 .help = "version number", 332 },{ 333 .name = "max-speed", 334 .type = QEMU_OPT_NUMBER, 335 .help = "max speed in MHz", 336 },{ 337 .name = "current-speed", 338 .type = QEMU_OPT_NUMBER, 339 .help = "speed at system boot in MHz", 340 },{ 341 .name = "serial", 342 .type = QEMU_OPT_STRING, 343 .help = "serial number", 344 },{ 345 .name = "asset", 346 .type = QEMU_OPT_STRING, 347 .help = "asset tag number", 348 },{ 349 .name = "part", 350 .type = QEMU_OPT_STRING, 351 .help = "part number", 352 }, { 353 .name = "processor-family", 354 .type = QEMU_OPT_NUMBER, 355 .help = "processor family", 356 }, { 357 .name = "processor-id", 358 .type = QEMU_OPT_NUMBER, 359 .help = "processor id", 360 }, 361 { /* end of list */ } 362 }; 363 364 static const QemuOptDesc qemu_smbios_type8_opts[] = { 365 { 366 .name = "type", 367 .type = QEMU_OPT_NUMBER, 368 .help = "SMBIOS element type", 369 }, 370 { 371 .name = "internal_reference", 372 .type = QEMU_OPT_STRING, 373 .help = "internal reference designator", 374 }, 375 { 376 .name = "external_reference", 377 .type = QEMU_OPT_STRING, 378 .help = "external reference designator", 379 }, 380 { 381 .name = "connector_type", 382 .type = QEMU_OPT_NUMBER, 383 .help = "connector type", 384 }, 385 { 386 .name = "port_type", 387 .type = QEMU_OPT_NUMBER, 388 .help = "port type", 389 }, 390 { /* end of list */ } 391 }; 392 393 static const QemuOptDesc qemu_smbios_type9_opts[] = { 394 { 395 .name = "type", 396 .type = QEMU_OPT_NUMBER, 397 .help = "SMBIOS element type", 398 }, 399 { 400 .name = "slot_designation", 401 .type = QEMU_OPT_STRING, 402 .help = "string number for reference designation", 403 }, 404 { 405 .name = "slot_type", 406 .type = QEMU_OPT_NUMBER, 407 .help = "connector type", 408 }, 409 { 410 .name = "slot_data_bus_width", 411 .type = QEMU_OPT_NUMBER, 412 .help = "port type", 413 }, 414 { 415 .name = "current_usage", 416 .type = QEMU_OPT_NUMBER, 417 .help = "current usage", 418 }, 419 { 420 .name = "slot_length", 421 .type = QEMU_OPT_NUMBER, 422 .help = "system slot length", 423 }, 424 { 425 .name = "slot_id", 426 .type = QEMU_OPT_NUMBER, 427 .help = "system slot id", 428 }, 429 { 430 .name = "slot_characteristics1", 431 .type = QEMU_OPT_NUMBER, 432 .help = "slot characteristics1, see the spec", 433 }, 434 { 435 .name = "slot_characteristics2", 436 .type = QEMU_OPT_NUMBER, 437 .help = "slot characteristics2, see the spec", 438 }, 439 }; 440 441 static const QemuOptDesc qemu_smbios_type11_opts[] = { 442 { 443 .name = "type", 444 .type = QEMU_OPT_NUMBER, 445 .help = "SMBIOS element type", 446 }, 447 { 448 .name = "value", 449 .type = QEMU_OPT_STRING, 450 .help = "OEM string data", 451 }, 452 { 453 .name = "path", 454 .type = QEMU_OPT_STRING, 455 .help = "OEM string data from file", 456 }, 457 { /* end of list */ } 458 }; 459 460 static const QemuOptDesc qemu_smbios_type17_opts[] = { 461 { 462 .name = "type", 463 .type = QEMU_OPT_NUMBER, 464 .help = "SMBIOS element type", 465 },{ 466 .name = "loc_pfx", 467 .type = QEMU_OPT_STRING, 468 .help = "device locator string prefix", 469 },{ 470 .name = "bank", 471 .type = QEMU_OPT_STRING, 472 .help = "bank locator string", 473 },{ 474 .name = "manufacturer", 475 .type = QEMU_OPT_STRING, 476 .help = "manufacturer name", 477 },{ 478 .name = "serial", 479 .type = QEMU_OPT_STRING, 480 .help = "serial number", 481 },{ 482 .name = "asset", 483 .type = QEMU_OPT_STRING, 484 .help = "asset tag number", 485 },{ 486 .name = "part", 487 .type = QEMU_OPT_STRING, 488 .help = "part number", 489 },{ 490 .name = "speed", 491 .type = QEMU_OPT_NUMBER, 492 .help = "maximum capable speed", 493 }, 494 { /* end of list */ } 495 }; 496 497 static const QemuOptDesc qemu_smbios_type41_opts[] = { 498 { 499 .name = "type", 500 .type = QEMU_OPT_NUMBER, 501 .help = "SMBIOS element type", 502 },{ 503 .name = "designation", 504 .type = QEMU_OPT_STRING, 505 .help = "reference designation string", 506 },{ 507 .name = "kind", 508 .type = QEMU_OPT_STRING, 509 .help = "device type", 510 .def_value_str = "other", 511 },{ 512 .name = "instance", 513 .type = QEMU_OPT_NUMBER, 514 .help = "device type instance", 515 },{ 516 .name = "pcidev", 517 .type = QEMU_OPT_STRING, 518 .help = "PCI device", 519 }, 520 { /* end of list */ } 521 }; 522 523 static void smbios_register_config(void) 524 { 525 qemu_add_opts(&qemu_smbios_opts); 526 } 527 528 opts_init(smbios_register_config); 529 530 /* 531 * The SMBIOS 2.1 "structure table length" field in the 532 * entry point uses a 16-bit integer, so we're limited 533 * in total table size 534 */ 535 #define SMBIOS_21_MAX_TABLES_LEN 0xffff 536 537 static void smbios_validate_table(MachineState *ms) 538 { 539 uint32_t expect_t4_count = smbios_legacy ? 540 ms->smp.cpus : smbios_smp_sockets; 541 542 if (smbios_type4_count && smbios_type4_count != expect_t4_count) { 543 error_report("Expected %d SMBIOS Type 4 tables, got %d instead", 544 expect_t4_count, smbios_type4_count); 545 exit(1); 546 } 547 548 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 && 549 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) { 550 error_report("SMBIOS 2.1 table length %zu exceeds %d", 551 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN); 552 exit(1); 553 } 554 } 555 556 557 /* legacy setup functions for <= 2.0 machines */ 558 static void smbios_add_field(int type, int offset, const void *data, size_t len) 559 { 560 struct smbios_field *field; 561 562 if (!smbios_entries) { 563 smbios_entries_len = sizeof(uint16_t); 564 smbios_entries = g_malloc0(smbios_entries_len); 565 } 566 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 567 sizeof(*field) + len); 568 field = (struct smbios_field *)(smbios_entries + smbios_entries_len); 569 field->header.type = SMBIOS_FIELD_ENTRY; 570 field->header.length = cpu_to_le16(sizeof(*field) + len); 571 572 field->type = type; 573 field->offset = cpu_to_le16(offset); 574 memcpy(field->data, data, len); 575 576 smbios_entries_len += sizeof(*field) + len; 577 (*(uint16_t *)smbios_entries) = 578 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 579 } 580 581 static void smbios_maybe_add_str(int type, int offset, const char *data) 582 { 583 if (data) { 584 smbios_add_field(type, offset, data, strlen(data) + 1); 585 } 586 } 587 588 static void smbios_build_type_0_fields(void) 589 { 590 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), 591 type0.vendor); 592 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), 593 type0.version); 594 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, 595 bios_release_date_str), 596 type0.date); 597 if (type0.have_major_minor) { 598 smbios_add_field(0, offsetof(struct smbios_type_0, 599 system_bios_major_release), 600 &type0.major, 1); 601 smbios_add_field(0, offsetof(struct smbios_type_0, 602 system_bios_minor_release), 603 &type0.minor, 1); 604 } 605 } 606 607 static void smbios_build_type_1_fields(void) 608 { 609 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), 610 type1.manufacturer); 611 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), 612 type1.product); 613 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), 614 type1.version); 615 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), 616 type1.serial); 617 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), 618 type1.sku); 619 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str), 620 type1.family); 621 if (qemu_uuid_set) { 622 /* We don't encode the UUID in the "wire format" here because this 623 * function is for legacy mode and needs to keep the guest ABI, and 624 * because we don't know what's the SMBIOS version advertised by the 625 * BIOS. 626 */ 627 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 628 &qemu_uuid, 16); 629 } 630 } 631 632 uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length) 633 { 634 if (!smbios_legacy) { 635 *length = 0; 636 return NULL; 637 } 638 639 if (!smbios_immutable) { 640 smbios_build_type_0_fields(); 641 smbios_build_type_1_fields(); 642 smbios_validate_table(ms); 643 smbios_immutable = true; 644 } 645 *length = smbios_entries_len; 646 return smbios_entries; 647 } 648 /* end: legacy setup functions for <= 2.0 machines */ 649 650 651 bool smbios_skip_table(uint8_t type, bool required_table) 652 { 653 if (test_bit(type, have_binfile_bitmap)) { 654 return true; /* user provided their own binary blob(s) */ 655 } 656 if (test_bit(type, have_fields_bitmap)) { 657 return false; /* user provided fields via command line */ 658 } 659 if (smbios_have_defaults && required_table) { 660 return false; /* we're building tables, and this one's required */ 661 } 662 return true; 663 } 664 665 #define T0_BASE 0x000 666 #define T1_BASE 0x100 667 #define T2_BASE 0x200 668 #define T3_BASE 0x300 669 #define T4_BASE 0x400 670 #define T9_BASE 0x900 671 #define T11_BASE 0xe00 672 673 #define T16_BASE 0x1000 674 #define T17_BASE 0x1100 675 #define T19_BASE 0x1300 676 #define T32_BASE 0x2000 677 #define T41_BASE 0x2900 678 #define T127_BASE 0x7F00 679 680 static void smbios_build_type_0_table(void) 681 { 682 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */ 683 684 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor); 685 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version); 686 687 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */ 688 689 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date); 690 691 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */ 692 693 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */ 694 t->bios_characteristics_extension_bytes[0] = 0; 695 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */ 696 if (type0.uefi) { 697 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */ 698 } 699 700 if (type0.have_major_minor) { 701 t->system_bios_major_release = type0.major; 702 t->system_bios_minor_release = type0.minor; 703 } else { 704 t->system_bios_major_release = 0; 705 t->system_bios_minor_release = 0; 706 } 707 708 /* hardcoded in SeaBIOS */ 709 t->embedded_controller_major_release = 0xFF; 710 t->embedded_controller_minor_release = 0xFF; 711 712 SMBIOS_BUILD_TABLE_POST; 713 } 714 715 /* Encode UUID from the big endian encoding described on RFC4122 to the wire 716 * format specified by SMBIOS version 2.6. 717 */ 718 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) 719 { 720 memcpy(uuid, in, 16); 721 if (smbios_uuid_encoded) { 722 uuid->time_low = bswap32(uuid->time_low); 723 uuid->time_mid = bswap16(uuid->time_mid); 724 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); 725 } 726 } 727 728 static void smbios_build_type_1_table(void) 729 { 730 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */ 731 732 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer); 733 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product); 734 SMBIOS_TABLE_SET_STR(1, version_str, type1.version); 735 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial); 736 if (qemu_uuid_set) { 737 smbios_encode_uuid(&t->uuid, &qemu_uuid); 738 } else { 739 memset(&t->uuid, 0, 16); 740 } 741 t->wake_up_type = 0x06; /* power switch */ 742 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku); 743 SMBIOS_TABLE_SET_STR(1, family_str, type1.family); 744 745 SMBIOS_BUILD_TABLE_POST; 746 } 747 748 static void smbios_build_type_2_table(void) 749 { 750 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */ 751 752 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer); 753 SMBIOS_TABLE_SET_STR(2, product_str, type2.product); 754 SMBIOS_TABLE_SET_STR(2, version_str, type2.version); 755 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial); 756 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset); 757 t->feature_flags = 0x01; /* Motherboard */ 758 SMBIOS_TABLE_SET_STR(2, location_str, type2.location); 759 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */ 760 t->board_type = 0x0A; /* Motherboard */ 761 t->contained_element_count = 0; 762 763 SMBIOS_BUILD_TABLE_POST; 764 } 765 766 static void smbios_build_type_3_table(void) 767 { 768 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */ 769 770 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer); 771 t->type = 0x01; /* Other */ 772 SMBIOS_TABLE_SET_STR(3, version_str, type3.version); 773 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial); 774 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset); 775 t->boot_up_state = 0x03; /* Safe */ 776 t->power_supply_state = 0x03; /* Safe */ 777 t->thermal_state = 0x03; /* Safe */ 778 t->security_status = 0x02; /* Unknown */ 779 t->oem_defined = cpu_to_le32(0); 780 t->height = 0; 781 t->number_of_power_cords = 0; 782 t->contained_element_count = 0; 783 t->contained_element_record_length = 0; 784 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku); 785 786 SMBIOS_BUILD_TABLE_POST; 787 } 788 789 static void smbios_build_type_4_table(MachineState *ms, unsigned instance) 790 { 791 char sock_str[128]; 792 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28; 793 unsigned threads_per_socket; 794 unsigned cores_per_socket; 795 796 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) { 797 tbl_len = SMBIOS_TYPE_4_LEN_V30; 798 } 799 800 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance, 801 true, tbl_len); /* required */ 802 803 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); 804 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); 805 t->processor_type = 0x03; /* CPU */ 806 t->processor_family = 0xfe; /* use Processor Family 2 field */ 807 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); 808 if (type4.processor_id == 0) { 809 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); 810 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); 811 } else { 812 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); 813 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); 814 } 815 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); 816 t->voltage = 0; 817 t->external_clock = cpu_to_le16(0); /* Unknown */ 818 t->max_speed = cpu_to_le16(type4.max_speed); 819 t->current_speed = cpu_to_le16(type4.current_speed); 820 t->status = 0x41; /* Socket populated, CPU enabled */ 821 t->processor_upgrade = 0x01; /* Other */ 822 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 823 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 824 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 825 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial); 826 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset); 827 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part); 828 829 threads_per_socket = machine_topo_get_threads_per_socket(ms); 830 cores_per_socket = machine_topo_get_cores_per_socket(ms); 831 832 t->core_count = (cores_per_socket > 255) ? 0xFF : cores_per_socket; 833 t->core_enabled = t->core_count; 834 835 t->thread_count = (threads_per_socket > 255) ? 0xFF : threads_per_socket; 836 837 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ 838 t->processor_family2 = cpu_to_le16(type4.processor_family); 839 840 if (tbl_len == SMBIOS_TYPE_4_LEN_V30) { 841 t->core_count2 = t->core_enabled2 = cpu_to_le16(cores_per_socket); 842 t->thread_count2 = cpu_to_le16(threads_per_socket); 843 } 844 845 SMBIOS_BUILD_TABLE_POST; 846 smbios_type4_count++; 847 } 848 849 static void smbios_build_type_8_table(void) 850 { 851 unsigned instance = 0; 852 struct type8_instance *t8; 853 854 QTAILQ_FOREACH(t8, &type8, next) { 855 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true); 856 857 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference); 858 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference); 859 /* most vendors seem to set this to None */ 860 t->internal_connector_type = 0x0; 861 t->external_connector_type = t8->connector_type; 862 t->port_type = t8->port_type; 863 864 SMBIOS_BUILD_TABLE_POST; 865 instance++; 866 } 867 } 868 869 static void smbios_build_type_9_table(void) 870 { 871 unsigned instance = 0; 872 struct type9_instance *t9; 873 874 QTAILQ_FOREACH(t9, &type9, next) { 875 SMBIOS_BUILD_TABLE_PRE(9, T9_BASE + instance, true); 876 877 SMBIOS_TABLE_SET_STR(9, slot_designation, t9->slot_designation); 878 t->slot_type = t9->slot_type; 879 t->slot_data_bus_width = t9->slot_data_bus_width; 880 t->current_usage = t9->current_usage; 881 t->slot_length = t9->slot_length; 882 t->slot_id = t9->slot_id; 883 t->slot_characteristics1 = t9->slot_characteristics1; 884 t->slot_characteristics2 = t9->slot_characteristics2; 885 886 SMBIOS_BUILD_TABLE_POST; 887 instance++; 888 } 889 } 890 891 static void smbios_build_type_11_table(void) 892 { 893 char count_str[128]; 894 size_t i; 895 896 if (type11.nvalues == 0) { 897 return; 898 } 899 900 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */ 901 902 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues); 903 t->count = type11.nvalues; 904 905 for (i = 0; i < type11.nvalues; i++) { 906 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]); 907 g_free(type11.values[i]); 908 type11.values[i] = NULL; 909 } 910 911 SMBIOS_BUILD_TABLE_POST; 912 } 913 914 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */ 915 916 static void smbios_build_type_16_table(unsigned dimm_cnt) 917 { 918 uint64_t size_kb; 919 920 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */ 921 922 t->location = 0x01; /* Other */ 923 t->use = 0x03; /* System memory */ 924 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */ 925 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB; 926 if (size_kb < MAX_T16_STD_SZ) { 927 t->maximum_capacity = cpu_to_le32(size_kb); 928 t->extended_maximum_capacity = cpu_to_le64(0); 929 } else { 930 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ); 931 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size); 932 } 933 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 934 t->number_of_memory_devices = cpu_to_le16(dimm_cnt); 935 936 SMBIOS_BUILD_TABLE_POST; 937 } 938 939 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */ 940 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */ 941 942 static void smbios_build_type_17_table(unsigned instance, uint64_t size) 943 { 944 char loc_str[128]; 945 uint64_t size_mb; 946 947 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */ 948 949 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 950 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 951 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */ 952 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ 953 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB; 954 if (size_mb < MAX_T17_STD_SZ) { 955 t->size = cpu_to_le16(size_mb); 956 t->extended_size = cpu_to_le32(0); 957 } else { 958 assert(size_mb < MAX_T17_EXT_SZ); 959 t->size = cpu_to_le16(MAX_T17_STD_SZ); 960 t->extended_size = cpu_to_le32(size_mb); 961 } 962 t->form_factor = 0x09; /* DIMM */ 963 t->device_set = 0; /* Not in a set */ 964 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance); 965 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); 966 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); 967 t->memory_type = 0x07; /* RAM */ 968 t->type_detail = cpu_to_le16(0x02); /* Other */ 969 t->speed = cpu_to_le16(type17.speed); 970 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); 971 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); 972 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset); 973 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part); 974 t->attributes = 0; /* Unknown */ 975 t->configured_clock_speed = t->speed; /* reuse value for max speed */ 976 t->minimum_voltage = cpu_to_le16(0); /* Unknown */ 977 t->maximum_voltage = cpu_to_le16(0); /* Unknown */ 978 t->configured_voltage = cpu_to_le16(0); /* Unknown */ 979 980 SMBIOS_BUILD_TABLE_POST; 981 } 982 983 static void smbios_build_type_19_table(unsigned instance, unsigned offset, 984 uint64_t start, uint64_t size) 985 { 986 uint64_t end, start_kb, end_kb; 987 988 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance, 989 true); /* required */ 990 991 end = start + size - 1; 992 assert(end > start); 993 start_kb = start / KiB; 994 end_kb = end / KiB; 995 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) { 996 t->starting_address = cpu_to_le32(start_kb); 997 t->ending_address = cpu_to_le32(end_kb); 998 t->extended_starting_address = 999 t->extended_ending_address = cpu_to_le64(0); 1000 } else { 1001 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX); 1002 t->extended_starting_address = cpu_to_le64(start); 1003 t->extended_ending_address = cpu_to_le64(end); 1004 } 1005 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 1006 t->partition_width = 1; /* One device per row */ 1007 1008 SMBIOS_BUILD_TABLE_POST; 1009 } 1010 1011 static void smbios_build_type_32_table(void) 1012 { 1013 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */ 1014 1015 memset(t->reserved, 0, 6); 1016 t->boot_status = 0; /* No errors detected */ 1017 1018 SMBIOS_BUILD_TABLE_POST; 1019 } 1020 1021 static void smbios_build_type_41_table(Error **errp) 1022 { 1023 unsigned instance = 0; 1024 struct type41_instance *t41; 1025 1026 QTAILQ_FOREACH(t41, &type41, next) { 1027 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true); 1028 1029 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation); 1030 t->device_type = t41->kind; 1031 t->device_type_instance = t41->instance; 1032 t->segment_group_number = cpu_to_le16(0); 1033 t->bus_number = 0; 1034 t->device_number = 0; 1035 1036 if (t41->pcidev) { 1037 PCIDevice *pdev = NULL; 1038 int rc = pci_qdev_find_device(t41->pcidev, &pdev); 1039 if (rc != 0) { 1040 error_setg(errp, 1041 "No PCI device %s for SMBIOS type 41 entry %s", 1042 t41->pcidev, t41->designation); 1043 return; 1044 } 1045 /* 1046 * We only handle the case were the device is attached to 1047 * the PCI root bus. The general case is more complex as 1048 * bridges are enumerated later and the table would need 1049 * to be updated at this moment. 1050 */ 1051 if (!pci_bus_is_root(pci_get_bus(pdev))) { 1052 error_setg(errp, 1053 "Cannot create type 41 entry for PCI device %s: " 1054 "not attached to the root bus", 1055 t41->pcidev); 1056 return; 1057 } 1058 t->segment_group_number = cpu_to_le16(0); 1059 t->bus_number = pci_dev_bus_num(pdev); 1060 t->device_number = pdev->devfn; 1061 } 1062 1063 SMBIOS_BUILD_TABLE_POST; 1064 instance++; 1065 } 1066 } 1067 1068 static void smbios_build_type_127_table(void) 1069 { 1070 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */ 1071 SMBIOS_BUILD_TABLE_POST; 1072 } 1073 1074 void smbios_set_cpuid(uint32_t version, uint32_t features) 1075 { 1076 smbios_cpuid_version = version; 1077 smbios_cpuid_features = features; 1078 } 1079 1080 #define SMBIOS_SET_DEFAULT(field, value) \ 1081 if (!field) { \ 1082 field = value; \ 1083 } 1084 1085 void smbios_set_default_processor_family(uint16_t processor_family) 1086 { 1087 if (type4.processor_family <= 0x01) { 1088 type4.processor_family = processor_family; 1089 } 1090 } 1091 1092 void smbios_set_defaults(const char *manufacturer, const char *product, 1093 const char *version, bool legacy_mode, 1094 bool uuid_encoded, SmbiosEntryPointType ep_type) 1095 { 1096 smbios_have_defaults = true; 1097 smbios_legacy = legacy_mode; 1098 smbios_uuid_encoded = uuid_encoded; 1099 smbios_ep_type = ep_type; 1100 1101 /* drop unwanted version of command-line file blob(s) */ 1102 if (smbios_legacy) { 1103 g_free(smbios_tables); 1104 /* in legacy mode, also complain if fields were given for types > 1 */ 1105 if (find_next_bit(have_fields_bitmap, 1106 SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) { 1107 error_report("can't process fields for smbios " 1108 "types > 1 on machine versions < 2.1!"); 1109 exit(1); 1110 } 1111 } else { 1112 g_free(smbios_entries); 1113 } 1114 1115 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); 1116 SMBIOS_SET_DEFAULT(type1.product, product); 1117 SMBIOS_SET_DEFAULT(type1.version, version); 1118 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); 1119 SMBIOS_SET_DEFAULT(type2.product, product); 1120 SMBIOS_SET_DEFAULT(type2.version, version); 1121 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); 1122 SMBIOS_SET_DEFAULT(type3.version, version); 1123 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); 1124 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); 1125 SMBIOS_SET_DEFAULT(type4.version, version); 1126 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); 1127 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); 1128 } 1129 1130 static void smbios_entry_point_setup(void) 1131 { 1132 switch (smbios_ep_type) { 1133 case SMBIOS_ENTRY_POINT_TYPE_32: 1134 memcpy(ep.ep21.anchor_string, "_SM_", 4); 1135 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); 1136 ep.ep21.length = sizeof(struct smbios_21_entry_point); 1137 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ 1138 memset(ep.ep21.formatted_area, 0, 5); 1139 1140 /* compliant with smbios spec v2.8 */ 1141 ep.ep21.smbios_major_version = 2; 1142 ep.ep21.smbios_minor_version = 8; 1143 ep.ep21.smbios_bcd_revision = 0x28; 1144 1145 /* set during table construction, but BIOS may override: */ 1146 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); 1147 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); 1148 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); 1149 1150 /* BIOS must recalculate */ 1151 ep.ep21.checksum = 0; 1152 ep.ep21.intermediate_checksum = 0; 1153 ep.ep21.structure_table_address = cpu_to_le32(0); 1154 1155 break; 1156 case SMBIOS_ENTRY_POINT_TYPE_64: 1157 memcpy(ep.ep30.anchor_string, "_SM3_", 5); 1158 ep.ep30.length = sizeof(struct smbios_30_entry_point); 1159 ep.ep30.entry_point_revision = 1; 1160 ep.ep30.reserved = 0; 1161 1162 /* compliant with smbios spec 3.0 */ 1163 ep.ep30.smbios_major_version = 3; 1164 ep.ep30.smbios_minor_version = 0; 1165 ep.ep30.smbios_doc_rev = 0; 1166 1167 /* set during table construct, but BIOS might override */ 1168 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); 1169 1170 /* BIOS must recalculate */ 1171 ep.ep30.checksum = 0; 1172 ep.ep30.structure_table_address = cpu_to_le64(0); 1173 1174 break; 1175 default: 1176 abort(); 1177 break; 1178 } 1179 } 1180 1181 void smbios_get_tables(MachineState *ms, 1182 const struct smbios_phys_mem_area *mem_array, 1183 const unsigned int mem_array_size, 1184 uint8_t **tables, size_t *tables_len, 1185 uint8_t **anchor, size_t *anchor_len, 1186 Error **errp) 1187 { 1188 unsigned i, dimm_cnt, offset; 1189 1190 if (smbios_legacy) { 1191 *tables = *anchor = NULL; 1192 *tables_len = *anchor_len = 0; 1193 return; 1194 } 1195 1196 if (!smbios_immutable) { 1197 smbios_build_type_0_table(); 1198 smbios_build_type_1_table(); 1199 smbios_build_type_2_table(); 1200 smbios_build_type_3_table(); 1201 1202 smbios_smp_sockets = ms->smp.sockets; 1203 assert(smbios_smp_sockets >= 1); 1204 1205 for (i = 0; i < smbios_smp_sockets; i++) { 1206 smbios_build_type_4_table(ms, i); 1207 } 1208 1209 smbios_build_type_8_table(); 1210 smbios_build_type_9_table(); 1211 smbios_build_type_11_table(); 1212 1213 #define MAX_DIMM_SZ (16 * GiB) 1214 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \ 1215 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1) 1216 1217 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ; 1218 1219 /* 1220 * The offset determines if we need to keep additional space between 1221 * table 17 and table 19 header handle numbers so that they do 1222 * not overlap. For example, for a VM with larger than 8 TB guest 1223 * memory and DIMM like chunks of 16 GiB, the default space between 1224 * the two tables (T19_BASE - T17_BASE = 512) is not enough. 1225 */ 1226 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \ 1227 dimm_cnt - (T19_BASE - T17_BASE) : 0; 1228 1229 smbios_build_type_16_table(dimm_cnt); 1230 1231 for (i = 0; i < dimm_cnt; i++) { 1232 smbios_build_type_17_table(i, GET_DIMM_SZ); 1233 } 1234 1235 for (i = 0; i < mem_array_size; i++) { 1236 smbios_build_type_19_table(i, offset, mem_array[i].address, 1237 mem_array[i].length); 1238 } 1239 1240 /* 1241 * make sure 16 bit handle numbers in the headers of tables 19 1242 * and 32 do not overlap. 1243 */ 1244 assert((mem_array_size + offset) < (T32_BASE - T19_BASE)); 1245 1246 smbios_build_type_32_table(); 1247 smbios_build_type_38_table(); 1248 smbios_build_type_41_table(errp); 1249 smbios_build_type_127_table(); 1250 1251 smbios_validate_table(ms); 1252 smbios_entry_point_setup(); 1253 smbios_immutable = true; 1254 } 1255 1256 /* return tables blob and entry point (anchor), and their sizes */ 1257 *tables = smbios_tables; 1258 *tables_len = smbios_tables_len; 1259 *anchor = (uint8_t *)&ep; 1260 1261 /* calculate length based on anchor string */ 1262 if (!strncmp((char *)&ep, "_SM_", 4)) { 1263 *anchor_len = sizeof(struct smbios_21_entry_point); 1264 } else if (!strncmp((char *)&ep, "_SM3_", 5)) { 1265 *anchor_len = sizeof(struct smbios_30_entry_point); 1266 } else { 1267 abort(); 1268 } 1269 } 1270 1271 static void save_opt(const char **dest, QemuOpts *opts, const char *name) 1272 { 1273 const char *val = qemu_opt_get(opts, name); 1274 1275 if (val) { 1276 *dest = val; 1277 } 1278 } 1279 1280 1281 struct opt_list { 1282 size_t *ndest; 1283 char ***dest; 1284 }; 1285 1286 static int save_opt_one(void *opaque, 1287 const char *name, const char *value, 1288 Error **errp) 1289 { 1290 struct opt_list *opt = opaque; 1291 1292 if (g_str_equal(name, "path")) { 1293 g_autoptr(GByteArray) data = g_byte_array_new(); 1294 g_autofree char *buf = g_new(char, 4096); 1295 ssize_t ret; 1296 int fd = qemu_open(value, O_RDONLY, errp); 1297 if (fd < 0) { 1298 return -1; 1299 } 1300 1301 while (1) { 1302 ret = read(fd, buf, 4096); 1303 if (ret == 0) { 1304 break; 1305 } 1306 if (ret < 0) { 1307 error_setg(errp, "Unable to read from %s: %s", 1308 value, strerror(errno)); 1309 qemu_close(fd); 1310 return -1; 1311 } 1312 if (memchr(buf, '\0', ret)) { 1313 error_setg(errp, "NUL in OEM strings value in %s", value); 1314 qemu_close(fd); 1315 return -1; 1316 } 1317 g_byte_array_append(data, (guint8 *)buf, ret); 1318 } 1319 1320 qemu_close(fd); 1321 1322 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1323 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE); 1324 (*opt->ndest)++; 1325 data = NULL; 1326 } else if (g_str_equal(name, "value")) { 1327 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1328 (*opt->dest)[*opt->ndest] = g_strdup(value); 1329 (*opt->ndest)++; 1330 } else if (!g_str_equal(name, "type")) { 1331 error_setg(errp, "Unexpected option %s", name); 1332 return -1; 1333 } 1334 1335 return 0; 1336 } 1337 1338 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts, 1339 Error **errp) 1340 { 1341 struct opt_list opt = { 1342 ndest, dest, 1343 }; 1344 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) { 1345 return false; 1346 } 1347 return true; 1348 } 1349 1350 void smbios_entry_add(QemuOpts *opts, Error **errp) 1351 { 1352 const char *val; 1353 1354 assert(!smbios_immutable); 1355 1356 val = qemu_opt_get(opts, "file"); 1357 if (val) { 1358 struct smbios_structure_header *header; 1359 int size; 1360 struct smbios_table *table; /* legacy mode only */ 1361 1362 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) { 1363 return; 1364 } 1365 1366 size = get_image_size(val); 1367 if (size == -1 || size < sizeof(struct smbios_structure_header)) { 1368 error_setg(errp, "Cannot read SMBIOS file %s", val); 1369 return; 1370 } 1371 1372 /* 1373 * NOTE: standard double '\0' terminator expected, per smbios spec. 1374 * (except in legacy mode, where the second '\0' is implicit and 1375 * will be inserted by the BIOS). 1376 */ 1377 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size); 1378 header = (struct smbios_structure_header *)(smbios_tables + 1379 smbios_tables_len); 1380 1381 if (load_image_size(val, (uint8_t *)header, size) != size) { 1382 error_setg(errp, "Failed to load SMBIOS file %s", val); 1383 return; 1384 } 1385 1386 if (header->type <= SMBIOS_MAX_TYPE) { 1387 if (test_bit(header->type, have_fields_bitmap)) { 1388 error_setg(errp, 1389 "can't load type %d struct, fields already specified!", 1390 header->type); 1391 return; 1392 } 1393 set_bit(header->type, have_binfile_bitmap); 1394 } 1395 1396 if (header->type == 4) { 1397 smbios_type4_count++; 1398 } 1399 1400 smbios_tables_len += size; 1401 if (size > smbios_table_max) { 1402 smbios_table_max = size; 1403 } 1404 smbios_table_cnt++; 1405 1406 /* add a copy of the newly loaded blob to legacy smbios_entries */ 1407 /* NOTE: This code runs before smbios_set_defaults(), so we don't 1408 * yet know which mode (legacy vs. aggregate-table) will be 1409 * required. We therefore add the binary blob to both legacy 1410 * (smbios_entries) and aggregate (smbios_tables) tables, and 1411 * delete the one we don't need from smbios_set_defaults(), 1412 * once we know which machine version has been requested. 1413 */ 1414 if (!smbios_entries) { 1415 smbios_entries_len = sizeof(uint16_t); 1416 smbios_entries = g_malloc0(smbios_entries_len); 1417 } 1418 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 1419 size + sizeof(*table)); 1420 table = (struct smbios_table *)(smbios_entries + smbios_entries_len); 1421 table->header.type = SMBIOS_TABLE_ENTRY; 1422 table->header.length = cpu_to_le16(sizeof(*table) + size); 1423 memcpy(table->data, header, size); 1424 smbios_entries_len += sizeof(*table) + size; 1425 (*(uint16_t *)smbios_entries) = 1426 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 1427 /* end: add a copy of the newly loaded blob to legacy smbios_entries */ 1428 1429 return; 1430 } 1431 1432 val = qemu_opt_get(opts, "type"); 1433 if (val) { 1434 unsigned long type = strtoul(val, NULL, 0); 1435 1436 if (type > SMBIOS_MAX_TYPE) { 1437 error_setg(errp, "out of range!"); 1438 return; 1439 } 1440 1441 if (test_bit(type, have_binfile_bitmap)) { 1442 error_setg(errp, "can't add fields, binary file already loaded!"); 1443 return; 1444 } 1445 set_bit(type, have_fields_bitmap); 1446 1447 switch (type) { 1448 case 0: 1449 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) { 1450 return; 1451 } 1452 save_opt(&type0.vendor, opts, "vendor"); 1453 save_opt(&type0.version, opts, "version"); 1454 save_opt(&type0.date, opts, "date"); 1455 type0.uefi = qemu_opt_get_bool(opts, "uefi", false); 1456 1457 val = qemu_opt_get(opts, "release"); 1458 if (val) { 1459 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) { 1460 error_setg(errp, "Invalid release"); 1461 return; 1462 } 1463 type0.have_major_minor = true; 1464 } 1465 return; 1466 case 1: 1467 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) { 1468 return; 1469 } 1470 save_opt(&type1.manufacturer, opts, "manufacturer"); 1471 save_opt(&type1.product, opts, "product"); 1472 save_opt(&type1.version, opts, "version"); 1473 save_opt(&type1.serial, opts, "serial"); 1474 save_opt(&type1.sku, opts, "sku"); 1475 save_opt(&type1.family, opts, "family"); 1476 1477 val = qemu_opt_get(opts, "uuid"); 1478 if (val) { 1479 if (qemu_uuid_parse(val, &qemu_uuid) != 0) { 1480 error_setg(errp, "Invalid UUID"); 1481 return; 1482 } 1483 qemu_uuid_set = true; 1484 } 1485 return; 1486 case 2: 1487 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) { 1488 return; 1489 } 1490 save_opt(&type2.manufacturer, opts, "manufacturer"); 1491 save_opt(&type2.product, opts, "product"); 1492 save_opt(&type2.version, opts, "version"); 1493 save_opt(&type2.serial, opts, "serial"); 1494 save_opt(&type2.asset, opts, "asset"); 1495 save_opt(&type2.location, opts, "location"); 1496 return; 1497 case 3: 1498 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) { 1499 return; 1500 } 1501 save_opt(&type3.manufacturer, opts, "manufacturer"); 1502 save_opt(&type3.version, opts, "version"); 1503 save_opt(&type3.serial, opts, "serial"); 1504 save_opt(&type3.asset, opts, "asset"); 1505 save_opt(&type3.sku, opts, "sku"); 1506 return; 1507 case 4: 1508 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) { 1509 return; 1510 } 1511 save_opt(&type4.sock_pfx, opts, "sock_pfx"); 1512 type4.processor_family = qemu_opt_get_number(opts, 1513 "processor-family", 1514 0x01 /* Other */); 1515 save_opt(&type4.manufacturer, opts, "manufacturer"); 1516 save_opt(&type4.version, opts, "version"); 1517 save_opt(&type4.serial, opts, "serial"); 1518 save_opt(&type4.asset, opts, "asset"); 1519 save_opt(&type4.part, opts, "part"); 1520 /* If the value is 0, it will take the value from the CPU model. */ 1521 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); 1522 type4.max_speed = qemu_opt_get_number(opts, "max-speed", 1523 DEFAULT_CPU_SPEED); 1524 type4.current_speed = qemu_opt_get_number(opts, "current-speed", 1525 DEFAULT_CPU_SPEED); 1526 if (type4.max_speed > UINT16_MAX || 1527 type4.current_speed > UINT16_MAX) { 1528 error_setg(errp, "SMBIOS CPU speed is too large (> %d)", 1529 UINT16_MAX); 1530 } 1531 return; 1532 case 8: 1533 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) { 1534 return; 1535 } 1536 struct type8_instance *t8_i; 1537 t8_i = g_new0(struct type8_instance, 1); 1538 save_opt(&t8_i->internal_reference, opts, "internal_reference"); 1539 save_opt(&t8_i->external_reference, opts, "external_reference"); 1540 t8_i->connector_type = qemu_opt_get_number(opts, 1541 "connector_type", 0); 1542 t8_i->port_type = qemu_opt_get_number(opts, "port_type", 0); 1543 QTAILQ_INSERT_TAIL(&type8, t8_i, next); 1544 return; 1545 case 9: { 1546 if (!qemu_opts_validate(opts, qemu_smbios_type9_opts, errp)) { 1547 return; 1548 } 1549 struct type9_instance *t; 1550 t = g_new0(struct type9_instance, 1); 1551 save_opt(&t->slot_designation, opts, "slot_designation"); 1552 t->slot_type = qemu_opt_get_number(opts, "slot_type", 0); 1553 t->slot_data_bus_width = qemu_opt_get_number(opts, "slot_data_bus_width", 0); 1554 t->current_usage = qemu_opt_get_number(opts, "current_usage", 0); 1555 t->slot_length = qemu_opt_get_number(opts, "slot_length", 0); 1556 t->slot_id = qemu_opt_get_number(opts, "slot_id", 0); 1557 t->slot_characteristics1 = qemu_opt_get_number(opts, "slot_characteristics1", 0); 1558 t->slot_characteristics2 = qemu_opt_get_number(opts, "slot_characteristics2", 0); 1559 QTAILQ_INSERT_TAIL(&type9, t, next); 1560 return; 1561 } 1562 case 11: 1563 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) { 1564 return; 1565 } 1566 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) { 1567 return; 1568 } 1569 return; 1570 case 17: 1571 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) { 1572 return; 1573 } 1574 save_opt(&type17.loc_pfx, opts, "loc_pfx"); 1575 save_opt(&type17.bank, opts, "bank"); 1576 save_opt(&type17.manufacturer, opts, "manufacturer"); 1577 save_opt(&type17.serial, opts, "serial"); 1578 save_opt(&type17.asset, opts, "asset"); 1579 save_opt(&type17.part, opts, "part"); 1580 type17.speed = qemu_opt_get_number(opts, "speed", 0); 1581 return; 1582 case 41: { 1583 struct type41_instance *t41_i; 1584 Error *local_err = NULL; 1585 1586 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) { 1587 return; 1588 } 1589 t41_i = g_new0(struct type41_instance, 1); 1590 save_opt(&t41_i->designation, opts, "designation"); 1591 t41_i->kind = qapi_enum_parse(&type41_kind_lookup, 1592 qemu_opt_get(opts, "kind"), 1593 0, &local_err) + 1; 1594 t41_i->kind |= 0x80; /* enabled */ 1595 if (local_err != NULL) { 1596 error_propagate(errp, local_err); 1597 g_free(t41_i); 1598 return; 1599 } 1600 t41_i->instance = qemu_opt_get_number(opts, "instance", 1); 1601 save_opt(&t41_i->pcidev, opts, "pcidev"); 1602 1603 QTAILQ_INSERT_TAIL(&type41, t41_i, next); 1604 return; 1605 } 1606 default: 1607 error_setg(errp, 1608 "Don't know how to build fields for SMBIOS type %ld", 1609 type); 1610 return; 1611 } 1612 } 1613 1614 error_setg(errp, "Must specify type= or file="); 1615 } 1616