1 /* 2 * s390 IPL device 3 * 4 * Copyright 2015, 2020 IBM Corp. 5 * Author(s): Zhang Fan <bjfanzh@cn.ibm.com> 6 * Janosch Frank <frankja@linux.ibm.com> 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or (at 9 * your option) any later version. See the COPYING file in the top-level 10 * directory. 11 */ 12 13 #ifndef HW_S390_IPL_H 14 #define HW_S390_IPL_H 15 16 #include "cpu.h" 17 #include "exec/target_page.h" 18 #include "system/address-spaces.h" 19 #include "system/memory.h" 20 #include "hw/qdev-core.h" 21 #include "hw/s390x/ipl/qipl.h" 22 #include "qom/object.h" 23 #include "target/s390x/kvm/pv.h" 24 25 #define DIAG308_FLAGS_LP_VALID 0x80 26 #define MAX_BOOT_DEVS 8 /* Max number of devices that may have a bootindex */ 27 28 void s390_ipl_convert_loadparm(char *ascii_lp, uint8_t *ebcdic_lp); 29 void s390_ipl_fmt_loadparm(uint8_t *loadparm, char *str, Error **errp); 30 void s390_rebuild_iplb(uint16_t index, IplParameterBlock *iplb); 31 void s390_ipl_update_diag308(IplParameterBlock *iplb); 32 int s390_ipl_prepare_pv_header(struct S390PVResponse *pv_resp, 33 Error **errp); 34 int s390_ipl_pv_unpack(struct S390PVResponse *pv_resp); 35 void s390_ipl_prepare_cpu(S390CPU *cpu); 36 IplParameterBlock *s390_ipl_get_iplb(void); 37 IplParameterBlock *s390_ipl_get_iplb_pv(void); 38 39 enum s390_reset { 40 /* default is a reset not triggered by a CPU e.g. issued by QMP */ 41 S390_RESET_EXTERNAL = 0, 42 S390_RESET_REIPL, 43 S390_RESET_MODIFIED_CLEAR, 44 S390_RESET_LOAD_NORMAL, 45 S390_RESET_PV, 46 }; 47 void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type); 48 void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type); 49 void s390_ipl_clear_reset_request(void); 50 51 #define QIPL_ADDRESS 0xcc 52 53 /* Boot Menu flags */ 54 #define QIPL_FLAG_BM_OPTS_CMD 0x80 55 #define QIPL_FLAG_BM_OPTS_ZIPL 0x40 56 57 #define TYPE_S390_IPL "s390-ipl" 58 OBJECT_DECLARE_SIMPLE_TYPE(S390IPLState, S390_IPL) 59 60 struct S390IPLState { 61 /*< private >*/ 62 DeviceState parent_obj; 63 IplParameterBlock iplb; 64 IplParameterBlock iplb_pv; 65 QemuIplParameters qipl; 66 uint64_t start_addr; 67 uint64_t compat_start_addr; 68 uint64_t bios_start_addr; 69 uint64_t compat_bios_start_addr; 70 bool enforce_bios; 71 bool iplb_valid; 72 bool iplb_valid_pv; 73 bool rebuilt_iplb; 74 uint16_t iplb_index; 75 /* reset related properties don't have to be migrated or reset */ 76 enum s390_reset reset_type; 77 int reset_cpu_index; 78 79 /*< public >*/ 80 char *kernel; 81 char *initrd; 82 char *cmdline; 83 char *firmware; 84 uint8_t cssid; 85 uint8_t ssid; 86 uint16_t devno; 87 }; 88 QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong"); 89 90 #define DIAG_308_RC_OK 0x0001 91 #define DIAG_308_RC_NO_CONF 0x0102 92 #define DIAG_308_RC_INVALID 0x0402 93 #define DIAG_308_RC_NO_PV_CONF 0x0902 94 #define DIAG_308_RC_INVAL_FOR_PV 0x0a02 95 96 #define DIAG308_RESET_MOD_CLR 0 97 #define DIAG308_RESET_LOAD_NORM 1 98 #define DIAG308_LOAD_CLEAR 3 99 #define DIAG308_LOAD_NORMAL_DUMP 4 100 #define DIAG308_SET 5 101 #define DIAG308_STORE 6 102 #define DIAG308_PV_SET 8 103 #define DIAG308_PV_STORE 9 104 #define DIAG308_PV_START 10 105 106 #define S390_IPL_TYPE_FCP 0x00 107 #define S390_IPL_TYPE_CCW 0x02 108 #define S390_IPL_TYPE_PV 0x05 109 #define S390_IPL_TYPE_QEMU_SCSI 0xff 110 111 #define S390_IPLB_HEADER_LEN 8 112 #define S390_IPLB_MIN_PV_LEN 148 113 #define S390_IPLB_MIN_CCW_LEN 200 114 #define S390_IPLB_MIN_FCP_LEN 384 115 #define S390_IPLB_MIN_QEMU_SCSI_LEN 200 116 117 static inline bool iplb_valid_len(IplParameterBlock *iplb) 118 { 119 return be32_to_cpu(iplb->len) <= sizeof(IplParameterBlock); 120 } 121 122 static inline bool ipl_valid_pv_components(IplParameterBlock *iplb) 123 { 124 IPLBlockPV *ipib_pv = &iplb->pv; 125 int i; 126 127 if (ipib_pv->num_comp == 0) { 128 return false; 129 } 130 131 for (i = 0; i < ipib_pv->num_comp; i++) { 132 /* Addr must be 4k aligned */ 133 if (ipib_pv->components[i].addr & ~TARGET_PAGE_MASK) { 134 return false; 135 } 136 137 /* Tweak prefix is monotonically increasing with each component */ 138 if (i < ipib_pv->num_comp - 1 && 139 ipib_pv->components[i].tweak_pref >= 140 ipib_pv->components[i + 1].tweak_pref) { 141 return false; 142 } 143 } 144 return true; 145 } 146 147 static inline bool ipl_valid_pv_header(IplParameterBlock *iplb) 148 { 149 IPLBlockPV *ipib_pv = &iplb->pv; 150 151 if (ipib_pv->pv_header_len > 2 * TARGET_PAGE_SIZE) { 152 return false; 153 } 154 155 if (!address_space_access_valid(&address_space_memory, 156 ipib_pv->pv_header_addr, 157 ipib_pv->pv_header_len, 158 false, 159 MEMTXATTRS_UNSPECIFIED)) { 160 return false; 161 } 162 163 return true; 164 } 165 166 static inline bool iplb_valid_pv(IplParameterBlock *iplb) 167 { 168 if (iplb->pbt != S390_IPL_TYPE_PV || 169 be32_to_cpu(iplb->len) < S390_IPLB_MIN_PV_LEN) { 170 return false; 171 } 172 if (!ipl_valid_pv_header(iplb)) { 173 return false; 174 } 175 return ipl_valid_pv_components(iplb); 176 } 177 178 static inline bool iplb_valid(IplParameterBlock *iplb) 179 { 180 uint32_t len = be32_to_cpu(iplb->len); 181 182 switch (iplb->pbt) { 183 case S390_IPL_TYPE_FCP: 184 return len >= S390_IPLB_MIN_FCP_LEN; 185 case S390_IPL_TYPE_CCW: 186 return len >= S390_IPLB_MIN_CCW_LEN; 187 case S390_IPL_TYPE_QEMU_SCSI: 188 default: 189 return false; 190 } 191 } 192 193 #endif 194