1 /* 2 * s390 IPL device 3 * 4 * Copyright 2015, 2020 IBM Corp. 5 * Author(s): Zhang Fan <bjfanzh@cn.ibm.com> 6 * Janosch Frank <frankja@linux.ibm.com> 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or (at 9 * your option) any later version. See the COPYING file in the top-level 10 * directory. 11 */ 12 13 #ifndef HW_S390_IPL_H 14 #define HW_S390_IPL_H 15 16 #include "cpu.h" 17 #include "exec/target_page.h" 18 #include "system/address-spaces.h" 19 #include "system/memory.h" 20 #include "hw/qdev-core.h" 21 #include "hw/s390x/ipl/qipl.h" 22 #include "qom/object.h" 23 24 #define DIAG308_FLAGS_LP_VALID 0x80 25 #define MAX_BOOT_DEVS 8 /* Max number of devices that may have a bootindex */ 26 27 void s390_ipl_convert_loadparm(char *ascii_lp, uint8_t *ebcdic_lp); 28 void s390_ipl_fmt_loadparm(uint8_t *loadparm, char *str, Error **errp); 29 void s390_rebuild_iplb(uint16_t index, IplParameterBlock *iplb); 30 void s390_ipl_update_diag308(IplParameterBlock *iplb); 31 int s390_ipl_prepare_pv_header(Error **errp); 32 int s390_ipl_pv_unpack(void); 33 void s390_ipl_prepare_cpu(S390CPU *cpu); 34 IplParameterBlock *s390_ipl_get_iplb(void); 35 IplParameterBlock *s390_ipl_get_iplb_pv(void); 36 37 enum s390_reset { 38 /* default is a reset not triggered by a CPU e.g. issued by QMP */ 39 S390_RESET_EXTERNAL = 0, 40 S390_RESET_REIPL, 41 S390_RESET_MODIFIED_CLEAR, 42 S390_RESET_LOAD_NORMAL, 43 S390_RESET_PV, 44 }; 45 void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type); 46 void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type); 47 void s390_ipl_clear_reset_request(void); 48 49 #define QIPL_ADDRESS 0xcc 50 51 /* Boot Menu flags */ 52 #define QIPL_FLAG_BM_OPTS_CMD 0x80 53 #define QIPL_FLAG_BM_OPTS_ZIPL 0x40 54 55 #define TYPE_S390_IPL "s390-ipl" 56 OBJECT_DECLARE_SIMPLE_TYPE(S390IPLState, S390_IPL) 57 58 struct S390IPLState { 59 /*< private >*/ 60 DeviceState parent_obj; 61 IplParameterBlock iplb; 62 IplParameterBlock iplb_pv; 63 QemuIplParameters qipl; 64 uint64_t start_addr; 65 uint64_t compat_start_addr; 66 uint64_t bios_start_addr; 67 uint64_t compat_bios_start_addr; 68 bool enforce_bios; 69 bool iplb_valid; 70 bool iplb_valid_pv; 71 bool rebuilt_iplb; 72 uint16_t iplb_index; 73 /* reset related properties don't have to be migrated or reset */ 74 enum s390_reset reset_type; 75 int reset_cpu_index; 76 77 /*< public >*/ 78 char *kernel; 79 char *initrd; 80 char *cmdline; 81 char *firmware; 82 uint8_t cssid; 83 uint8_t ssid; 84 uint16_t devno; 85 }; 86 QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong"); 87 88 #define DIAG_308_RC_OK 0x0001 89 #define DIAG_308_RC_NO_CONF 0x0102 90 #define DIAG_308_RC_INVALID 0x0402 91 #define DIAG_308_RC_NO_PV_CONF 0x0902 92 #define DIAG_308_RC_INVAL_FOR_PV 0x0a02 93 94 #define DIAG308_RESET_MOD_CLR 0 95 #define DIAG308_RESET_LOAD_NORM 1 96 #define DIAG308_LOAD_CLEAR 3 97 #define DIAG308_LOAD_NORMAL_DUMP 4 98 #define DIAG308_SET 5 99 #define DIAG308_STORE 6 100 #define DIAG308_PV_SET 8 101 #define DIAG308_PV_STORE 9 102 #define DIAG308_PV_START 10 103 104 #define S390_IPL_TYPE_FCP 0x00 105 #define S390_IPL_TYPE_CCW 0x02 106 #define S390_IPL_TYPE_PV 0x05 107 #define S390_IPL_TYPE_QEMU_SCSI 0xff 108 109 #define S390_IPLB_HEADER_LEN 8 110 #define S390_IPLB_MIN_PV_LEN 148 111 #define S390_IPLB_MIN_CCW_LEN 200 112 #define S390_IPLB_MIN_FCP_LEN 384 113 #define S390_IPLB_MIN_QEMU_SCSI_LEN 200 114 115 static inline bool iplb_valid_len(IplParameterBlock *iplb) 116 { 117 return be32_to_cpu(iplb->len) <= sizeof(IplParameterBlock); 118 } 119 120 static inline bool ipl_valid_pv_components(IplParameterBlock *iplb) 121 { 122 IPLBlockPV *ipib_pv = &iplb->pv; 123 int i; 124 125 if (ipib_pv->num_comp == 0) { 126 return false; 127 } 128 129 for (i = 0; i < ipib_pv->num_comp; i++) { 130 /* Addr must be 4k aligned */ 131 if (ipib_pv->components[i].addr & ~TARGET_PAGE_MASK) { 132 return false; 133 } 134 135 /* Tweak prefix is monotonically increasing with each component */ 136 if (i < ipib_pv->num_comp - 1 && 137 ipib_pv->components[i].tweak_pref >= 138 ipib_pv->components[i + 1].tweak_pref) { 139 return false; 140 } 141 } 142 return true; 143 } 144 145 static inline bool ipl_valid_pv_header(IplParameterBlock *iplb) 146 { 147 IPLBlockPV *ipib_pv = &iplb->pv; 148 149 if (ipib_pv->pv_header_len > 2 * TARGET_PAGE_SIZE) { 150 return false; 151 } 152 153 if (!address_space_access_valid(&address_space_memory, 154 ipib_pv->pv_header_addr, 155 ipib_pv->pv_header_len, 156 false, 157 MEMTXATTRS_UNSPECIFIED)) { 158 return false; 159 } 160 161 return true; 162 } 163 164 static inline bool iplb_valid_pv(IplParameterBlock *iplb) 165 { 166 if (iplb->pbt != S390_IPL_TYPE_PV || 167 be32_to_cpu(iplb->len) < S390_IPLB_MIN_PV_LEN) { 168 return false; 169 } 170 if (!ipl_valid_pv_header(iplb)) { 171 return false; 172 } 173 return ipl_valid_pv_components(iplb); 174 } 175 176 static inline bool iplb_valid(IplParameterBlock *iplb) 177 { 178 uint32_t len = be32_to_cpu(iplb->len); 179 180 switch (iplb->pbt) { 181 case S390_IPL_TYPE_FCP: 182 return len >= S390_IPLB_MIN_FCP_LEN; 183 case S390_IPL_TYPE_CCW: 184 return len >= S390_IPLB_MIN_CCW_LEN; 185 case S390_IPL_TYPE_QEMU_SCSI: 186 default: 187 return false; 188 } 189 } 190 191 #endif 192