1fe0fe473SAlistair Francis /* 2fe0fe473SAlistair Francis * QEMU RISC-V Board Compatible with OpenTitan FPGA platform 3fe0fe473SAlistair Francis * 4fe0fe473SAlistair Francis * Copyright (c) 2020 Western Digital 5fe0fe473SAlistair Francis * 6fe0fe473SAlistair Francis * Provides a board compatible with the OpenTitan FPGA platform: 7fe0fe473SAlistair Francis * 8fe0fe473SAlistair Francis * This program is free software; you can redistribute it and/or modify it 9fe0fe473SAlistair Francis * under the terms and conditions of the GNU General Public License, 10fe0fe473SAlistair Francis * version 2 or later, as published by the Free Software Foundation. 11fe0fe473SAlistair Francis * 12fe0fe473SAlistair Francis * This program is distributed in the hope it will be useful, but WITHOUT 13fe0fe473SAlistair Francis * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14fe0fe473SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15fe0fe473SAlistair Francis * more details. 16fe0fe473SAlistair Francis * 17fe0fe473SAlistair Francis * You should have received a copy of the GNU General Public License along with 18fe0fe473SAlistair Francis * this program. If not, see <http://www.gnu.org/licenses/>. 19fe0fe473SAlistair Francis */ 20fe0fe473SAlistair Francis 21fe0fe473SAlistair Francis #include "qemu/osdep.h" 22fe0fe473SAlistair Francis #include "hw/riscv/opentitan.h" 23fe0fe473SAlistair Francis #include "qapi/error.h" 24fe0fe473SAlistair Francis #include "hw/boards.h" 25fe0fe473SAlistair Francis #include "hw/misc/unimp.h" 26fe0fe473SAlistair Francis #include "hw/riscv/boot.h" 27888c9af2SAlistair Francis #include "qemu/units.h" 28b9fc5135SAlistair Francis #include "sysemu/sysemu.h" 29fe0fe473SAlistair Francis 3073261285SBin Meng static const MemMapEntry ibex_memmap[] = { 3130c717cbSEduardo Habkost [IBEX_DEV_ROM] = { 0x00008000, 16 * KiB }, 3230c717cbSEduardo Habkost [IBEX_DEV_RAM] = { 0x10000000, 0x10000 }, 3330c717cbSEduardo Habkost [IBEX_DEV_FLASH] = { 0x20000000, 0x80000 }, 34d31e970aSAlistair Francis [IBEX_DEV_UART] = { 0x40000000, 0x1000 }, 35d31e970aSAlistair Francis [IBEX_DEV_GPIO] = { 0x40040000, 0x1000 }, 36d31e970aSAlistair Francis [IBEX_DEV_SPI] = { 0x40050000, 0x1000 }, 37d31e970aSAlistair Francis [IBEX_DEV_I2C] = { 0x40080000, 0x1000 }, 38d31e970aSAlistair Francis [IBEX_DEV_PATTGEN] = { 0x400e0000, 0x1000 }, 393ef64344SAlistair Francis [IBEX_DEV_TIMER] = { 0x40100000, 0x1000 }, 40d31e970aSAlistair Francis [IBEX_DEV_SENSOR_CTRL] = { 0x40110000, 0x1000 }, 41d31e970aSAlistair Francis [IBEX_DEV_OTP_CTRL] = { 0x40130000, 0x4000 }, 42ed481d98SAlistair Francis [IBEX_DEV_USBDEV] = { 0x40150000, 0x1000 }, 43d31e970aSAlistair Francis [IBEX_DEV_PWRMGR] = { 0x40400000, 0x1000 }, 44d31e970aSAlistair Francis [IBEX_DEV_RSTMGR] = { 0x40410000, 0x1000 }, 45d31e970aSAlistair Francis [IBEX_DEV_CLKMGR] = { 0x40420000, 0x1000 }, 46d31e970aSAlistair Francis [IBEX_DEV_PINMUX] = { 0x40460000, 0x1000 }, 47d31e970aSAlistair Francis [IBEX_DEV_PADCTRL] = { 0x40470000, 0x1000 }, 48d31e970aSAlistair Francis [IBEX_DEV_FLASH_CTRL] = { 0x41000000, 0x1000 }, 49d31e970aSAlistair Francis [IBEX_DEV_AES] = { 0x41100000, 0x1000 }, 50d31e970aSAlistair Francis [IBEX_DEV_HMAC] = { 0x41110000, 0x1000 }, 51d31e970aSAlistair Francis [IBEX_DEV_KMAC] = { 0x41120000, 0x1000 }, 52*ef631006SAlistair Francis [IBEX_DEV_OTBN] = { 0x41130000, 0x10000 }, 53*ef631006SAlistair Francis [IBEX_DEV_KEYMGR] = { 0x41140000, 0x1000 }, 54d31e970aSAlistair Francis [IBEX_DEV_CSRNG] = { 0x41150000, 0x1000 }, 55d31e970aSAlistair Francis [IBEX_DEV_ENTROPY] = { 0x41160000, 0x1000 }, 56d31e970aSAlistair Francis [IBEX_DEV_EDNO] = { 0x41170000, 0x1000 }, 57d31e970aSAlistair Francis [IBEX_DEV_EDN1] = { 0x41180000, 0x1000 }, 58d31e970aSAlistair Francis [IBEX_DEV_ALERT_HANDLER] = { 0x411b0000, 0x1000 }, 59d31e970aSAlistair Francis [IBEX_DEV_NMI_GEN] = { 0x411c0000, 0x1000 }, 605ee25764SAlistair Francis [IBEX_DEV_PERI] = { 0x411f0000, 0x10000 }, 61*ef631006SAlistair Francis [IBEX_DEV_PLIC] = { 0x48000000, 0x4005000 }, 62bb7e0cdeSAlistair Francis [IBEX_DEV_FLASH_VIRTUAL] = { 0x80000000, 0x80000 }, 63fe0fe473SAlistair Francis }; 64fe0fe473SAlistair Francis 6589494462SBin Meng static void opentitan_board_init(MachineState *machine) 66fe0fe473SAlistair Francis { 6773261285SBin Meng const MemMapEntry *memmap = ibex_memmap; 68fe0fe473SAlistair Francis OpenTitanState *s = g_new0(OpenTitanState, 1); 69fe0fe473SAlistair Francis MemoryRegion *sys_mem = get_system_memory(); 70fe0fe473SAlistair Francis MemoryRegion *main_mem = g_new(MemoryRegion, 1); 71fe0fe473SAlistair Francis 72fe0fe473SAlistair Francis /* Initialize SoC */ 73fe0fe473SAlistair Francis object_initialize_child(OBJECT(machine), "soc", &s->soc, 749fc7fc4dSMarkus Armbruster TYPE_RISCV_IBEX_SOC); 75ce189ab2SMarkus Armbruster qdev_realize(DEVICE(&s->soc), NULL, &error_abort); 76fe0fe473SAlistair Francis 77fe0fe473SAlistair Francis memory_region_init_ram(main_mem, NULL, "riscv.lowrisc.ibex.ram", 7830c717cbSEduardo Habkost memmap[IBEX_DEV_RAM].size, &error_fatal); 79fe0fe473SAlistair Francis memory_region_add_subregion(sys_mem, 8030c717cbSEduardo Habkost memmap[IBEX_DEV_RAM].base, main_mem); 81fe0fe473SAlistair Francis 82fe0fe473SAlistair Francis if (machine->firmware) { 8330c717cbSEduardo Habkost riscv_load_firmware(machine->firmware, memmap[IBEX_DEV_RAM].base, NULL); 84fe0fe473SAlistair Francis } 85fe0fe473SAlistair Francis 86fe0fe473SAlistair Francis if (machine->kernel_filename) { 8738bc4e34SAlistair Francis riscv_load_kernel(machine->kernel_filename, 8838bc4e34SAlistair Francis memmap[IBEX_DEV_RAM].base, NULL); 89fe0fe473SAlistair Francis } 90fe0fe473SAlistair Francis } 91fe0fe473SAlistair Francis 9289494462SBin Meng static void opentitan_machine_init(MachineClass *mc) 93fe0fe473SAlistair Francis { 94fe0fe473SAlistair Francis mc->desc = "RISC-V Board compatible with OpenTitan"; 9589494462SBin Meng mc->init = opentitan_board_init; 96fe0fe473SAlistair Francis mc->max_cpus = 1; 97fe0fe473SAlistair Francis mc->default_cpu_type = TYPE_RISCV_CPU_IBEX; 98fe0fe473SAlistair Francis } 99fe0fe473SAlistair Francis 10089494462SBin Meng DEFINE_MACHINE("opentitan", opentitan_machine_init) 101fe0fe473SAlistair Francis 10289494462SBin Meng static void lowrisc_ibex_soc_init(Object *obj) 103fe0fe473SAlistair Francis { 104fe0fe473SAlistair Francis LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj); 105fe0fe473SAlistair Francis 106db873cc5SMarkus Armbruster object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); 107b9fc5135SAlistair Francis 108*ef631006SAlistair Francis object_initialize_child(obj, "plic", &s->plic, TYPE_SIFIVE_PLIC); 109cc411260SAlistair Francis 110cc411260SAlistair Francis object_initialize_child(obj, "uart", &s->uart, TYPE_IBEX_UART); 1113ef64344SAlistair Francis 1123ef64344SAlistair Francis object_initialize_child(obj, "timer", &s->timer, TYPE_IBEX_TIMER); 113fe0fe473SAlistair Francis } 114fe0fe473SAlistair Francis 11589494462SBin Meng static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) 116fe0fe473SAlistair Francis { 11773261285SBin Meng const MemMapEntry *memmap = ibex_memmap; 118fe0fe473SAlistair Francis MachineState *ms = MACHINE(qdev_get_machine()); 119fe0fe473SAlistair Francis LowRISCIbexSoCState *s = RISCV_IBEX_SOC(dev_soc); 120fe0fe473SAlistair Francis MemoryRegion *sys_mem = get_system_memory(); 121e5cc6aaeSAlistair Francis int i; 122fe0fe473SAlistair Francis 1235325cc34SMarkus Armbruster object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, 124fe0fe473SAlistair Francis &error_abort); 1255325cc34SMarkus Armbruster object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, 126fe0fe473SAlistair Francis &error_abort); 127d11e316dSAlexander Wagner object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x8080, &error_abort); 128db873cc5SMarkus Armbruster sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort); 129fe0fe473SAlistair Francis 130fe0fe473SAlistair Francis /* Boot ROM */ 131fe0fe473SAlistair Francis memory_region_init_rom(&s->rom, OBJECT(dev_soc), "riscv.lowrisc.ibex.rom", 13230c717cbSEduardo Habkost memmap[IBEX_DEV_ROM].size, &error_fatal); 133fe0fe473SAlistair Francis memory_region_add_subregion(sys_mem, 13430c717cbSEduardo Habkost memmap[IBEX_DEV_ROM].base, &s->rom); 135fe0fe473SAlistair Francis 136fe0fe473SAlistair Francis /* Flash memory */ 137fe0fe473SAlistair Francis memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.ibex.flash", 13830c717cbSEduardo Habkost memmap[IBEX_DEV_FLASH].size, &error_fatal); 139bb7e0cdeSAlistair Francis memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), 140bb7e0cdeSAlistair Francis "riscv.lowrisc.ibex.flash_virtual", &s->flash_mem, 0, 141bb7e0cdeSAlistair Francis memmap[IBEX_DEV_FLASH_VIRTUAL].size); 14230c717cbSEduardo Habkost memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, 143fe0fe473SAlistair Francis &s->flash_mem); 144bb7e0cdeSAlistair Francis memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH_VIRTUAL].base, 145bb7e0cdeSAlistair Francis &s->flash_alias); 146fe0fe473SAlistair Francis 147b9fc5135SAlistair Francis /* PLIC */ 148*ef631006SAlistair Francis qdev_prop_set_string(DEVICE(&s->plic), "hart-config", "M"); 149*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "hartid-base", 0); 150*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "num-sources", 180); 151*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "num-priorities", 3); 152*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00); 153*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000); 154*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000); 155*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 0x18); 156*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "context-base", 0x200004); 157*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "context-stride", 4); 158*ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "aperture-size", memmap[IBEX_DEV_PLIC].size); 159*ef631006SAlistair Francis 160668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { 161b9fc5135SAlistair Francis return; 162b9fc5135SAlistair Francis } 16330c717cbSEduardo Habkost sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_DEV_PLIC].base); 164b9fc5135SAlistair Francis 165e5cc6aaeSAlistair Francis for (i = 0; i < ms->smp.cpus; i++) { 166e5cc6aaeSAlistair Francis CPUState *cpu = qemu_get_cpu(i); 167e5cc6aaeSAlistair Francis 168*ef631006SAlistair Francis qdev_connect_gpio_out(DEVICE(&s->plic), ms->smp.cpus + i, 169e5cc6aaeSAlistair Francis qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); 170e5cc6aaeSAlistair Francis } 171e5cc6aaeSAlistair Francis 172cc411260SAlistair Francis /* UART */ 173cc411260SAlistair Francis qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0)); 174668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { 175cc411260SAlistair Francis return; 176cc411260SAlistair Francis } 17730c717cbSEduardo Habkost sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_DEV_UART].base); 178cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 179cc411260SAlistair Francis 0, qdev_get_gpio_in(DEVICE(&s->plic), 180d4cad544SAlistair Francis IBEX_UART0_TX_WATERMARK_IRQ)); 181cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 182cc411260SAlistair Francis 1, qdev_get_gpio_in(DEVICE(&s->plic), 183d4cad544SAlistair Francis IBEX_UART0_RX_WATERMARK_IRQ)); 184cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 185cc411260SAlistair Francis 2, qdev_get_gpio_in(DEVICE(&s->plic), 186d4cad544SAlistair Francis IBEX_UART0_TX_EMPTY_IRQ)); 187cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 188cc411260SAlistair Francis 3, qdev_get_gpio_in(DEVICE(&s->plic), 189d4cad544SAlistair Francis IBEX_UART0_RX_OVERFLOW_IRQ)); 190cc411260SAlistair Francis 1913ef64344SAlistair Francis if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) { 1923ef64344SAlistair Francis return; 1933ef64344SAlistair Francis } 1943ef64344SAlistair Francis sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, memmap[IBEX_DEV_TIMER].base); 1953ef64344SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer), 1963ef64344SAlistair Francis 0, qdev_get_gpio_in(DEVICE(&s->plic), 1973ef64344SAlistair Francis IBEX_TIMER_TIMEREXPIRED0_0)); 19857a3a622SAlistair Francis qdev_connect_gpio_out(DEVICE(&s->timer), 0, 19957a3a622SAlistair Francis qdev_get_gpio_in(DEVICE(qemu_get_cpu(0)), 20057a3a622SAlistair Francis IRQ_M_TIMER)); 2013ef64344SAlistair Francis 202fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.gpio", 20330c717cbSEduardo Habkost memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size); 204fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.spi", 20530c717cbSEduardo Habkost memmap[IBEX_DEV_SPI].base, memmap[IBEX_DEV_SPI].size); 206d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.i2c", 207d31e970aSAlistair Francis memmap[IBEX_DEV_I2C].base, memmap[IBEX_DEV_I2C].size); 208d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pattgen", 209d31e970aSAlistair Francis memmap[IBEX_DEV_PATTGEN].base, memmap[IBEX_DEV_PATTGEN].size); 210d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.sensor_ctrl", 211d31e970aSAlistair Francis memmap[IBEX_DEV_SENSOR_CTRL].base, memmap[IBEX_DEV_SENSOR_CTRL].size); 212d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.otp_ctrl", 213d31e970aSAlistair Francis memmap[IBEX_DEV_OTP_CTRL].base, memmap[IBEX_DEV_OTP_CTRL].size); 214fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pwrmgr", 21530c717cbSEduardo Habkost memmap[IBEX_DEV_PWRMGR].base, memmap[IBEX_DEV_PWRMGR].size); 216fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.rstmgr", 21730c717cbSEduardo Habkost memmap[IBEX_DEV_RSTMGR].base, memmap[IBEX_DEV_RSTMGR].size); 218fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.clkmgr", 21930c717cbSEduardo Habkost memmap[IBEX_DEV_CLKMGR].base, memmap[IBEX_DEV_CLKMGR].size); 220d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pinmux", 221d31e970aSAlistair Francis memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size); 222d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.padctrl", 223d31e970aSAlistair Francis memmap[IBEX_DEV_PADCTRL].base, memmap[IBEX_DEV_PADCTRL].size); 224d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.usbdev", 225d31e970aSAlistair Francis memmap[IBEX_DEV_USBDEV].base, memmap[IBEX_DEV_USBDEV].size); 226d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.flash_ctrl", 227d31e970aSAlistair Francis memmap[IBEX_DEV_FLASH_CTRL].base, memmap[IBEX_DEV_FLASH_CTRL].size); 228fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.aes", 22930c717cbSEduardo Habkost memmap[IBEX_DEV_AES].base, memmap[IBEX_DEV_AES].size); 230fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.hmac", 23130c717cbSEduardo Habkost memmap[IBEX_DEV_HMAC].base, memmap[IBEX_DEV_HMAC].size); 232d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.kmac", 233d31e970aSAlistair Francis memmap[IBEX_DEV_KMAC].base, memmap[IBEX_DEV_KMAC].size); 234d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.keymgr", 235d31e970aSAlistair Francis memmap[IBEX_DEV_KEYMGR].base, memmap[IBEX_DEV_KEYMGR].size); 236d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.csrng", 237d31e970aSAlistair Francis memmap[IBEX_DEV_CSRNG].base, memmap[IBEX_DEV_CSRNG].size); 238d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.entropy", 239d31e970aSAlistair Francis memmap[IBEX_DEV_ENTROPY].base, memmap[IBEX_DEV_ENTROPY].size); 240d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.edn0", 241d31e970aSAlistair Francis memmap[IBEX_DEV_EDNO].base, memmap[IBEX_DEV_EDNO].size); 242d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.edn1", 243d31e970aSAlistair Francis memmap[IBEX_DEV_EDN1].base, memmap[IBEX_DEV_EDN1].size); 244fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.alert_handler", 24530c717cbSEduardo Habkost memmap[IBEX_DEV_ALERT_HANDLER].base, memmap[IBEX_DEV_ALERT_HANDLER].size); 246fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen", 24730c717cbSEduardo Habkost memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size); 248d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.otbn", 249d31e970aSAlistair Francis memmap[IBEX_DEV_OTBN].base, memmap[IBEX_DEV_OTBN].size); 2505ee25764SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.peri", 2515ee25764SAlistair Francis memmap[IBEX_DEV_PERI].base, memmap[IBEX_DEV_PERI].size); 252fe0fe473SAlistair Francis } 253fe0fe473SAlistair Francis 25489494462SBin Meng static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) 255fe0fe473SAlistair Francis { 256fe0fe473SAlistair Francis DeviceClass *dc = DEVICE_CLASS(oc); 257fe0fe473SAlistair Francis 25889494462SBin Meng dc->realize = lowrisc_ibex_soc_realize; 259fe0fe473SAlistair Francis /* Reason: Uses serial_hds in realize function, thus can't be used twice */ 260fe0fe473SAlistair Francis dc->user_creatable = false; 261fe0fe473SAlistair Francis } 262fe0fe473SAlistair Francis 26389494462SBin Meng static const TypeInfo lowrisc_ibex_soc_type_info = { 264fe0fe473SAlistair Francis .name = TYPE_RISCV_IBEX_SOC, 265fe0fe473SAlistair Francis .parent = TYPE_DEVICE, 266fe0fe473SAlistair Francis .instance_size = sizeof(LowRISCIbexSoCState), 26789494462SBin Meng .instance_init = lowrisc_ibex_soc_init, 26889494462SBin Meng .class_init = lowrisc_ibex_soc_class_init, 269fe0fe473SAlistair Francis }; 270fe0fe473SAlistair Francis 27189494462SBin Meng static void lowrisc_ibex_soc_register_types(void) 272fe0fe473SAlistair Francis { 27389494462SBin Meng type_register_static(&lowrisc_ibex_soc_type_info); 274fe0fe473SAlistair Francis } 275fe0fe473SAlistair Francis 27689494462SBin Meng type_init(lowrisc_ibex_soc_register_types) 277