1fe0fe473SAlistair Francis /* 2fe0fe473SAlistair Francis * QEMU RISC-V Board Compatible with OpenTitan FPGA platform 3fe0fe473SAlistair Francis * 4fe0fe473SAlistair Francis * Copyright (c) 2020 Western Digital 5fe0fe473SAlistair Francis * 6fe0fe473SAlistair Francis * Provides a board compatible with the OpenTitan FPGA platform: 7fe0fe473SAlistair Francis * 8fe0fe473SAlistair Francis * This program is free software; you can redistribute it and/or modify it 9fe0fe473SAlistair Francis * under the terms and conditions of the GNU General Public License, 10fe0fe473SAlistair Francis * version 2 or later, as published by the Free Software Foundation. 11fe0fe473SAlistair Francis * 12fe0fe473SAlistair Francis * This program is distributed in the hope it will be useful, but WITHOUT 13fe0fe473SAlistair Francis * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14fe0fe473SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15fe0fe473SAlistair Francis * more details. 16fe0fe473SAlistair Francis * 17fe0fe473SAlistair Francis * You should have received a copy of the GNU General Public License along with 18fe0fe473SAlistair Francis * this program. If not, see <http://www.gnu.org/licenses/>. 19fe0fe473SAlistair Francis */ 20fe0fe473SAlistair Francis 21fe0fe473SAlistair Francis #include "qemu/osdep.h" 22*91b1fbdcSBin Meng #include "qemu/cutils.h" 23fe0fe473SAlistair Francis #include "hw/riscv/opentitan.h" 24fe0fe473SAlistair Francis #include "qapi/error.h" 25fe0fe473SAlistair Francis #include "hw/boards.h" 26fe0fe473SAlistair Francis #include "hw/misc/unimp.h" 27fe0fe473SAlistair Francis #include "hw/riscv/boot.h" 28888c9af2SAlistair Francis #include "qemu/units.h" 29b9fc5135SAlistair Francis #include "sysemu/sysemu.h" 30fe0fe473SAlistair Francis 3173261285SBin Meng static const MemMapEntry ibex_memmap[] = { 3230c717cbSEduardo Habkost [IBEX_DEV_ROM] = { 0x00008000, 16 * KiB }, 3330c717cbSEduardo Habkost [IBEX_DEV_RAM] = { 0x10000000, 0x10000 }, 3430c717cbSEduardo Habkost [IBEX_DEV_FLASH] = { 0x20000000, 0x80000 }, 35d31e970aSAlistair Francis [IBEX_DEV_UART] = { 0x40000000, 0x1000 }, 36d31e970aSAlistair Francis [IBEX_DEV_GPIO] = { 0x40040000, 0x1000 }, 37d31e970aSAlistair Francis [IBEX_DEV_SPI] = { 0x40050000, 0x1000 }, 38d31e970aSAlistair Francis [IBEX_DEV_I2C] = { 0x40080000, 0x1000 }, 39d31e970aSAlistair Francis [IBEX_DEV_PATTGEN] = { 0x400e0000, 0x1000 }, 403ef64344SAlistair Francis [IBEX_DEV_TIMER] = { 0x40100000, 0x1000 }, 41d31e970aSAlistair Francis [IBEX_DEV_SENSOR_CTRL] = { 0x40110000, 0x1000 }, 42d31e970aSAlistair Francis [IBEX_DEV_OTP_CTRL] = { 0x40130000, 0x4000 }, 43ed481d98SAlistair Francis [IBEX_DEV_USBDEV] = { 0x40150000, 0x1000 }, 44d31e970aSAlistair Francis [IBEX_DEV_PWRMGR] = { 0x40400000, 0x1000 }, 45d31e970aSAlistair Francis [IBEX_DEV_RSTMGR] = { 0x40410000, 0x1000 }, 46d31e970aSAlistair Francis [IBEX_DEV_CLKMGR] = { 0x40420000, 0x1000 }, 47d31e970aSAlistair Francis [IBEX_DEV_PINMUX] = { 0x40460000, 0x1000 }, 48d31e970aSAlistair Francis [IBEX_DEV_PADCTRL] = { 0x40470000, 0x1000 }, 49d31e970aSAlistair Francis [IBEX_DEV_FLASH_CTRL] = { 0x41000000, 0x1000 }, 50d31e970aSAlistair Francis [IBEX_DEV_AES] = { 0x41100000, 0x1000 }, 51d31e970aSAlistair Francis [IBEX_DEV_HMAC] = { 0x41110000, 0x1000 }, 52d31e970aSAlistair Francis [IBEX_DEV_KMAC] = { 0x41120000, 0x1000 }, 53ef631006SAlistair Francis [IBEX_DEV_OTBN] = { 0x41130000, 0x10000 }, 54ef631006SAlistair Francis [IBEX_DEV_KEYMGR] = { 0x41140000, 0x1000 }, 55d31e970aSAlistair Francis [IBEX_DEV_CSRNG] = { 0x41150000, 0x1000 }, 56d31e970aSAlistair Francis [IBEX_DEV_ENTROPY] = { 0x41160000, 0x1000 }, 57d31e970aSAlistair Francis [IBEX_DEV_EDNO] = { 0x41170000, 0x1000 }, 58d31e970aSAlistair Francis [IBEX_DEV_EDN1] = { 0x41180000, 0x1000 }, 59d31e970aSAlistair Francis [IBEX_DEV_ALERT_HANDLER] = { 0x411b0000, 0x1000 }, 60d31e970aSAlistair Francis [IBEX_DEV_NMI_GEN] = { 0x411c0000, 0x1000 }, 615ee25764SAlistair Francis [IBEX_DEV_PERI] = { 0x411f0000, 0x10000 }, 62ef631006SAlistair Francis [IBEX_DEV_PLIC] = { 0x48000000, 0x4005000 }, 63bb7e0cdeSAlistair Francis [IBEX_DEV_FLASH_VIRTUAL] = { 0x80000000, 0x80000 }, 64fe0fe473SAlistair Francis }; 65fe0fe473SAlistair Francis 6689494462SBin Meng static void opentitan_board_init(MachineState *machine) 67fe0fe473SAlistair Francis { 68*91b1fbdcSBin Meng MachineClass *mc = MACHINE_GET_CLASS(machine); 6973261285SBin Meng const MemMapEntry *memmap = ibex_memmap; 70fe0fe473SAlistair Francis OpenTitanState *s = g_new0(OpenTitanState, 1); 71fe0fe473SAlistair Francis MemoryRegion *sys_mem = get_system_memory(); 72*91b1fbdcSBin Meng 73*91b1fbdcSBin Meng if (machine->ram_size != mc->default_ram_size) { 74*91b1fbdcSBin Meng char *sz = size_to_str(mc->default_ram_size); 75*91b1fbdcSBin Meng error_report("Invalid RAM size, should be %s", sz); 76*91b1fbdcSBin Meng g_free(sz); 77*91b1fbdcSBin Meng exit(EXIT_FAILURE); 78*91b1fbdcSBin Meng } 79fe0fe473SAlistair Francis 80fe0fe473SAlistair Francis /* Initialize SoC */ 81fe0fe473SAlistair Francis object_initialize_child(OBJECT(machine), "soc", &s->soc, 829fc7fc4dSMarkus Armbruster TYPE_RISCV_IBEX_SOC); 83ce189ab2SMarkus Armbruster qdev_realize(DEVICE(&s->soc), NULL, &error_abort); 84fe0fe473SAlistair Francis 85fe0fe473SAlistair Francis memory_region_add_subregion(sys_mem, 86*91b1fbdcSBin Meng memmap[IBEX_DEV_RAM].base, machine->ram); 87fe0fe473SAlistair Francis 88fe0fe473SAlistair Francis if (machine->firmware) { 8930c717cbSEduardo Habkost riscv_load_firmware(machine->firmware, memmap[IBEX_DEV_RAM].base, NULL); 90fe0fe473SAlistair Francis } 91fe0fe473SAlistair Francis 92fe0fe473SAlistair Francis if (machine->kernel_filename) { 9338bc4e34SAlistair Francis riscv_load_kernel(machine->kernel_filename, 9438bc4e34SAlistair Francis memmap[IBEX_DEV_RAM].base, NULL); 95fe0fe473SAlistair Francis } 96fe0fe473SAlistair Francis } 97fe0fe473SAlistair Francis 9889494462SBin Meng static void opentitan_machine_init(MachineClass *mc) 99fe0fe473SAlistair Francis { 100fe0fe473SAlistair Francis mc->desc = "RISC-V Board compatible with OpenTitan"; 10189494462SBin Meng mc->init = opentitan_board_init; 102fe0fe473SAlistair Francis mc->max_cpus = 1; 103fe0fe473SAlistair Francis mc->default_cpu_type = TYPE_RISCV_CPU_IBEX; 104*91b1fbdcSBin Meng mc->default_ram_id = "riscv.lowrisc.ibex.ram"; 105*91b1fbdcSBin Meng mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size; 106fe0fe473SAlistair Francis } 107fe0fe473SAlistair Francis 10889494462SBin Meng DEFINE_MACHINE("opentitan", opentitan_machine_init) 109fe0fe473SAlistair Francis 11089494462SBin Meng static void lowrisc_ibex_soc_init(Object *obj) 111fe0fe473SAlistair Francis { 112fe0fe473SAlistair Francis LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj); 113fe0fe473SAlistair Francis 114db873cc5SMarkus Armbruster object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); 115b9fc5135SAlistair Francis 116ef631006SAlistair Francis object_initialize_child(obj, "plic", &s->plic, TYPE_SIFIVE_PLIC); 117cc411260SAlistair Francis 118cc411260SAlistair Francis object_initialize_child(obj, "uart", &s->uart, TYPE_IBEX_UART); 1193ef64344SAlistair Francis 1203ef64344SAlistair Francis object_initialize_child(obj, "timer", &s->timer, TYPE_IBEX_TIMER); 121fe0fe473SAlistair Francis } 122fe0fe473SAlistair Francis 12389494462SBin Meng static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) 124fe0fe473SAlistair Francis { 12573261285SBin Meng const MemMapEntry *memmap = ibex_memmap; 126fe0fe473SAlistair Francis MachineState *ms = MACHINE(qdev_get_machine()); 127fe0fe473SAlistair Francis LowRISCIbexSoCState *s = RISCV_IBEX_SOC(dev_soc); 128fe0fe473SAlistair Francis MemoryRegion *sys_mem = get_system_memory(); 129e5cc6aaeSAlistair Francis int i; 130fe0fe473SAlistair Francis 1315325cc34SMarkus Armbruster object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, 132fe0fe473SAlistair Francis &error_abort); 1335325cc34SMarkus Armbruster object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, 134fe0fe473SAlistair Francis &error_abort); 135d11e316dSAlexander Wagner object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x8080, &error_abort); 136db873cc5SMarkus Armbruster sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort); 137fe0fe473SAlistair Francis 138fe0fe473SAlistair Francis /* Boot ROM */ 139fe0fe473SAlistair Francis memory_region_init_rom(&s->rom, OBJECT(dev_soc), "riscv.lowrisc.ibex.rom", 14030c717cbSEduardo Habkost memmap[IBEX_DEV_ROM].size, &error_fatal); 141fe0fe473SAlistair Francis memory_region_add_subregion(sys_mem, 14230c717cbSEduardo Habkost memmap[IBEX_DEV_ROM].base, &s->rom); 143fe0fe473SAlistair Francis 144fe0fe473SAlistair Francis /* Flash memory */ 145fe0fe473SAlistair Francis memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.ibex.flash", 14630c717cbSEduardo Habkost memmap[IBEX_DEV_FLASH].size, &error_fatal); 147bb7e0cdeSAlistair Francis memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), 148bb7e0cdeSAlistair Francis "riscv.lowrisc.ibex.flash_virtual", &s->flash_mem, 0, 149bb7e0cdeSAlistair Francis memmap[IBEX_DEV_FLASH_VIRTUAL].size); 15030c717cbSEduardo Habkost memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, 151fe0fe473SAlistair Francis &s->flash_mem); 152bb7e0cdeSAlistair Francis memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH_VIRTUAL].base, 153bb7e0cdeSAlistair Francis &s->flash_alias); 154fe0fe473SAlistair Francis 155b9fc5135SAlistair Francis /* PLIC */ 156ef631006SAlistair Francis qdev_prop_set_string(DEVICE(&s->plic), "hart-config", "M"); 157ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "hartid-base", 0); 158ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "num-sources", 180); 159ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "num-priorities", 3); 160ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00); 161ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000); 162ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000); 163ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 0x18); 164ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "context-base", 0x200004); 165ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "context-stride", 4); 166ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "aperture-size", memmap[IBEX_DEV_PLIC].size); 167ef631006SAlistair Francis 168668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { 169b9fc5135SAlistair Francis return; 170b9fc5135SAlistair Francis } 17130c717cbSEduardo Habkost sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_DEV_PLIC].base); 172b9fc5135SAlistair Francis 173e5cc6aaeSAlistair Francis for (i = 0; i < ms->smp.cpus; i++) { 174e5cc6aaeSAlistair Francis CPUState *cpu = qemu_get_cpu(i); 175e5cc6aaeSAlistair Francis 176ef631006SAlistair Francis qdev_connect_gpio_out(DEVICE(&s->plic), ms->smp.cpus + i, 177e5cc6aaeSAlistair Francis qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); 178e5cc6aaeSAlistair Francis } 179e5cc6aaeSAlistair Francis 180cc411260SAlistair Francis /* UART */ 181cc411260SAlistair Francis qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0)); 182668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { 183cc411260SAlistair Francis return; 184cc411260SAlistair Francis } 18530c717cbSEduardo Habkost sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_DEV_UART].base); 186cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 187cc411260SAlistair Francis 0, qdev_get_gpio_in(DEVICE(&s->plic), 188d4cad544SAlistair Francis IBEX_UART0_TX_WATERMARK_IRQ)); 189cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 190cc411260SAlistair Francis 1, qdev_get_gpio_in(DEVICE(&s->plic), 191d4cad544SAlistair Francis IBEX_UART0_RX_WATERMARK_IRQ)); 192cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 193cc411260SAlistair Francis 2, qdev_get_gpio_in(DEVICE(&s->plic), 194d4cad544SAlistair Francis IBEX_UART0_TX_EMPTY_IRQ)); 195cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 196cc411260SAlistair Francis 3, qdev_get_gpio_in(DEVICE(&s->plic), 197d4cad544SAlistair Francis IBEX_UART0_RX_OVERFLOW_IRQ)); 198cc411260SAlistair Francis 1993ef64344SAlistair Francis if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) { 2003ef64344SAlistair Francis return; 2013ef64344SAlistair Francis } 2023ef64344SAlistair Francis sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, memmap[IBEX_DEV_TIMER].base); 2033ef64344SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer), 2043ef64344SAlistair Francis 0, qdev_get_gpio_in(DEVICE(&s->plic), 2053ef64344SAlistair Francis IBEX_TIMER_TIMEREXPIRED0_0)); 20657a3a622SAlistair Francis qdev_connect_gpio_out(DEVICE(&s->timer), 0, 20757a3a622SAlistair Francis qdev_get_gpio_in(DEVICE(qemu_get_cpu(0)), 20857a3a622SAlistair Francis IRQ_M_TIMER)); 2093ef64344SAlistair Francis 210fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.gpio", 21130c717cbSEduardo Habkost memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size); 212fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.spi", 21330c717cbSEduardo Habkost memmap[IBEX_DEV_SPI].base, memmap[IBEX_DEV_SPI].size); 214d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.i2c", 215d31e970aSAlistair Francis memmap[IBEX_DEV_I2C].base, memmap[IBEX_DEV_I2C].size); 216d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pattgen", 217d31e970aSAlistair Francis memmap[IBEX_DEV_PATTGEN].base, memmap[IBEX_DEV_PATTGEN].size); 218d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.sensor_ctrl", 219d31e970aSAlistair Francis memmap[IBEX_DEV_SENSOR_CTRL].base, memmap[IBEX_DEV_SENSOR_CTRL].size); 220d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.otp_ctrl", 221d31e970aSAlistair Francis memmap[IBEX_DEV_OTP_CTRL].base, memmap[IBEX_DEV_OTP_CTRL].size); 222fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pwrmgr", 22330c717cbSEduardo Habkost memmap[IBEX_DEV_PWRMGR].base, memmap[IBEX_DEV_PWRMGR].size); 224fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.rstmgr", 22530c717cbSEduardo Habkost memmap[IBEX_DEV_RSTMGR].base, memmap[IBEX_DEV_RSTMGR].size); 226fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.clkmgr", 22730c717cbSEduardo Habkost memmap[IBEX_DEV_CLKMGR].base, memmap[IBEX_DEV_CLKMGR].size); 228d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pinmux", 229d31e970aSAlistair Francis memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size); 230d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.padctrl", 231d31e970aSAlistair Francis memmap[IBEX_DEV_PADCTRL].base, memmap[IBEX_DEV_PADCTRL].size); 232d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.usbdev", 233d31e970aSAlistair Francis memmap[IBEX_DEV_USBDEV].base, memmap[IBEX_DEV_USBDEV].size); 234d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.flash_ctrl", 235d31e970aSAlistair Francis memmap[IBEX_DEV_FLASH_CTRL].base, memmap[IBEX_DEV_FLASH_CTRL].size); 236fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.aes", 23730c717cbSEduardo Habkost memmap[IBEX_DEV_AES].base, memmap[IBEX_DEV_AES].size); 238fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.hmac", 23930c717cbSEduardo Habkost memmap[IBEX_DEV_HMAC].base, memmap[IBEX_DEV_HMAC].size); 240d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.kmac", 241d31e970aSAlistair Francis memmap[IBEX_DEV_KMAC].base, memmap[IBEX_DEV_KMAC].size); 242d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.keymgr", 243d31e970aSAlistair Francis memmap[IBEX_DEV_KEYMGR].base, memmap[IBEX_DEV_KEYMGR].size); 244d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.csrng", 245d31e970aSAlistair Francis memmap[IBEX_DEV_CSRNG].base, memmap[IBEX_DEV_CSRNG].size); 246d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.entropy", 247d31e970aSAlistair Francis memmap[IBEX_DEV_ENTROPY].base, memmap[IBEX_DEV_ENTROPY].size); 248d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.edn0", 249d31e970aSAlistair Francis memmap[IBEX_DEV_EDNO].base, memmap[IBEX_DEV_EDNO].size); 250d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.edn1", 251d31e970aSAlistair Francis memmap[IBEX_DEV_EDN1].base, memmap[IBEX_DEV_EDN1].size); 252fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.alert_handler", 25330c717cbSEduardo Habkost memmap[IBEX_DEV_ALERT_HANDLER].base, memmap[IBEX_DEV_ALERT_HANDLER].size); 254fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen", 25530c717cbSEduardo Habkost memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size); 256d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.otbn", 257d31e970aSAlistair Francis memmap[IBEX_DEV_OTBN].base, memmap[IBEX_DEV_OTBN].size); 2585ee25764SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.peri", 2595ee25764SAlistair Francis memmap[IBEX_DEV_PERI].base, memmap[IBEX_DEV_PERI].size); 260fe0fe473SAlistair Francis } 261fe0fe473SAlistair Francis 26289494462SBin Meng static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) 263fe0fe473SAlistair Francis { 264fe0fe473SAlistair Francis DeviceClass *dc = DEVICE_CLASS(oc); 265fe0fe473SAlistair Francis 26689494462SBin Meng dc->realize = lowrisc_ibex_soc_realize; 267fe0fe473SAlistair Francis /* Reason: Uses serial_hds in realize function, thus can't be used twice */ 268fe0fe473SAlistair Francis dc->user_creatable = false; 269fe0fe473SAlistair Francis } 270fe0fe473SAlistair Francis 27189494462SBin Meng static const TypeInfo lowrisc_ibex_soc_type_info = { 272fe0fe473SAlistair Francis .name = TYPE_RISCV_IBEX_SOC, 273fe0fe473SAlistair Francis .parent = TYPE_DEVICE, 274fe0fe473SAlistair Francis .instance_size = sizeof(LowRISCIbexSoCState), 27589494462SBin Meng .instance_init = lowrisc_ibex_soc_init, 27689494462SBin Meng .class_init = lowrisc_ibex_soc_class_init, 277fe0fe473SAlistair Francis }; 278fe0fe473SAlistair Francis 27989494462SBin Meng static void lowrisc_ibex_soc_register_types(void) 280fe0fe473SAlistair Francis { 28189494462SBin Meng type_register_static(&lowrisc_ibex_soc_type_info); 282fe0fe473SAlistair Francis } 283fe0fe473SAlistair Francis 28489494462SBin Meng type_init(lowrisc_ibex_soc_register_types) 285