1fe0fe473SAlistair Francis /* 2fe0fe473SAlistair Francis * QEMU RISC-V Board Compatible with OpenTitan FPGA platform 3fe0fe473SAlistair Francis * 4fe0fe473SAlistair Francis * Copyright (c) 2020 Western Digital 5fe0fe473SAlistair Francis * 6fe0fe473SAlistair Francis * Provides a board compatible with the OpenTitan FPGA platform: 7fe0fe473SAlistair Francis * 8fe0fe473SAlistair Francis * This program is free software; you can redistribute it and/or modify it 9fe0fe473SAlistair Francis * under the terms and conditions of the GNU General Public License, 10fe0fe473SAlistair Francis * version 2 or later, as published by the Free Software Foundation. 11fe0fe473SAlistair Francis * 12fe0fe473SAlistair Francis * This program is distributed in the hope it will be useful, but WITHOUT 13fe0fe473SAlistair Francis * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14fe0fe473SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15fe0fe473SAlistair Francis * more details. 16fe0fe473SAlistair Francis * 17fe0fe473SAlistair Francis * You should have received a copy of the GNU General Public License along with 18fe0fe473SAlistair Francis * this program. If not, see <http://www.gnu.org/licenses/>. 19fe0fe473SAlistair Francis */ 20fe0fe473SAlistair Francis 21fe0fe473SAlistair Francis #include "qemu/osdep.h" 2291b1fbdcSBin Meng #include "qemu/cutils.h" 23fe0fe473SAlistair Francis #include "hw/riscv/opentitan.h" 24fe0fe473SAlistair Francis #include "qapi/error.h" 25fe0fe473SAlistair Francis #include "hw/boards.h" 26fe0fe473SAlistair Francis #include "hw/misc/unimp.h" 27fe0fe473SAlistair Francis #include "hw/riscv/boot.h" 28888c9af2SAlistair Francis #include "qemu/units.h" 29b9fc5135SAlistair Francis #include "sysemu/sysemu.h" 30fe0fe473SAlistair Francis 3173261285SBin Meng static const MemMapEntry ibex_memmap[] = { 3230c717cbSEduardo Habkost [IBEX_DEV_ROM] = { 0x00008000, 16 * KiB }, 3330c717cbSEduardo Habkost [IBEX_DEV_RAM] = { 0x10000000, 0x10000 }, 3430c717cbSEduardo Habkost [IBEX_DEV_FLASH] = { 0x20000000, 0x80000 }, 35d31e970aSAlistair Francis [IBEX_DEV_UART] = { 0x40000000, 0x1000 }, 36d31e970aSAlistair Francis [IBEX_DEV_GPIO] = { 0x40040000, 0x1000 }, 37aecabd50SWilfred Mallawa [IBEX_DEV_SPI_DEVICE] = { 0x40050000, 0x1000 }, 38d31e970aSAlistair Francis [IBEX_DEV_I2C] = { 0x40080000, 0x1000 }, 39d31e970aSAlistair Francis [IBEX_DEV_PATTGEN] = { 0x400e0000, 0x1000 }, 403ef64344SAlistair Francis [IBEX_DEV_TIMER] = { 0x40100000, 0x1000 }, 41d31e970aSAlistair Francis [IBEX_DEV_SENSOR_CTRL] = { 0x40110000, 0x1000 }, 42d31e970aSAlistair Francis [IBEX_DEV_OTP_CTRL] = { 0x40130000, 0x4000 }, 43ed481d98SAlistair Francis [IBEX_DEV_USBDEV] = { 0x40150000, 0x1000 }, 44aecabd50SWilfred Mallawa [IBEX_DEV_SPI_HOST0] = { 0x40300000, 0x1000 }, 45aecabd50SWilfred Mallawa [IBEX_DEV_SPI_HOST1] = { 0x40310000, 0x1000 }, 46d31e970aSAlistair Francis [IBEX_DEV_PWRMGR] = { 0x40400000, 0x1000 }, 47d31e970aSAlistair Francis [IBEX_DEV_RSTMGR] = { 0x40410000, 0x1000 }, 48d31e970aSAlistair Francis [IBEX_DEV_CLKMGR] = { 0x40420000, 0x1000 }, 49d31e970aSAlistair Francis [IBEX_DEV_PINMUX] = { 0x40460000, 0x1000 }, 50d31e970aSAlistair Francis [IBEX_DEV_PADCTRL] = { 0x40470000, 0x1000 }, 51d31e970aSAlistair Francis [IBEX_DEV_FLASH_CTRL] = { 0x41000000, 0x1000 }, 52d31e970aSAlistair Francis [IBEX_DEV_AES] = { 0x41100000, 0x1000 }, 53d31e970aSAlistair Francis [IBEX_DEV_HMAC] = { 0x41110000, 0x1000 }, 54d31e970aSAlistair Francis [IBEX_DEV_KMAC] = { 0x41120000, 0x1000 }, 55ef631006SAlistair Francis [IBEX_DEV_OTBN] = { 0x41130000, 0x10000 }, 56ef631006SAlistair Francis [IBEX_DEV_KEYMGR] = { 0x41140000, 0x1000 }, 57d31e970aSAlistair Francis [IBEX_DEV_CSRNG] = { 0x41150000, 0x1000 }, 58d31e970aSAlistair Francis [IBEX_DEV_ENTROPY] = { 0x41160000, 0x1000 }, 59d31e970aSAlistair Francis [IBEX_DEV_EDNO] = { 0x41170000, 0x1000 }, 60d31e970aSAlistair Francis [IBEX_DEV_EDN1] = { 0x41180000, 0x1000 }, 61d31e970aSAlistair Francis [IBEX_DEV_ALERT_HANDLER] = { 0x411b0000, 0x1000 }, 62d31e970aSAlistair Francis [IBEX_DEV_NMI_GEN] = { 0x411c0000, 0x1000 }, 635ee25764SAlistair Francis [IBEX_DEV_PERI] = { 0x411f0000, 0x10000 }, 64ef631006SAlistair Francis [IBEX_DEV_PLIC] = { 0x48000000, 0x4005000 }, 65bb7e0cdeSAlistair Francis [IBEX_DEV_FLASH_VIRTUAL] = { 0x80000000, 0x80000 }, 66fe0fe473SAlistair Francis }; 67fe0fe473SAlistair Francis 6889494462SBin Meng static void opentitan_board_init(MachineState *machine) 69fe0fe473SAlistair Francis { 7091b1fbdcSBin Meng MachineClass *mc = MACHINE_GET_CLASS(machine); 7173261285SBin Meng const MemMapEntry *memmap = ibex_memmap; 72fe0fe473SAlistair Francis OpenTitanState *s = g_new0(OpenTitanState, 1); 73fe0fe473SAlistair Francis MemoryRegion *sys_mem = get_system_memory(); 7491b1fbdcSBin Meng 7591b1fbdcSBin Meng if (machine->ram_size != mc->default_ram_size) { 7691b1fbdcSBin Meng char *sz = size_to_str(mc->default_ram_size); 7791b1fbdcSBin Meng error_report("Invalid RAM size, should be %s", sz); 7891b1fbdcSBin Meng g_free(sz); 7991b1fbdcSBin Meng exit(EXIT_FAILURE); 8091b1fbdcSBin Meng } 81fe0fe473SAlistair Francis 82fe0fe473SAlistair Francis /* Initialize SoC */ 83fe0fe473SAlistair Francis object_initialize_child(OBJECT(machine), "soc", &s->soc, 849fc7fc4dSMarkus Armbruster TYPE_RISCV_IBEX_SOC); 858f972e5bSAlistair Francis qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); 86fe0fe473SAlistair Francis 87fe0fe473SAlistair Francis memory_region_add_subregion(sys_mem, 8891b1fbdcSBin Meng memmap[IBEX_DEV_RAM].base, machine->ram); 89fe0fe473SAlistair Francis 90fe0fe473SAlistair Francis if (machine->firmware) { 9130c717cbSEduardo Habkost riscv_load_firmware(machine->firmware, memmap[IBEX_DEV_RAM].base, NULL); 92fe0fe473SAlistair Francis } 93fe0fe473SAlistair Francis 94fe0fe473SAlistair Francis if (machine->kernel_filename) { 9538bc4e34SAlistair Francis riscv_load_kernel(machine->kernel_filename, 9638bc4e34SAlistair Francis memmap[IBEX_DEV_RAM].base, NULL); 97fe0fe473SAlistair Francis } 98fe0fe473SAlistair Francis } 99fe0fe473SAlistair Francis 10089494462SBin Meng static void opentitan_machine_init(MachineClass *mc) 101fe0fe473SAlistair Francis { 102fe0fe473SAlistair Francis mc->desc = "RISC-V Board compatible with OpenTitan"; 10389494462SBin Meng mc->init = opentitan_board_init; 104fe0fe473SAlistair Francis mc->max_cpus = 1; 105fe0fe473SAlistair Francis mc->default_cpu_type = TYPE_RISCV_CPU_IBEX; 10691b1fbdcSBin Meng mc->default_ram_id = "riscv.lowrisc.ibex.ram"; 10791b1fbdcSBin Meng mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size; 108fe0fe473SAlistair Francis } 109fe0fe473SAlistair Francis 11089494462SBin Meng DEFINE_MACHINE("opentitan", opentitan_machine_init) 111fe0fe473SAlistair Francis 11289494462SBin Meng static void lowrisc_ibex_soc_init(Object *obj) 113fe0fe473SAlistair Francis { 114fe0fe473SAlistair Francis LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj); 115fe0fe473SAlistair Francis 116db873cc5SMarkus Armbruster object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); 117b9fc5135SAlistair Francis 118ef631006SAlistair Francis object_initialize_child(obj, "plic", &s->plic, TYPE_SIFIVE_PLIC); 119cc411260SAlistair Francis 120cc411260SAlistair Francis object_initialize_child(obj, "uart", &s->uart, TYPE_IBEX_UART); 1213ef64344SAlistair Francis 1223ef64344SAlistair Francis object_initialize_child(obj, "timer", &s->timer, TYPE_IBEX_TIMER); 1239972479fSWilfred Mallawa 1249972479fSWilfred Mallawa for (int i = 0; i < OPENTITAN_NUM_SPI_HOSTS; i++) { 1259972479fSWilfred Mallawa object_initialize_child(obj, "spi_host[*]", &s->spi_host[i], 1269972479fSWilfred Mallawa TYPE_IBEX_SPI_HOST); 1279972479fSWilfred Mallawa } 128fe0fe473SAlistair Francis } 129fe0fe473SAlistair Francis 13089494462SBin Meng static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) 131fe0fe473SAlistair Francis { 13273261285SBin Meng const MemMapEntry *memmap = ibex_memmap; 1339972479fSWilfred Mallawa DeviceState *dev; 1349972479fSWilfred Mallawa SysBusDevice *busdev; 135fe0fe473SAlistair Francis MachineState *ms = MACHINE(qdev_get_machine()); 136fe0fe473SAlistair Francis LowRISCIbexSoCState *s = RISCV_IBEX_SOC(dev_soc); 137fe0fe473SAlistair Francis MemoryRegion *sys_mem = get_system_memory(); 138e5cc6aaeSAlistair Francis int i; 139fe0fe473SAlistair Francis 1405325cc34SMarkus Armbruster object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, 141fe0fe473SAlistair Francis &error_abort); 1425325cc34SMarkus Armbruster object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, 143fe0fe473SAlistair Francis &error_abort); 144d11e316dSAlexander Wagner object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x8080, &error_abort); 145*91a3387dSTsukasa OI sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal); 146fe0fe473SAlistair Francis 147fe0fe473SAlistair Francis /* Boot ROM */ 148fe0fe473SAlistair Francis memory_region_init_rom(&s->rom, OBJECT(dev_soc), "riscv.lowrisc.ibex.rom", 14930c717cbSEduardo Habkost memmap[IBEX_DEV_ROM].size, &error_fatal); 150fe0fe473SAlistair Francis memory_region_add_subregion(sys_mem, 15130c717cbSEduardo Habkost memmap[IBEX_DEV_ROM].base, &s->rom); 152fe0fe473SAlistair Francis 153fe0fe473SAlistair Francis /* Flash memory */ 154fe0fe473SAlistair Francis memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.ibex.flash", 15530c717cbSEduardo Habkost memmap[IBEX_DEV_FLASH].size, &error_fatal); 156bb7e0cdeSAlistair Francis memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), 157bb7e0cdeSAlistair Francis "riscv.lowrisc.ibex.flash_virtual", &s->flash_mem, 0, 158bb7e0cdeSAlistair Francis memmap[IBEX_DEV_FLASH_VIRTUAL].size); 15930c717cbSEduardo Habkost memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, 160fe0fe473SAlistair Francis &s->flash_mem); 161bb7e0cdeSAlistair Francis memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH_VIRTUAL].base, 162bb7e0cdeSAlistair Francis &s->flash_alias); 163fe0fe473SAlistair Francis 164b9fc5135SAlistair Francis /* PLIC */ 165ef631006SAlistair Francis qdev_prop_set_string(DEVICE(&s->plic), "hart-config", "M"); 166ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "hartid-base", 0); 167ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "num-sources", 180); 168ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "num-priorities", 3); 169ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00); 170ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000); 171ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000); 1720df470c3SWilfred Mallawa qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 32); 1739b144ed4SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "context-base", 0x200000); 1749b144ed4SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "context-stride", 8); 175ef631006SAlistair Francis qdev_prop_set_uint32(DEVICE(&s->plic), "aperture-size", memmap[IBEX_DEV_PLIC].size); 176ef631006SAlistair Francis 177668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { 178b9fc5135SAlistair Francis return; 179b9fc5135SAlistair Francis } 18030c717cbSEduardo Habkost sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_DEV_PLIC].base); 181b9fc5135SAlistair Francis 182e5cc6aaeSAlistair Francis for (i = 0; i < ms->smp.cpus; i++) { 183e5cc6aaeSAlistair Francis CPUState *cpu = qemu_get_cpu(i); 184e5cc6aaeSAlistair Francis 185ef631006SAlistair Francis qdev_connect_gpio_out(DEVICE(&s->plic), ms->smp.cpus + i, 186e5cc6aaeSAlistair Francis qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); 187e5cc6aaeSAlistair Francis } 188e5cc6aaeSAlistair Francis 189cc411260SAlistair Francis /* UART */ 190cc411260SAlistair Francis qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0)); 191668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { 192cc411260SAlistair Francis return; 193cc411260SAlistair Francis } 19430c717cbSEduardo Habkost sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_DEV_UART].base); 195cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 196cc411260SAlistair Francis 0, qdev_get_gpio_in(DEVICE(&s->plic), 197d4cad544SAlistair Francis IBEX_UART0_TX_WATERMARK_IRQ)); 198cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 199cc411260SAlistair Francis 1, qdev_get_gpio_in(DEVICE(&s->plic), 200d4cad544SAlistair Francis IBEX_UART0_RX_WATERMARK_IRQ)); 201cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 202cc411260SAlistair Francis 2, qdev_get_gpio_in(DEVICE(&s->plic), 203d4cad544SAlistair Francis IBEX_UART0_TX_EMPTY_IRQ)); 204cc411260SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 205cc411260SAlistair Francis 3, qdev_get_gpio_in(DEVICE(&s->plic), 206d4cad544SAlistair Francis IBEX_UART0_RX_OVERFLOW_IRQ)); 207cc411260SAlistair Francis 2083ef64344SAlistair Francis if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) { 2093ef64344SAlistair Francis return; 2103ef64344SAlistair Francis } 2113ef64344SAlistair Francis sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, memmap[IBEX_DEV_TIMER].base); 2123ef64344SAlistair Francis sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer), 2133ef64344SAlistair Francis 0, qdev_get_gpio_in(DEVICE(&s->plic), 2143ef64344SAlistair Francis IBEX_TIMER_TIMEREXPIRED0_0)); 21557a3a622SAlistair Francis qdev_connect_gpio_out(DEVICE(&s->timer), 0, 21657a3a622SAlistair Francis qdev_get_gpio_in(DEVICE(qemu_get_cpu(0)), 21757a3a622SAlistair Francis IRQ_M_TIMER)); 2183ef64344SAlistair Francis 2199972479fSWilfred Mallawa /* SPI-Hosts */ 2209972479fSWilfred Mallawa for (int i = 0; i < OPENTITAN_NUM_SPI_HOSTS; ++i) { 2219972479fSWilfred Mallawa dev = DEVICE(&(s->spi_host[i])); 2229972479fSWilfred Mallawa if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi_host[i]), errp)) { 2239972479fSWilfred Mallawa return; 2249972479fSWilfred Mallawa } 2259972479fSWilfred Mallawa busdev = SYS_BUS_DEVICE(dev); 2269972479fSWilfred Mallawa sysbus_mmio_map(busdev, 0, memmap[IBEX_DEV_SPI_HOST0 + i].base); 2279972479fSWilfred Mallawa 2289972479fSWilfred Mallawa switch (i) { 2299972479fSWilfred Mallawa case OPENTITAN_SPI_HOST0: 2309972479fSWilfred Mallawa sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(&s->plic), 2319972479fSWilfred Mallawa IBEX_SPI_HOST0_ERR_IRQ)); 2329972479fSWilfred Mallawa sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(DEVICE(&s->plic), 2339972479fSWilfred Mallawa IBEX_SPI_HOST0_SPI_EVENT_IRQ)); 2349972479fSWilfred Mallawa break; 2359972479fSWilfred Mallawa case OPENTITAN_SPI_HOST1: 2369972479fSWilfred Mallawa sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(&s->plic), 2379972479fSWilfred Mallawa IBEX_SPI_HOST1_ERR_IRQ)); 2389972479fSWilfred Mallawa sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(DEVICE(&s->plic), 2399972479fSWilfred Mallawa IBEX_SPI_HOST1_SPI_EVENT_IRQ)); 2409972479fSWilfred Mallawa break; 2419972479fSWilfred Mallawa } 2429972479fSWilfred Mallawa } 2439972479fSWilfred Mallawa 244fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.gpio", 24530c717cbSEduardo Habkost memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size); 246aecabd50SWilfred Mallawa create_unimplemented_device("riscv.lowrisc.ibex.spi_device", 247aecabd50SWilfred Mallawa memmap[IBEX_DEV_SPI_DEVICE].base, memmap[IBEX_DEV_SPI_DEVICE].size); 248d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.i2c", 249d31e970aSAlistair Francis memmap[IBEX_DEV_I2C].base, memmap[IBEX_DEV_I2C].size); 250d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pattgen", 251d31e970aSAlistair Francis memmap[IBEX_DEV_PATTGEN].base, memmap[IBEX_DEV_PATTGEN].size); 252d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.sensor_ctrl", 253d31e970aSAlistair Francis memmap[IBEX_DEV_SENSOR_CTRL].base, memmap[IBEX_DEV_SENSOR_CTRL].size); 254d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.otp_ctrl", 255d31e970aSAlistair Francis memmap[IBEX_DEV_OTP_CTRL].base, memmap[IBEX_DEV_OTP_CTRL].size); 256fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pwrmgr", 25730c717cbSEduardo Habkost memmap[IBEX_DEV_PWRMGR].base, memmap[IBEX_DEV_PWRMGR].size); 258fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.rstmgr", 25930c717cbSEduardo Habkost memmap[IBEX_DEV_RSTMGR].base, memmap[IBEX_DEV_RSTMGR].size); 260fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.clkmgr", 26130c717cbSEduardo Habkost memmap[IBEX_DEV_CLKMGR].base, memmap[IBEX_DEV_CLKMGR].size); 262d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.pinmux", 263d31e970aSAlistair Francis memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size); 264d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.padctrl", 265d31e970aSAlistair Francis memmap[IBEX_DEV_PADCTRL].base, memmap[IBEX_DEV_PADCTRL].size); 266d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.usbdev", 267d31e970aSAlistair Francis memmap[IBEX_DEV_USBDEV].base, memmap[IBEX_DEV_USBDEV].size); 268d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.flash_ctrl", 269d31e970aSAlistair Francis memmap[IBEX_DEV_FLASH_CTRL].base, memmap[IBEX_DEV_FLASH_CTRL].size); 270fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.aes", 27130c717cbSEduardo Habkost memmap[IBEX_DEV_AES].base, memmap[IBEX_DEV_AES].size); 272fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.hmac", 27330c717cbSEduardo Habkost memmap[IBEX_DEV_HMAC].base, memmap[IBEX_DEV_HMAC].size); 274d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.kmac", 275d31e970aSAlistair Francis memmap[IBEX_DEV_KMAC].base, memmap[IBEX_DEV_KMAC].size); 276d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.keymgr", 277d31e970aSAlistair Francis memmap[IBEX_DEV_KEYMGR].base, memmap[IBEX_DEV_KEYMGR].size); 278d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.csrng", 279d31e970aSAlistair Francis memmap[IBEX_DEV_CSRNG].base, memmap[IBEX_DEV_CSRNG].size); 280d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.entropy", 281d31e970aSAlistair Francis memmap[IBEX_DEV_ENTROPY].base, memmap[IBEX_DEV_ENTROPY].size); 282d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.edn0", 283d31e970aSAlistair Francis memmap[IBEX_DEV_EDNO].base, memmap[IBEX_DEV_EDNO].size); 284d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.edn1", 285d31e970aSAlistair Francis memmap[IBEX_DEV_EDN1].base, memmap[IBEX_DEV_EDN1].size); 286fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.alert_handler", 28730c717cbSEduardo Habkost memmap[IBEX_DEV_ALERT_HANDLER].base, memmap[IBEX_DEV_ALERT_HANDLER].size); 288fe0fe473SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen", 28930c717cbSEduardo Habkost memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size); 290d31e970aSAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.otbn", 291d31e970aSAlistair Francis memmap[IBEX_DEV_OTBN].base, memmap[IBEX_DEV_OTBN].size); 2925ee25764SAlistair Francis create_unimplemented_device("riscv.lowrisc.ibex.peri", 2935ee25764SAlistair Francis memmap[IBEX_DEV_PERI].base, memmap[IBEX_DEV_PERI].size); 294fe0fe473SAlistair Francis } 295fe0fe473SAlistair Francis 29689494462SBin Meng static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) 297fe0fe473SAlistair Francis { 298fe0fe473SAlistair Francis DeviceClass *dc = DEVICE_CLASS(oc); 299fe0fe473SAlistair Francis 30089494462SBin Meng dc->realize = lowrisc_ibex_soc_realize; 301fe0fe473SAlistair Francis /* Reason: Uses serial_hds in realize function, thus can't be used twice */ 302fe0fe473SAlistair Francis dc->user_creatable = false; 303fe0fe473SAlistair Francis } 304fe0fe473SAlistair Francis 30589494462SBin Meng static const TypeInfo lowrisc_ibex_soc_type_info = { 306fe0fe473SAlistair Francis .name = TYPE_RISCV_IBEX_SOC, 307fe0fe473SAlistair Francis .parent = TYPE_DEVICE, 308fe0fe473SAlistair Francis .instance_size = sizeof(LowRISCIbexSoCState), 30989494462SBin Meng .instance_init = lowrisc_ibex_soc_init, 31089494462SBin Meng .class_init = lowrisc_ibex_soc_class_init, 311fe0fe473SAlistair Francis }; 312fe0fe473SAlistair Francis 31389494462SBin Meng static void lowrisc_ibex_soc_register_types(void) 314fe0fe473SAlistair Francis { 31589494462SBin Meng type_register_static(&lowrisc_ibex_soc_type_info); 316fe0fe473SAlistair Francis } 317fe0fe473SAlistair Francis 31889494462SBin Meng type_init(lowrisc_ibex_soc_register_types) 319