xref: /qemu/hw/riscv/meson.build (revision 9ee727802012ddb32e193d84052a44e382088277)
12c44220dSMarc-André Lureauriscv_ss = ss.source_set()
2727bb5b4SPaolo Bonziniriscv_ss.add(files('boot.c'))
36e4dd94fSPhilippe Mathieu-Daudériscv_ss.add(when: 'CONFIG_RISCV_NUMA', if_true: files('numa.c'))
430a4af16SBin Mengriscv_ss.add(files('riscv_hart.c'))
52c44220dSMarc-André Lureauriscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c'))
62c44220dSMarc-André Lureauriscv_ss.add(when: 'CONFIG_RISCV_VIRT', if_true: files('virt.c'))
77a261bafSVijai Kumar Kriscv_ss.add(when: 'CONFIG_SHAKTI_C', if_true: files('shakti_c.c'))
82c44220dSMarc-André Lureauriscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e.c'))
92c44220dSMarc-André Lureauriscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c'))
102c44220dSMarc-André Lureauriscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c'))
1156f6e31eSBin Mengriscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true: files('microchip_pfsoc.c'))
127da2fb24SSunil V Lriscv_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
13*4faea7e0STomasz Jeznachriscv_ss.add(when: 'CONFIG_RISCV_IOMMU', if_true: files(
14*4faea7e0STomasz Jeznach	'riscv-iommu.c', 'riscv-iommu-pci.c', 'riscv-iommu-sys.c', 'riscv-iommu-hpm.c'))
1577aad42eSSai Pavan Bodduriscv_ss.add(when: 'CONFIG_MICROBLAZE_V', if_true: files('microblaze-v-generic.c'))
162c44220dSMarc-André Lureau
172c44220dSMarc-André Lureauhw_arch += {'riscv': riscv_ss}
18