1 /* 2 * QEMU sPAPR IOMMU (TCE) code 3 * 4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #include "qemu/osdep.h" 20 #include "qemu/error-report.h" 21 #include "hw/hw.h" 22 #include "qemu/log.h" 23 #include "sysemu/kvm.h" 24 #include "hw/qdev.h" 25 #include "kvm_ppc.h" 26 #include "sysemu/dma.h" 27 #include "exec/address-spaces.h" 28 #include "trace.h" 29 30 #include "hw/ppc/spapr.h" 31 #include "hw/ppc/spapr_vio.h" 32 33 #include <libfdt.h> 34 35 enum sPAPRTCEAccess { 36 SPAPR_TCE_FAULT = 0, 37 SPAPR_TCE_RO = 1, 38 SPAPR_TCE_WO = 2, 39 SPAPR_TCE_RW = 3, 40 }; 41 42 #define IOMMU_PAGE_SIZE(shift) (1ULL << (shift)) 43 #define IOMMU_PAGE_MASK(shift) (~(IOMMU_PAGE_SIZE(shift) - 1)) 44 45 static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables; 46 47 sPAPRTCETable *spapr_tce_find_by_liobn(target_ulong liobn) 48 { 49 sPAPRTCETable *tcet; 50 51 if (liobn & 0xFFFFFFFF00000000ULL) { 52 hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx "\n", 53 liobn); 54 return NULL; 55 } 56 57 QLIST_FOREACH(tcet, &spapr_tce_tables, list) { 58 if (tcet->liobn == (uint32_t)liobn) { 59 return tcet; 60 } 61 } 62 63 return NULL; 64 } 65 66 static IOMMUAccessFlags spapr_tce_iommu_access_flags(uint64_t tce) 67 { 68 switch (tce & SPAPR_TCE_RW) { 69 case SPAPR_TCE_FAULT: 70 return IOMMU_NONE; 71 case SPAPR_TCE_RO: 72 return IOMMU_RO; 73 case SPAPR_TCE_WO: 74 return IOMMU_WO; 75 default: /* SPAPR_TCE_RW */ 76 return IOMMU_RW; 77 } 78 } 79 80 static uint64_t *spapr_tce_alloc_table(uint32_t liobn, 81 uint32_t page_shift, 82 uint32_t nb_table, 83 int *fd, 84 bool need_vfio) 85 { 86 uint64_t *table = NULL; 87 uint64_t window_size = (uint64_t)nb_table << page_shift; 88 89 if (kvm_enabled() && !(window_size >> 32)) { 90 table = kvmppc_create_spapr_tce(liobn, window_size, fd, need_vfio); 91 } 92 93 if (!table) { 94 *fd = -1; 95 table = g_malloc0(nb_table * sizeof(uint64_t)); 96 } 97 98 trace_spapr_iommu_new_table(liobn, table, *fd); 99 100 return table; 101 } 102 103 static void spapr_tce_free_table(uint64_t *table, int fd, uint32_t nb_table) 104 { 105 if (!kvm_enabled() || 106 (kvmppc_remove_spapr_tce(table, fd, nb_table) != 0)) { 107 g_free(table); 108 } 109 } 110 111 /* Called from RCU critical section */ 112 static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr, 113 bool is_write) 114 { 115 sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu); 116 uint64_t tce; 117 IOMMUTLBEntry ret = { 118 .target_as = &address_space_memory, 119 .iova = 0, 120 .translated_addr = 0, 121 .addr_mask = ~(hwaddr)0, 122 .perm = IOMMU_NONE, 123 }; 124 125 if ((addr >> tcet->page_shift) < tcet->nb_table) { 126 /* Check if we are in bound */ 127 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); 128 129 tce = tcet->table[addr >> tcet->page_shift]; 130 ret.iova = addr & page_mask; 131 ret.translated_addr = tce & page_mask; 132 ret.addr_mask = ~page_mask; 133 ret.perm = spapr_tce_iommu_access_flags(tce); 134 } 135 trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm, 136 ret.addr_mask); 137 138 return ret; 139 } 140 141 static int spapr_tce_table_post_load(void *opaque, int version_id) 142 { 143 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(opaque); 144 145 if (tcet->vdev) { 146 spapr_vio_set_bypass(tcet->vdev, tcet->bypass); 147 } 148 149 return 0; 150 } 151 152 static const VMStateDescription vmstate_spapr_tce_table = { 153 .name = "spapr_iommu", 154 .version_id = 2, 155 .minimum_version_id = 2, 156 .post_load = spapr_tce_table_post_load, 157 .fields = (VMStateField []) { 158 /* Sanity check */ 159 VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable), 160 VMSTATE_UINT32_EQUAL(nb_table, sPAPRTCETable), 161 162 /* IOMMU state */ 163 VMSTATE_BOOL(bypass, sPAPRTCETable), 164 VMSTATE_VARRAY_UINT32(table, sPAPRTCETable, nb_table, 0, vmstate_info_uint64, uint64_t), 165 166 VMSTATE_END_OF_LIST() 167 }, 168 }; 169 170 static MemoryRegionIOMMUOps spapr_iommu_ops = { 171 .translate = spapr_tce_translate_iommu, 172 }; 173 174 static int spapr_tce_table_realize(DeviceState *dev) 175 { 176 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); 177 178 tcet->fd = -1; 179 tcet->need_vfio = false; 180 memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops, 181 "iommu-spapr", 0); 182 183 QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list); 184 185 vmstate_register(DEVICE(tcet), tcet->liobn, &vmstate_spapr_tce_table, 186 tcet); 187 188 return 0; 189 } 190 191 void spapr_tce_set_need_vfio(sPAPRTCETable *tcet, bool need_vfio) 192 { 193 size_t table_size = tcet->nb_table * sizeof(uint64_t); 194 void *newtable; 195 196 if (need_vfio == tcet->need_vfio) { 197 /* Nothing to do */ 198 return; 199 } 200 201 if (!need_vfio) { 202 /* FIXME: We don't support transition back to KVM accelerated 203 * TCEs yet */ 204 return; 205 } 206 207 tcet->need_vfio = true; 208 209 if (tcet->fd < 0) { 210 /* Table is already in userspace, nothing to be do */ 211 return; 212 } 213 214 newtable = g_malloc(table_size); 215 memcpy(newtable, tcet->table, table_size); 216 217 kvmppc_remove_spapr_tce(tcet->table, tcet->fd, tcet->nb_table); 218 219 tcet->fd = -1; 220 tcet->table = newtable; 221 } 222 223 sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn) 224 { 225 sPAPRTCETable *tcet; 226 char tmp[32]; 227 228 if (spapr_tce_find_by_liobn(liobn)) { 229 fprintf(stderr, "Attempted to create TCE table with duplicate" 230 " LIOBN 0x%x\n", liobn); 231 return NULL; 232 } 233 234 tcet = SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE)); 235 tcet->liobn = liobn; 236 237 snprintf(tmp, sizeof(tmp), "tce-table-%x", liobn); 238 object_property_add_child(OBJECT(owner), tmp, OBJECT(tcet), NULL); 239 240 object_property_set_bool(OBJECT(tcet), true, "realized", NULL); 241 242 return tcet; 243 } 244 245 void spapr_tce_table_enable(sPAPRTCETable *tcet, 246 uint32_t page_shift, uint64_t bus_offset, 247 uint32_t nb_table) 248 { 249 if (tcet->nb_table) { 250 error_report("Warning: trying to enable already enabled TCE table"); 251 return; 252 } 253 254 tcet->bus_offset = bus_offset; 255 tcet->page_shift = page_shift; 256 tcet->nb_table = nb_table; 257 tcet->table = spapr_tce_alloc_table(tcet->liobn, 258 tcet->page_shift, 259 tcet->nb_table, 260 &tcet->fd, 261 tcet->need_vfio); 262 263 memory_region_set_size(&tcet->iommu, 264 (uint64_t)tcet->nb_table << tcet->page_shift); 265 } 266 267 static void spapr_tce_table_disable(sPAPRTCETable *tcet) 268 { 269 if (!tcet->nb_table) { 270 return; 271 } 272 273 memory_region_set_size(&tcet->iommu, 0); 274 275 spapr_tce_free_table(tcet->table, tcet->fd, tcet->nb_table); 276 tcet->fd = -1; 277 tcet->table = NULL; 278 tcet->bus_offset = 0; 279 tcet->page_shift = 0; 280 tcet->nb_table = 0; 281 } 282 283 static void spapr_tce_table_unrealize(DeviceState *dev, Error **errp) 284 { 285 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); 286 287 QLIST_REMOVE(tcet, list); 288 289 spapr_tce_table_disable(tcet); 290 } 291 292 MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet) 293 { 294 return &tcet->iommu; 295 } 296 297 static void spapr_tce_reset(DeviceState *dev) 298 { 299 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); 300 size_t table_size = tcet->nb_table * sizeof(uint64_t); 301 302 memset(tcet->table, 0, table_size); 303 } 304 305 static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba, 306 target_ulong tce) 307 { 308 IOMMUTLBEntry entry; 309 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); 310 unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift; 311 312 if (index >= tcet->nb_table) { 313 hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x" 314 TARGET_FMT_lx "\n", ioba); 315 return H_PARAMETER; 316 } 317 318 tcet->table[index] = tce; 319 320 entry.target_as = &address_space_memory, 321 entry.iova = (ioba - tcet->bus_offset) & page_mask; 322 entry.translated_addr = tce & page_mask; 323 entry.addr_mask = ~page_mask; 324 entry.perm = spapr_tce_iommu_access_flags(tce); 325 memory_region_notify_iommu(&tcet->iommu, entry); 326 327 return H_SUCCESS; 328 } 329 330 static target_ulong h_put_tce_indirect(PowerPCCPU *cpu, 331 sPAPRMachineState *spapr, 332 target_ulong opcode, target_ulong *args) 333 { 334 int i; 335 target_ulong liobn = args[0]; 336 target_ulong ioba = args[1]; 337 target_ulong ioba1 = ioba; 338 target_ulong tce_list = args[2]; 339 target_ulong npages = args[3]; 340 target_ulong ret = H_PARAMETER, tce = 0; 341 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); 342 CPUState *cs = CPU(cpu); 343 hwaddr page_mask, page_size; 344 345 if (!tcet) { 346 return H_PARAMETER; 347 } 348 349 if ((npages > 512) || (tce_list & SPAPR_TCE_PAGE_MASK)) { 350 return H_PARAMETER; 351 } 352 353 page_mask = IOMMU_PAGE_MASK(tcet->page_shift); 354 page_size = IOMMU_PAGE_SIZE(tcet->page_shift); 355 ioba &= page_mask; 356 357 for (i = 0; i < npages; ++i, ioba += page_size) { 358 tce = ldq_be_phys(cs->as, tce_list + i * sizeof(target_ulong)); 359 360 ret = put_tce_emu(tcet, ioba, tce); 361 if (ret) { 362 break; 363 } 364 } 365 366 /* Trace last successful or the first problematic entry */ 367 i = i ? (i - 1) : 0; 368 if (SPAPR_IS_PCI_LIOBN(liobn)) { 369 trace_spapr_iommu_pci_indirect(liobn, ioba1, tce_list, i, tce, ret); 370 } else { 371 trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i, tce, ret); 372 } 373 return ret; 374 } 375 376 static target_ulong h_stuff_tce(PowerPCCPU *cpu, sPAPRMachineState *spapr, 377 target_ulong opcode, target_ulong *args) 378 { 379 int i; 380 target_ulong liobn = args[0]; 381 target_ulong ioba = args[1]; 382 target_ulong tce_value = args[2]; 383 target_ulong npages = args[3]; 384 target_ulong ret = H_PARAMETER; 385 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); 386 hwaddr page_mask, page_size; 387 388 if (!tcet) { 389 return H_PARAMETER; 390 } 391 392 if (npages > tcet->nb_table) { 393 return H_PARAMETER; 394 } 395 396 page_mask = IOMMU_PAGE_MASK(tcet->page_shift); 397 page_size = IOMMU_PAGE_SIZE(tcet->page_shift); 398 ioba &= page_mask; 399 400 for (i = 0; i < npages; ++i, ioba += page_size) { 401 ret = put_tce_emu(tcet, ioba, tce_value); 402 if (ret) { 403 break; 404 } 405 } 406 if (SPAPR_IS_PCI_LIOBN(liobn)) { 407 trace_spapr_iommu_pci_stuff(liobn, ioba, tce_value, npages, ret); 408 } else { 409 trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret); 410 } 411 412 return ret; 413 } 414 415 static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPRMachineState *spapr, 416 target_ulong opcode, target_ulong *args) 417 { 418 target_ulong liobn = args[0]; 419 target_ulong ioba = args[1]; 420 target_ulong tce = args[2]; 421 target_ulong ret = H_PARAMETER; 422 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); 423 424 if (tcet) { 425 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); 426 427 ioba &= page_mask; 428 429 ret = put_tce_emu(tcet, ioba, tce); 430 } 431 if (SPAPR_IS_PCI_LIOBN(liobn)) { 432 trace_spapr_iommu_pci_put(liobn, ioba, tce, ret); 433 } else { 434 trace_spapr_iommu_put(liobn, ioba, tce, ret); 435 } 436 437 return ret; 438 } 439 440 static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba, 441 target_ulong *tce) 442 { 443 unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift; 444 445 if (index >= tcet->nb_table) { 446 hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x" 447 TARGET_FMT_lx "\n", ioba); 448 return H_PARAMETER; 449 } 450 451 *tce = tcet->table[index]; 452 453 return H_SUCCESS; 454 } 455 456 static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPRMachineState *spapr, 457 target_ulong opcode, target_ulong *args) 458 { 459 target_ulong liobn = args[0]; 460 target_ulong ioba = args[1]; 461 target_ulong tce = 0; 462 target_ulong ret = H_PARAMETER; 463 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); 464 465 if (tcet) { 466 hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); 467 468 ioba &= page_mask; 469 470 ret = get_tce_emu(tcet, ioba, &tce); 471 if (!ret) { 472 args[0] = tce; 473 } 474 } 475 if (SPAPR_IS_PCI_LIOBN(liobn)) { 476 trace_spapr_iommu_pci_get(liobn, ioba, ret, tce); 477 } else { 478 trace_spapr_iommu_get(liobn, ioba, ret, tce); 479 } 480 481 return ret; 482 } 483 484 int spapr_dma_dt(void *fdt, int node_off, const char *propname, 485 uint32_t liobn, uint64_t window, uint32_t size) 486 { 487 uint32_t dma_prop[5]; 488 int ret; 489 490 dma_prop[0] = cpu_to_be32(liobn); 491 dma_prop[1] = cpu_to_be32(window >> 32); 492 dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF); 493 dma_prop[3] = 0; /* window size is 32 bits */ 494 dma_prop[4] = cpu_to_be32(size); 495 496 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2); 497 if (ret < 0) { 498 return ret; 499 } 500 501 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2); 502 if (ret < 0) { 503 return ret; 504 } 505 506 ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop)); 507 if (ret < 0) { 508 return ret; 509 } 510 511 return 0; 512 } 513 514 int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname, 515 sPAPRTCETable *tcet) 516 { 517 if (!tcet) { 518 return 0; 519 } 520 521 return spapr_dma_dt(fdt, node_off, propname, 522 tcet->liobn, 0, tcet->nb_table << tcet->page_shift); 523 } 524 525 static void spapr_tce_table_class_init(ObjectClass *klass, void *data) 526 { 527 DeviceClass *dc = DEVICE_CLASS(klass); 528 dc->init = spapr_tce_table_realize; 529 dc->reset = spapr_tce_reset; 530 dc->unrealize = spapr_tce_table_unrealize; 531 532 QLIST_INIT(&spapr_tce_tables); 533 534 /* hcall-tce */ 535 spapr_register_hypercall(H_PUT_TCE, h_put_tce); 536 spapr_register_hypercall(H_GET_TCE, h_get_tce); 537 spapr_register_hypercall(H_PUT_TCE_INDIRECT, h_put_tce_indirect); 538 spapr_register_hypercall(H_STUFF_TCE, h_stuff_tce); 539 } 540 541 static TypeInfo spapr_tce_table_info = { 542 .name = TYPE_SPAPR_TCE_TABLE, 543 .parent = TYPE_DEVICE, 544 .instance_size = sizeof(sPAPRTCETable), 545 .class_init = spapr_tce_table_class_init, 546 }; 547 548 static void register_types(void) 549 { 550 type_register_static(&spapr_tce_table_info); 551 } 552 553 type_init(register_types); 554