xref: /qemu/hw/ppc/spapr_iommu.c (revision 650f33adbd53b0bacdd5d3392ea5b11a8a0fba42)
1 /*
2  * QEMU sPAPR IOMMU (TCE) code
3  *
4  * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 #include "hw/hw.h"
20 #include "sysemu/kvm.h"
21 #include "hw/qdev.h"
22 #include "kvm_ppc.h"
23 #include "sysemu/dma.h"
24 #include "exec/address-spaces.h"
25 #include "trace.h"
26 
27 #include "hw/ppc/spapr.h"
28 
29 #include <libfdt.h>
30 
31 enum sPAPRTCEAccess {
32     SPAPR_TCE_FAULT = 0,
33     SPAPR_TCE_RO = 1,
34     SPAPR_TCE_WO = 2,
35     SPAPR_TCE_RW = 3,
36 };
37 
38 #define IOMMU_PAGE_SIZE(shift)      (1ULL << (shift))
39 #define IOMMU_PAGE_MASK(shift)      (~(IOMMU_PAGE_SIZE(shift) - 1))
40 
41 static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables;
42 
43 static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
44 {
45     sPAPRTCETable *tcet;
46 
47     if (liobn & 0xFFFFFFFF00000000ULL) {
48         hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx "\n",
49                       liobn);
50         return NULL;
51     }
52 
53     QLIST_FOREACH(tcet, &spapr_tce_tables, list) {
54         if (tcet->liobn == liobn) {
55             return tcet;
56         }
57     }
58 
59     return NULL;
60 }
61 
62 static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr)
63 {
64     sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
65     uint64_t tce;
66     IOMMUTLBEntry ret = {
67         .target_as = &address_space_memory,
68         .iova = 0,
69         .translated_addr = 0,
70         .addr_mask = ~(hwaddr)0,
71         .perm = IOMMU_NONE,
72     };
73 
74     if (tcet->bypass) {
75         ret.perm = IOMMU_RW;
76     } else if ((addr >> tcet->page_shift) < tcet->nb_table) {
77         /* Check if we are in bound */
78         hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
79 
80         tce = tcet->table[addr >> tcet->page_shift];
81         ret.iova = addr & page_mask;
82         ret.translated_addr = tce & page_mask;
83         ret.addr_mask = ~page_mask;
84         ret.perm = tce;
85     }
86     trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm,
87                             ret.addr_mask);
88 
89     return ret;
90 }
91 
92 static const VMStateDescription vmstate_spapr_tce_table = {
93     .name = "spapr_iommu",
94     .version_id = 2,
95     .minimum_version_id = 2,
96     .fields      = (VMStateField []) {
97         /* Sanity check */
98         VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable),
99         VMSTATE_UINT32_EQUAL(nb_table, sPAPRTCETable),
100 
101         /* IOMMU state */
102         VMSTATE_BOOL(bypass, sPAPRTCETable),
103         VMSTATE_VARRAY_UINT32(table, sPAPRTCETable, nb_table, 0, vmstate_info_uint64, uint64_t),
104 
105         VMSTATE_END_OF_LIST()
106     },
107 };
108 
109 static MemoryRegionIOMMUOps spapr_iommu_ops = {
110     .translate = spapr_tce_translate_iommu,
111 };
112 
113 static int spapr_tce_table_realize(DeviceState *dev)
114 {
115     sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
116 
117     if (kvm_enabled()) {
118         tcet->table = kvmppc_create_spapr_tce(tcet->liobn,
119                                               tcet->nb_table <<
120                                               tcet->page_shift,
121                                               &tcet->fd);
122     }
123 
124     if (!tcet->table) {
125         size_t table_size = tcet->nb_table * sizeof(uint64_t);
126         tcet->table = g_malloc0(table_size);
127     }
128 
129     trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd);
130 
131     memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops,
132                              "iommu-spapr", ram_size);
133 
134     QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
135 
136     vmstate_register(DEVICE(tcet), tcet->liobn, &vmstate_spapr_tce_table,
137                      tcet);
138 
139     return 0;
140 }
141 
142 sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn,
143                                    uint32_t page_shift,
144                                    uint32_t nb_table)
145 {
146     sPAPRTCETable *tcet;
147 
148     if (spapr_tce_find_by_liobn(liobn)) {
149         fprintf(stderr, "Attempted to create TCE table with duplicate"
150                 " LIOBN 0x%x\n", liobn);
151         return NULL;
152     }
153 
154     if (!nb_table) {
155         return NULL;
156     }
157 
158     tcet = SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE));
159     tcet->liobn = liobn;
160     tcet->page_shift = page_shift;
161     tcet->nb_table = nb_table;
162 
163     object_property_add_child(OBJECT(owner), "tce-table", OBJECT(tcet), NULL);
164 
165     object_property_set_bool(OBJECT(tcet), true, "realized", NULL);
166 
167     return tcet;
168 }
169 
170 static void spapr_tce_table_finalize(Object *obj)
171 {
172     sPAPRTCETable *tcet = SPAPR_TCE_TABLE(obj);
173 
174     QLIST_REMOVE(tcet, list);
175 
176     if (!kvm_enabled() ||
177         (kvmppc_remove_spapr_tce(tcet->table, tcet->fd,
178                                  tcet->nb_table) != 0)) {
179         g_free(tcet->table);
180     }
181 }
182 
183 MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
184 {
185     return &tcet->iommu;
186 }
187 
188 void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass)
189 {
190     tcet->bypass = bypass;
191 }
192 
193 static void spapr_tce_reset(DeviceState *dev)
194 {
195     sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
196     size_t table_size = tcet->nb_table * sizeof(uint64_t);
197 
198     tcet->bypass = false;
199     memset(tcet->table, 0, table_size);
200 }
201 
202 static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
203                                 target_ulong tce)
204 {
205     IOMMUTLBEntry entry;
206     hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
207 
208     if ((ioba >> tcet->page_shift) >= tcet->nb_table) {
209         hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
210                       TARGET_FMT_lx "\n", ioba);
211         return H_PARAMETER;
212     }
213 
214     tcet->table[ioba >> tcet->page_shift] = tce;
215 
216     entry.target_as = &address_space_memory,
217     entry.iova = ioba & page_mask;
218     entry.translated_addr = tce & page_mask;
219     entry.addr_mask = ~page_mask;
220     entry.perm = tce;
221     memory_region_notify_iommu(&tcet->iommu, entry);
222 
223     return H_SUCCESS;
224 }
225 
226 static target_ulong h_put_tce_indirect(PowerPCCPU *cpu,
227                                        sPAPREnvironment *spapr,
228                                        target_ulong opcode, target_ulong *args)
229 {
230     int i;
231     target_ulong liobn = args[0];
232     target_ulong ioba = args[1];
233     target_ulong ioba1 = ioba;
234     target_ulong tce_list = args[2];
235     target_ulong npages = args[3];
236     target_ulong ret = H_PARAMETER;
237     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
238     CPUState *cs = CPU(cpu);
239     hwaddr page_mask, page_size;
240 
241     if (!tcet) {
242         return H_PARAMETER;
243     }
244 
245     if ((npages > 512) || (tce_list & SPAPR_TCE_PAGE_MASK)) {
246         return H_PARAMETER;
247     }
248 
249     page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
250     page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
251     ioba &= page_mask;
252 
253     for (i = 0; i < npages; ++i, ioba += page_size) {
254         target_ulong off = (tce_list & ~SPAPR_TCE_RW) +
255                                 i * sizeof(target_ulong);
256         target_ulong tce = ldq_phys(cs->as, off);
257 
258         ret = put_tce_emu(tcet, ioba, tce);
259         if (ret) {
260             break;
261         }
262     }
263 
264     /* Trace last successful or the first problematic entry */
265     i = i ? (i - 1) : 0;
266     trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i,
267                                ldq_phys(cs->as,
268                                tce_list + i * sizeof(target_ulong)),
269                                ret);
270 
271     return ret;
272 }
273 
274 static target_ulong h_stuff_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
275                               target_ulong opcode, target_ulong *args)
276 {
277     int i;
278     target_ulong liobn = args[0];
279     target_ulong ioba = args[1];
280     target_ulong tce_value = args[2];
281     target_ulong npages = args[3];
282     target_ulong ret = H_PARAMETER;
283     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
284     hwaddr page_mask, page_size;
285 
286     if (!tcet) {
287         return H_PARAMETER;
288     }
289 
290     if (npages > tcet->nb_table) {
291         return H_PARAMETER;
292     }
293 
294     page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
295     page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
296     ioba &= page_mask;
297 
298     for (i = 0; i < npages; ++i, ioba += page_size) {
299         ret = put_tce_emu(tcet, ioba, tce_value);
300         if (ret) {
301             break;
302         }
303     }
304     trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret);
305 
306     return ret;
307 }
308 
309 static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
310                               target_ulong opcode, target_ulong *args)
311 {
312     target_ulong liobn = args[0];
313     target_ulong ioba = args[1];
314     target_ulong tce = args[2];
315     target_ulong ret = H_PARAMETER;
316     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
317 
318     if (tcet) {
319         hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
320 
321         ioba &= page_mask;
322 
323         ret = put_tce_emu(tcet, ioba, tce);
324     }
325     trace_spapr_iommu_put(liobn, ioba, tce, ret);
326 
327     return ret;
328 }
329 
330 static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
331                                 target_ulong *tce)
332 {
333     if ((ioba >> tcet->page_shift) >= tcet->nb_table) {
334         hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x"
335                       TARGET_FMT_lx "\n", ioba);
336         return H_PARAMETER;
337     }
338 
339     *tce = tcet->table[ioba >> tcet->page_shift];
340 
341     return H_SUCCESS;
342 }
343 
344 static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
345                               target_ulong opcode, target_ulong *args)
346 {
347     target_ulong liobn = args[0];
348     target_ulong ioba = args[1];
349     target_ulong tce = 0;
350     target_ulong ret = H_PARAMETER;
351     sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
352 
353     if (tcet) {
354         hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
355 
356         ioba &= page_mask;
357 
358         ret = get_tce_emu(tcet, ioba, &tce);
359         if (!ret) {
360             args[0] = tce;
361         }
362     }
363     trace_spapr_iommu_get(liobn, ioba, ret, tce);
364 
365     return ret;
366 }
367 
368 int spapr_dma_dt(void *fdt, int node_off, const char *propname,
369                  uint32_t liobn, uint64_t window, uint32_t size)
370 {
371     uint32_t dma_prop[5];
372     int ret;
373 
374     dma_prop[0] = cpu_to_be32(liobn);
375     dma_prop[1] = cpu_to_be32(window >> 32);
376     dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF);
377     dma_prop[3] = 0; /* window size is 32 bits */
378     dma_prop[4] = cpu_to_be32(size);
379 
380     ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
381     if (ret < 0) {
382         return ret;
383     }
384 
385     ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
386     if (ret < 0) {
387         return ret;
388     }
389 
390     ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop));
391     if (ret < 0) {
392         return ret;
393     }
394 
395     return 0;
396 }
397 
398 int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
399                       sPAPRTCETable *tcet)
400 {
401     if (!tcet) {
402         return 0;
403     }
404 
405     return spapr_dma_dt(fdt, node_off, propname,
406                         tcet->liobn, 0, tcet->nb_table << tcet->page_shift);
407 }
408 
409 static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
410 {
411     DeviceClass *dc = DEVICE_CLASS(klass);
412     dc->init = spapr_tce_table_realize;
413     dc->reset = spapr_tce_reset;
414 
415     QLIST_INIT(&spapr_tce_tables);
416 
417     /* hcall-tce */
418     spapr_register_hypercall(H_PUT_TCE, h_put_tce);
419     spapr_register_hypercall(H_GET_TCE, h_get_tce);
420     spapr_register_hypercall(H_PUT_TCE_INDIRECT, h_put_tce_indirect);
421     spapr_register_hypercall(H_STUFF_TCE, h_stuff_tce);
422 }
423 
424 static TypeInfo spapr_tce_table_info = {
425     .name = TYPE_SPAPR_TCE_TABLE,
426     .parent = TYPE_DEVICE,
427     .instance_size = sizeof(sPAPRTCETable),
428     .class_init = spapr_tce_table_class_init,
429     .instance_finalize = spapr_tce_table_finalize,
430 };
431 
432 static void register_types(void)
433 {
434     type_register_static(&spapr_tce_table_info);
435 }
436 
437 type_init(register_types);
438