1a3980bf5SBenjamin Herrenschmidt /* 2a3980bf5SBenjamin Herrenschmidt * QEMU PowerPC PowerNV LPC controller 3a3980bf5SBenjamin Herrenschmidt * 4a3980bf5SBenjamin Herrenschmidt * Copyright (c) 2016, IBM Corporation. 5a3980bf5SBenjamin Herrenschmidt * 6a3980bf5SBenjamin Herrenschmidt * This library is free software; you can redistribute it and/or 7a3980bf5SBenjamin Herrenschmidt * modify it under the terms of the GNU Lesser General Public 8a3980bf5SBenjamin Herrenschmidt * License as published by the Free Software Foundation; either 9a3980bf5SBenjamin Herrenschmidt * version 2 of the License, or (at your option) any later version. 10a3980bf5SBenjamin Herrenschmidt * 11a3980bf5SBenjamin Herrenschmidt * This library is distributed in the hope that it will be useful, 12a3980bf5SBenjamin Herrenschmidt * but WITHOUT ANY WARRANTY; without even the implied warranty of 13a3980bf5SBenjamin Herrenschmidt * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14a3980bf5SBenjamin Herrenschmidt * Lesser General Public License for more details. 15a3980bf5SBenjamin Herrenschmidt * 16a3980bf5SBenjamin Herrenschmidt * You should have received a copy of the GNU Lesser General Public 17a3980bf5SBenjamin Herrenschmidt * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18a3980bf5SBenjamin Herrenschmidt */ 19a3980bf5SBenjamin Herrenschmidt 20a3980bf5SBenjamin Herrenschmidt #include "qemu/osdep.h" 21a3980bf5SBenjamin Herrenschmidt #include "sysemu/sysemu.h" 22fcf5ef2aSThomas Huth #include "target/ppc/cpu.h" 23a3980bf5SBenjamin Herrenschmidt #include "qapi/error.h" 24a3980bf5SBenjamin Herrenschmidt #include "qemu/log.h" 2504026890SCédric Le Goater #include "hw/isa/isa.h" 26a3980bf5SBenjamin Herrenschmidt 27a3980bf5SBenjamin Herrenschmidt #include "hw/ppc/pnv.h" 28ec575aa0SCédric Le Goater #include "hw/ppc/pnv_lpc.h" 29ec575aa0SCédric Le Goater #include "hw/ppc/pnv_xscom.h" 30a3980bf5SBenjamin Herrenschmidt #include "hw/ppc/fdt.h" 31a3980bf5SBenjamin Herrenschmidt 32a3980bf5SBenjamin Herrenschmidt #include <libfdt.h> 33a3980bf5SBenjamin Herrenschmidt 34a3980bf5SBenjamin Herrenschmidt enum { 35a3980bf5SBenjamin Herrenschmidt ECCB_CTL = 0, 36a3980bf5SBenjamin Herrenschmidt ECCB_RESET = 1, 37a3980bf5SBenjamin Herrenschmidt ECCB_STAT = 2, 38a3980bf5SBenjamin Herrenschmidt ECCB_DATA = 3, 39a3980bf5SBenjamin Herrenschmidt }; 40a3980bf5SBenjamin Herrenschmidt 41a3980bf5SBenjamin Herrenschmidt /* OPB Master LS registers */ 42a3980bf5SBenjamin Herrenschmidt #define OPB_MASTER_LS_IRQ_STAT 0x50 43a3980bf5SBenjamin Herrenschmidt #define OPB_MASTER_IRQ_LPC 0x00000800 44a3980bf5SBenjamin Herrenschmidt #define OPB_MASTER_LS_IRQ_MASK 0x54 45a3980bf5SBenjamin Herrenschmidt #define OPB_MASTER_LS_IRQ_POL 0x58 46a3980bf5SBenjamin Herrenschmidt #define OPB_MASTER_LS_IRQ_INPUT 0x5c 47a3980bf5SBenjamin Herrenschmidt 48a3980bf5SBenjamin Herrenschmidt /* LPC HC registers */ 49a3980bf5SBenjamin Herrenschmidt #define LPC_HC_FW_SEG_IDSEL 0x24 50a3980bf5SBenjamin Herrenschmidt #define LPC_HC_FW_RD_ACC_SIZE 0x28 51a3980bf5SBenjamin Herrenschmidt #define LPC_HC_FW_RD_1B 0x00000000 52a3980bf5SBenjamin Herrenschmidt #define LPC_HC_FW_RD_2B 0x01000000 53a3980bf5SBenjamin Herrenschmidt #define LPC_HC_FW_RD_4B 0x02000000 54a3980bf5SBenjamin Herrenschmidt #define LPC_HC_FW_RD_16B 0x04000000 55a3980bf5SBenjamin Herrenschmidt #define LPC_HC_FW_RD_128B 0x07000000 56a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSER_CTRL 0x30 57a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSER_EN 0x80000000 58a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSER_QMODE 0x40000000 59a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSER_START_MASK 0x03000000 60a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSER_START_4CLK 0x00000000 61a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSER_START_6CLK 0x01000000 62a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSER_START_8CLK 0x02000000 63a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQMASK 0x34 /* same bit defs as LPC_HC_IRQSTAT */ 64a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQSTAT 0x38 65a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SERIRQ0 0x80000000 /* all bits down to ... */ 66a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SERIRQ16 0x00008000 /* IRQ16=IOCHK#, IRQ2=SMI# */ 67a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SERIRQ_ALL 0xffff8000 68a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_LRESET 0x00000400 69a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_ABNORM_ERR 0x00000080 70a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_NORESP_ERR 0x00000040 71a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_NORM_ERR 0x00000020 72a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_TIMEOUT_ERR 0x00000010 73a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_TARG_TAR_ERR 0x00000008 74a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_BM_TAR_ERR 0x00000004 75a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_BM0_REQ 0x00000002 76a3980bf5SBenjamin Herrenschmidt #define LPC_HC_IRQ_SYNC_BM1_REQ 0x00000001 77a3980bf5SBenjamin Herrenschmidt #define LPC_HC_ERROR_ADDRESS 0x40 78a3980bf5SBenjamin Herrenschmidt 79a3980bf5SBenjamin Herrenschmidt #define LPC_OPB_SIZE 0x100000000ull 80a3980bf5SBenjamin Herrenschmidt 81a3980bf5SBenjamin Herrenschmidt #define ISA_IO_SIZE 0x00010000 82a3980bf5SBenjamin Herrenschmidt #define ISA_MEM_SIZE 0x10000000 83d61c2857SCédric Le Goater #define ISA_FW_SIZE 0x10000000 84a3980bf5SBenjamin Herrenschmidt #define LPC_IO_OPB_ADDR 0xd0010000 85a3980bf5SBenjamin Herrenschmidt #define LPC_IO_OPB_SIZE 0x00010000 86a3980bf5SBenjamin Herrenschmidt #define LPC_MEM_OPB_ADDR 0xe0010000 87a3980bf5SBenjamin Herrenschmidt #define LPC_MEM_OPB_SIZE 0x10000000 88a3980bf5SBenjamin Herrenschmidt #define LPC_FW_OPB_ADDR 0xf0000000 89a3980bf5SBenjamin Herrenschmidt #define LPC_FW_OPB_SIZE 0x10000000 90a3980bf5SBenjamin Herrenschmidt 91a3980bf5SBenjamin Herrenschmidt #define LPC_OPB_REGS_OPB_ADDR 0xc0010000 92*6f89f48eSCédric Le Goater #define LPC_OPB_REGS_OPB_SIZE 0x00000060 93*6f89f48eSCédric Le Goater #define LPC_OPB_REGS_OPBA_ADDR 0xc0011000 94*6f89f48eSCédric Le Goater #define LPC_OPB_REGS_OPBA_SIZE 0x00000008 95a3980bf5SBenjamin Herrenschmidt #define LPC_HC_REGS_OPB_ADDR 0xc0012000 96*6f89f48eSCédric Le Goater #define LPC_HC_REGS_OPB_SIZE 0x00000100 97a3980bf5SBenjamin Herrenschmidt 98b168a138SCédric Le Goater static int pnv_lpc_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset) 99a3980bf5SBenjamin Herrenschmidt { 100a3980bf5SBenjamin Herrenschmidt const char compat[] = "ibm,power8-lpc\0ibm,lpc"; 101a3980bf5SBenjamin Herrenschmidt char *name; 102a3980bf5SBenjamin Herrenschmidt int offset; 103a3980bf5SBenjamin Herrenschmidt uint32_t lpc_pcba = PNV_XSCOM_LPC_BASE; 104a3980bf5SBenjamin Herrenschmidt uint32_t reg[] = { 105a3980bf5SBenjamin Herrenschmidt cpu_to_be32(lpc_pcba), 106a3980bf5SBenjamin Herrenschmidt cpu_to_be32(PNV_XSCOM_LPC_SIZE) 107a3980bf5SBenjamin Herrenschmidt }; 108a3980bf5SBenjamin Herrenschmidt 109a3980bf5SBenjamin Herrenschmidt name = g_strdup_printf("isa@%x", lpc_pcba); 110a3980bf5SBenjamin Herrenschmidt offset = fdt_add_subnode(fdt, xscom_offset, name); 111a3980bf5SBenjamin Herrenschmidt _FDT(offset); 112a3980bf5SBenjamin Herrenschmidt g_free(name); 113a3980bf5SBenjamin Herrenschmidt 114a3980bf5SBenjamin Herrenschmidt _FDT((fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)))); 115a3980bf5SBenjamin Herrenschmidt _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 2))); 116a3980bf5SBenjamin Herrenschmidt _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 1))); 117a3980bf5SBenjamin Herrenschmidt _FDT((fdt_setprop(fdt, offset, "compatible", compat, sizeof(compat)))); 118a3980bf5SBenjamin Herrenschmidt return 0; 119a3980bf5SBenjamin Herrenschmidt } 120a3980bf5SBenjamin Herrenschmidt 121a3980bf5SBenjamin Herrenschmidt /* 122a3980bf5SBenjamin Herrenschmidt * These read/write handlers of the OPB address space should be common 123a3980bf5SBenjamin Herrenschmidt * with the P9 LPC Controller which uses direct MMIOs. 124a3980bf5SBenjamin Herrenschmidt * 125a3980bf5SBenjamin Herrenschmidt * TODO: rework to use address_space_stq() and address_space_ldq() 126a3980bf5SBenjamin Herrenschmidt * instead. 127a3980bf5SBenjamin Herrenschmidt */ 128a3980bf5SBenjamin Herrenschmidt static bool opb_read(PnvLpcController *lpc, uint32_t addr, uint8_t *data, 129a3980bf5SBenjamin Herrenschmidt int sz) 130a3980bf5SBenjamin Herrenschmidt { 131a3980bf5SBenjamin Herrenschmidt /* XXX Handle access size limits and FW read caching here */ 1324a4ff4c5SLaurent Vivier return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, 133a3980bf5SBenjamin Herrenschmidt data, sz, false); 134a3980bf5SBenjamin Herrenschmidt } 135a3980bf5SBenjamin Herrenschmidt 136a3980bf5SBenjamin Herrenschmidt static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data, 137a3980bf5SBenjamin Herrenschmidt int sz) 138a3980bf5SBenjamin Herrenschmidt { 139a3980bf5SBenjamin Herrenschmidt /* XXX Handle access size limits here */ 1404a4ff4c5SLaurent Vivier return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, 141a3980bf5SBenjamin Herrenschmidt data, sz, true); 142a3980bf5SBenjamin Herrenschmidt } 143a3980bf5SBenjamin Herrenschmidt 144a6a444a8SCédric Le Goater #define ECCB_CTL_READ PPC_BIT(15) 145a3980bf5SBenjamin Herrenschmidt #define ECCB_CTL_SZ_LSH (63 - 7) 146a6a444a8SCédric Le Goater #define ECCB_CTL_SZ_MASK PPC_BITMASK(4, 7) 147a6a444a8SCédric Le Goater #define ECCB_CTL_ADDR_MASK PPC_BITMASK(32, 63) 148a3980bf5SBenjamin Herrenschmidt 149a6a444a8SCédric Le Goater #define ECCB_STAT_OP_DONE PPC_BIT(52) 150a6a444a8SCédric Le Goater #define ECCB_STAT_OP_ERR PPC_BIT(52) 151a3980bf5SBenjamin Herrenschmidt #define ECCB_STAT_RD_DATA_LSH (63 - 37) 152a3980bf5SBenjamin Herrenschmidt #define ECCB_STAT_RD_DATA_MASK (0xffffffff << ECCB_STAT_RD_DATA_LSH) 153a3980bf5SBenjamin Herrenschmidt 154a3980bf5SBenjamin Herrenschmidt static void pnv_lpc_do_eccb(PnvLpcController *lpc, uint64_t cmd) 155a3980bf5SBenjamin Herrenschmidt { 156a3980bf5SBenjamin Herrenschmidt /* XXX Check for magic bits at the top, addr size etc... */ 157a3980bf5SBenjamin Herrenschmidt unsigned int sz = (cmd & ECCB_CTL_SZ_MASK) >> ECCB_CTL_SZ_LSH; 158a3980bf5SBenjamin Herrenschmidt uint32_t opb_addr = cmd & ECCB_CTL_ADDR_MASK; 159d07945e7SPrasad J Pandit uint8_t data[8]; 160a3980bf5SBenjamin Herrenschmidt bool success; 161a3980bf5SBenjamin Herrenschmidt 162d07945e7SPrasad J Pandit if (sz > sizeof(data)) { 163d07945e7SPrasad J Pandit qemu_log_mask(LOG_GUEST_ERROR, 164d07945e7SPrasad J Pandit "ECCB: invalid operation at @0x%08x size %d\n", opb_addr, sz); 165d07945e7SPrasad J Pandit return; 166d07945e7SPrasad J Pandit } 167d07945e7SPrasad J Pandit 168a3980bf5SBenjamin Herrenschmidt if (cmd & ECCB_CTL_READ) { 169a3980bf5SBenjamin Herrenschmidt success = opb_read(lpc, opb_addr, data, sz); 170a3980bf5SBenjamin Herrenschmidt if (success) { 171a3980bf5SBenjamin Herrenschmidt lpc->eccb_stat_reg = ECCB_STAT_OP_DONE | 172a3980bf5SBenjamin Herrenschmidt (((uint64_t)data[0]) << 24 | 173a3980bf5SBenjamin Herrenschmidt ((uint64_t)data[1]) << 16 | 174a3980bf5SBenjamin Herrenschmidt ((uint64_t)data[2]) << 8 | 175a3980bf5SBenjamin Herrenschmidt ((uint64_t)data[3])) << ECCB_STAT_RD_DATA_LSH; 176a3980bf5SBenjamin Herrenschmidt } else { 177a3980bf5SBenjamin Herrenschmidt lpc->eccb_stat_reg = ECCB_STAT_OP_DONE | 178a3980bf5SBenjamin Herrenschmidt (0xffffffffull << ECCB_STAT_RD_DATA_LSH); 179a3980bf5SBenjamin Herrenschmidt } 180a3980bf5SBenjamin Herrenschmidt } else { 181a3980bf5SBenjamin Herrenschmidt data[0] = lpc->eccb_data_reg >> 24; 182a3980bf5SBenjamin Herrenschmidt data[1] = lpc->eccb_data_reg >> 16; 183a3980bf5SBenjamin Herrenschmidt data[2] = lpc->eccb_data_reg >> 8; 184a3980bf5SBenjamin Herrenschmidt data[3] = lpc->eccb_data_reg; 185a3980bf5SBenjamin Herrenschmidt 186a3980bf5SBenjamin Herrenschmidt success = opb_write(lpc, opb_addr, data, sz); 187a3980bf5SBenjamin Herrenschmidt lpc->eccb_stat_reg = ECCB_STAT_OP_DONE; 188a3980bf5SBenjamin Herrenschmidt } 189a3980bf5SBenjamin Herrenschmidt /* XXX Which error bit (if any) to signal OPB error ? */ 190a3980bf5SBenjamin Herrenschmidt } 191a3980bf5SBenjamin Herrenschmidt 192a3980bf5SBenjamin Herrenschmidt static uint64_t pnv_lpc_xscom_read(void *opaque, hwaddr addr, unsigned size) 193a3980bf5SBenjamin Herrenschmidt { 194a3980bf5SBenjamin Herrenschmidt PnvLpcController *lpc = PNV_LPC(opaque); 195a3980bf5SBenjamin Herrenschmidt uint32_t offset = addr >> 3; 196a3980bf5SBenjamin Herrenschmidt uint64_t val = 0; 197a3980bf5SBenjamin Herrenschmidt 198a3980bf5SBenjamin Herrenschmidt switch (offset & 3) { 199a3980bf5SBenjamin Herrenschmidt case ECCB_CTL: 200a3980bf5SBenjamin Herrenschmidt case ECCB_RESET: 201a3980bf5SBenjamin Herrenschmidt val = 0; 202a3980bf5SBenjamin Herrenschmidt break; 203a3980bf5SBenjamin Herrenschmidt case ECCB_STAT: 204a3980bf5SBenjamin Herrenschmidt val = lpc->eccb_stat_reg; 205a3980bf5SBenjamin Herrenschmidt lpc->eccb_stat_reg = 0; 206a3980bf5SBenjamin Herrenschmidt break; 207a3980bf5SBenjamin Herrenschmidt case ECCB_DATA: 208a3980bf5SBenjamin Herrenschmidt val = ((uint64_t)lpc->eccb_data_reg) << 32; 209a3980bf5SBenjamin Herrenschmidt break; 210a3980bf5SBenjamin Herrenschmidt } 211a3980bf5SBenjamin Herrenschmidt return val; 212a3980bf5SBenjamin Herrenschmidt } 213a3980bf5SBenjamin Herrenschmidt 214a3980bf5SBenjamin Herrenschmidt static void pnv_lpc_xscom_write(void *opaque, hwaddr addr, 215a3980bf5SBenjamin Herrenschmidt uint64_t val, unsigned size) 216a3980bf5SBenjamin Herrenschmidt { 217a3980bf5SBenjamin Herrenschmidt PnvLpcController *lpc = PNV_LPC(opaque); 218a3980bf5SBenjamin Herrenschmidt uint32_t offset = addr >> 3; 219a3980bf5SBenjamin Herrenschmidt 220a3980bf5SBenjamin Herrenschmidt switch (offset & 3) { 221a3980bf5SBenjamin Herrenschmidt case ECCB_CTL: 222a3980bf5SBenjamin Herrenschmidt pnv_lpc_do_eccb(lpc, val); 223a3980bf5SBenjamin Herrenschmidt break; 224a3980bf5SBenjamin Herrenschmidt case ECCB_RESET: 225a3980bf5SBenjamin Herrenschmidt /* XXXX */ 226a3980bf5SBenjamin Herrenschmidt break; 227a3980bf5SBenjamin Herrenschmidt case ECCB_STAT: 228a3980bf5SBenjamin Herrenschmidt break; 229a3980bf5SBenjamin Herrenschmidt case ECCB_DATA: 230a3980bf5SBenjamin Herrenschmidt lpc->eccb_data_reg = val >> 32; 231a3980bf5SBenjamin Herrenschmidt break; 232a3980bf5SBenjamin Herrenschmidt } 233a3980bf5SBenjamin Herrenschmidt } 234a3980bf5SBenjamin Herrenschmidt 235a3980bf5SBenjamin Herrenschmidt static const MemoryRegionOps pnv_lpc_xscom_ops = { 236a3980bf5SBenjamin Herrenschmidt .read = pnv_lpc_xscom_read, 237a3980bf5SBenjamin Herrenschmidt .write = pnv_lpc_xscom_write, 238a3980bf5SBenjamin Herrenschmidt .valid.min_access_size = 8, 239a3980bf5SBenjamin Herrenschmidt .valid.max_access_size = 8, 240a3980bf5SBenjamin Herrenschmidt .impl.min_access_size = 8, 241a3980bf5SBenjamin Herrenschmidt .impl.max_access_size = 8, 242a3980bf5SBenjamin Herrenschmidt .endianness = DEVICE_BIG_ENDIAN, 243a3980bf5SBenjamin Herrenschmidt }; 244a3980bf5SBenjamin Herrenschmidt 2454d1df88bSBenjamin Herrenschmidt static void pnv_lpc_eval_irqs(PnvLpcController *lpc) 2464d1df88bSBenjamin Herrenschmidt { 2474d1df88bSBenjamin Herrenschmidt bool lpc_to_opb_irq = false; 2484d1df88bSBenjamin Herrenschmidt 2494d1df88bSBenjamin Herrenschmidt /* Update LPC controller to OPB line */ 2504d1df88bSBenjamin Herrenschmidt if (lpc->lpc_hc_irqser_ctrl & LPC_HC_IRQSER_EN) { 2514d1df88bSBenjamin Herrenschmidt uint32_t irqs; 2524d1df88bSBenjamin Herrenschmidt 2534d1df88bSBenjamin Herrenschmidt irqs = lpc->lpc_hc_irqstat & lpc->lpc_hc_irqmask; 2544d1df88bSBenjamin Herrenschmidt lpc_to_opb_irq = (irqs != 0); 2554d1df88bSBenjamin Herrenschmidt } 2564d1df88bSBenjamin Herrenschmidt 2574d1df88bSBenjamin Herrenschmidt /* We don't honor the polarity register, it's pointless and unused 2584d1df88bSBenjamin Herrenschmidt * anyway 2594d1df88bSBenjamin Herrenschmidt */ 2604d1df88bSBenjamin Herrenschmidt if (lpc_to_opb_irq) { 2614d1df88bSBenjamin Herrenschmidt lpc->opb_irq_input |= OPB_MASTER_IRQ_LPC; 2624d1df88bSBenjamin Herrenschmidt } else { 2634d1df88bSBenjamin Herrenschmidt lpc->opb_irq_input &= ~OPB_MASTER_IRQ_LPC; 2644d1df88bSBenjamin Herrenschmidt } 2654d1df88bSBenjamin Herrenschmidt 2664d1df88bSBenjamin Herrenschmidt /* Update OPB internal latch */ 2674d1df88bSBenjamin Herrenschmidt lpc->opb_irq_stat |= lpc->opb_irq_input & lpc->opb_irq_mask; 2684d1df88bSBenjamin Herrenschmidt 2694d1df88bSBenjamin Herrenschmidt /* Reflect the interrupt */ 2704d1df88bSBenjamin Herrenschmidt pnv_psi_irq_set(lpc->psi, PSIHB_IRQ_LPC_I2C, lpc->opb_irq_stat != 0); 2714d1df88bSBenjamin Herrenschmidt } 2724d1df88bSBenjamin Herrenschmidt 273a3980bf5SBenjamin Herrenschmidt static uint64_t lpc_hc_read(void *opaque, hwaddr addr, unsigned size) 274a3980bf5SBenjamin Herrenschmidt { 275a3980bf5SBenjamin Herrenschmidt PnvLpcController *lpc = opaque; 276a3980bf5SBenjamin Herrenschmidt uint64_t val = 0xfffffffffffffffful; 277a3980bf5SBenjamin Herrenschmidt 278a3980bf5SBenjamin Herrenschmidt switch (addr) { 279a3980bf5SBenjamin Herrenschmidt case LPC_HC_FW_SEG_IDSEL: 280a3980bf5SBenjamin Herrenschmidt val = lpc->lpc_hc_fw_seg_idsel; 281a3980bf5SBenjamin Herrenschmidt break; 282a3980bf5SBenjamin Herrenschmidt case LPC_HC_FW_RD_ACC_SIZE: 283a3980bf5SBenjamin Herrenschmidt val = lpc->lpc_hc_fw_rd_acc_size; 284a3980bf5SBenjamin Herrenschmidt break; 285a3980bf5SBenjamin Herrenschmidt case LPC_HC_IRQSER_CTRL: 286a3980bf5SBenjamin Herrenschmidt val = lpc->lpc_hc_irqser_ctrl; 287a3980bf5SBenjamin Herrenschmidt break; 288a3980bf5SBenjamin Herrenschmidt case LPC_HC_IRQMASK: 289a3980bf5SBenjamin Herrenschmidt val = lpc->lpc_hc_irqmask; 290a3980bf5SBenjamin Herrenschmidt break; 291a3980bf5SBenjamin Herrenschmidt case LPC_HC_IRQSTAT: 292a3980bf5SBenjamin Herrenschmidt val = lpc->lpc_hc_irqstat; 293a3980bf5SBenjamin Herrenschmidt break; 294a3980bf5SBenjamin Herrenschmidt case LPC_HC_ERROR_ADDRESS: 295a3980bf5SBenjamin Herrenschmidt val = lpc->lpc_hc_error_addr; 296a3980bf5SBenjamin Herrenschmidt break; 297a3980bf5SBenjamin Herrenschmidt default: 298cdbaf8cdSCédric Le Goater qemu_log_mask(LOG_UNIMP, "LPC HC Unimplemented register: 0x%" 299a3980bf5SBenjamin Herrenschmidt HWADDR_PRIx "\n", addr); 300a3980bf5SBenjamin Herrenschmidt } 301a3980bf5SBenjamin Herrenschmidt return val; 302a3980bf5SBenjamin Herrenschmidt } 303a3980bf5SBenjamin Herrenschmidt 304a3980bf5SBenjamin Herrenschmidt static void lpc_hc_write(void *opaque, hwaddr addr, uint64_t val, 305a3980bf5SBenjamin Herrenschmidt unsigned size) 306a3980bf5SBenjamin Herrenschmidt { 307a3980bf5SBenjamin Herrenschmidt PnvLpcController *lpc = opaque; 308a3980bf5SBenjamin Herrenschmidt 309a3980bf5SBenjamin Herrenschmidt /* XXX Filter out reserved bits */ 310a3980bf5SBenjamin Herrenschmidt 311a3980bf5SBenjamin Herrenschmidt switch (addr) { 312a3980bf5SBenjamin Herrenschmidt case LPC_HC_FW_SEG_IDSEL: 313a3980bf5SBenjamin Herrenschmidt /* XXX Actually figure out how that works as this impact 314a3980bf5SBenjamin Herrenschmidt * memory regions/aliases 315a3980bf5SBenjamin Herrenschmidt */ 316a3980bf5SBenjamin Herrenschmidt lpc->lpc_hc_fw_seg_idsel = val; 317a3980bf5SBenjamin Herrenschmidt break; 318a3980bf5SBenjamin Herrenschmidt case LPC_HC_FW_RD_ACC_SIZE: 319a3980bf5SBenjamin Herrenschmidt lpc->lpc_hc_fw_rd_acc_size = val; 320a3980bf5SBenjamin Herrenschmidt break; 321a3980bf5SBenjamin Herrenschmidt case LPC_HC_IRQSER_CTRL: 322a3980bf5SBenjamin Herrenschmidt lpc->lpc_hc_irqser_ctrl = val; 3234d1df88bSBenjamin Herrenschmidt pnv_lpc_eval_irqs(lpc); 324a3980bf5SBenjamin Herrenschmidt break; 325a3980bf5SBenjamin Herrenschmidt case LPC_HC_IRQMASK: 326a3980bf5SBenjamin Herrenschmidt lpc->lpc_hc_irqmask = val; 3274d1df88bSBenjamin Herrenschmidt pnv_lpc_eval_irqs(lpc); 328a3980bf5SBenjamin Herrenschmidt break; 329a3980bf5SBenjamin Herrenschmidt case LPC_HC_IRQSTAT: 330a3980bf5SBenjamin Herrenschmidt lpc->lpc_hc_irqstat &= ~val; 3314d1df88bSBenjamin Herrenschmidt pnv_lpc_eval_irqs(lpc); 332a3980bf5SBenjamin Herrenschmidt break; 333a3980bf5SBenjamin Herrenschmidt case LPC_HC_ERROR_ADDRESS: 334a3980bf5SBenjamin Herrenschmidt break; 335a3980bf5SBenjamin Herrenschmidt default: 336cdbaf8cdSCédric Le Goater qemu_log_mask(LOG_UNIMP, "LPC HC Unimplemented register: 0x%" 337a3980bf5SBenjamin Herrenschmidt HWADDR_PRIx "\n", addr); 338a3980bf5SBenjamin Herrenschmidt } 339a3980bf5SBenjamin Herrenschmidt } 340a3980bf5SBenjamin Herrenschmidt 341a3980bf5SBenjamin Herrenschmidt static const MemoryRegionOps lpc_hc_ops = { 342a3980bf5SBenjamin Herrenschmidt .read = lpc_hc_read, 343a3980bf5SBenjamin Herrenschmidt .write = lpc_hc_write, 344a3980bf5SBenjamin Herrenschmidt .endianness = DEVICE_BIG_ENDIAN, 345a3980bf5SBenjamin Herrenschmidt .valid = { 346a3980bf5SBenjamin Herrenschmidt .min_access_size = 4, 347a3980bf5SBenjamin Herrenschmidt .max_access_size = 4, 348a3980bf5SBenjamin Herrenschmidt }, 349a3980bf5SBenjamin Herrenschmidt .impl = { 350a3980bf5SBenjamin Herrenschmidt .min_access_size = 4, 351a3980bf5SBenjamin Herrenschmidt .max_access_size = 4, 352a3980bf5SBenjamin Herrenschmidt }, 353a3980bf5SBenjamin Herrenschmidt }; 354a3980bf5SBenjamin Herrenschmidt 355a3980bf5SBenjamin Herrenschmidt static uint64_t opb_master_read(void *opaque, hwaddr addr, unsigned size) 356a3980bf5SBenjamin Herrenschmidt { 357a3980bf5SBenjamin Herrenschmidt PnvLpcController *lpc = opaque; 358a3980bf5SBenjamin Herrenschmidt uint64_t val = 0xfffffffffffffffful; 359a3980bf5SBenjamin Herrenschmidt 360a3980bf5SBenjamin Herrenschmidt switch (addr) { 361a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_STAT: 362a3980bf5SBenjamin Herrenschmidt val = lpc->opb_irq_stat; 363a3980bf5SBenjamin Herrenschmidt break; 364a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_MASK: 365a3980bf5SBenjamin Herrenschmidt val = lpc->opb_irq_mask; 366a3980bf5SBenjamin Herrenschmidt break; 367a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_POL: 368a3980bf5SBenjamin Herrenschmidt val = lpc->opb_irq_pol; 369a3980bf5SBenjamin Herrenschmidt break; 370a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_INPUT: 371a3980bf5SBenjamin Herrenschmidt val = lpc->opb_irq_input; 372a3980bf5SBenjamin Herrenschmidt break; 373a3980bf5SBenjamin Herrenschmidt default: 374cdbaf8cdSCédric Le Goater qemu_log_mask(LOG_UNIMP, "OPBM: read on unimplemented register: 0x%" 375a3980bf5SBenjamin Herrenschmidt HWADDR_PRIx "\n", addr); 376a3980bf5SBenjamin Herrenschmidt } 377a3980bf5SBenjamin Herrenschmidt 378a3980bf5SBenjamin Herrenschmidt return val; 379a3980bf5SBenjamin Herrenschmidt } 380a3980bf5SBenjamin Herrenschmidt 381a3980bf5SBenjamin Herrenschmidt static void opb_master_write(void *opaque, hwaddr addr, 382a3980bf5SBenjamin Herrenschmidt uint64_t val, unsigned size) 383a3980bf5SBenjamin Herrenschmidt { 384a3980bf5SBenjamin Herrenschmidt PnvLpcController *lpc = opaque; 385a3980bf5SBenjamin Herrenschmidt 386a3980bf5SBenjamin Herrenschmidt switch (addr) { 387a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_STAT: 388a3980bf5SBenjamin Herrenschmidt lpc->opb_irq_stat &= ~val; 3894d1df88bSBenjamin Herrenschmidt pnv_lpc_eval_irqs(lpc); 390a3980bf5SBenjamin Herrenschmidt break; 391a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_MASK: 392a3980bf5SBenjamin Herrenschmidt lpc->opb_irq_mask = val; 3934d1df88bSBenjamin Herrenschmidt pnv_lpc_eval_irqs(lpc); 394a3980bf5SBenjamin Herrenschmidt break; 395a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_POL: 396a3980bf5SBenjamin Herrenschmidt lpc->opb_irq_pol = val; 3974d1df88bSBenjamin Herrenschmidt pnv_lpc_eval_irqs(lpc); 398a3980bf5SBenjamin Herrenschmidt break; 399a3980bf5SBenjamin Herrenschmidt case OPB_MASTER_LS_IRQ_INPUT: 400a3980bf5SBenjamin Herrenschmidt /* Read only */ 401a3980bf5SBenjamin Herrenschmidt break; 402a3980bf5SBenjamin Herrenschmidt default: 403cdbaf8cdSCédric Le Goater qemu_log_mask(LOG_UNIMP, "OPBM: write on unimplemented register: 0x%" 404cdbaf8cdSCédric Le Goater HWADDR_PRIx " val=0x%08"PRIx64"\n", addr, val); 405a3980bf5SBenjamin Herrenschmidt } 406a3980bf5SBenjamin Herrenschmidt } 407a3980bf5SBenjamin Herrenschmidt 408a3980bf5SBenjamin Herrenschmidt static const MemoryRegionOps opb_master_ops = { 409a3980bf5SBenjamin Herrenschmidt .read = opb_master_read, 410a3980bf5SBenjamin Herrenschmidt .write = opb_master_write, 411a3980bf5SBenjamin Herrenschmidt .endianness = DEVICE_BIG_ENDIAN, 412a3980bf5SBenjamin Herrenschmidt .valid = { 413a3980bf5SBenjamin Herrenschmidt .min_access_size = 4, 414a3980bf5SBenjamin Herrenschmidt .max_access_size = 4, 415a3980bf5SBenjamin Herrenschmidt }, 416a3980bf5SBenjamin Herrenschmidt .impl = { 417a3980bf5SBenjamin Herrenschmidt .min_access_size = 4, 418a3980bf5SBenjamin Herrenschmidt .max_access_size = 4, 419a3980bf5SBenjamin Herrenschmidt }, 420a3980bf5SBenjamin Herrenschmidt }; 421a3980bf5SBenjamin Herrenschmidt 422a3980bf5SBenjamin Herrenschmidt static void pnv_lpc_realize(DeviceState *dev, Error **errp) 423a3980bf5SBenjamin Herrenschmidt { 424a3980bf5SBenjamin Herrenschmidt PnvLpcController *lpc = PNV_LPC(dev); 4254d1df88bSBenjamin Herrenschmidt Object *obj; 4264d1df88bSBenjamin Herrenschmidt Error *error = NULL; 427a3980bf5SBenjamin Herrenschmidt 428a3980bf5SBenjamin Herrenschmidt /* Reg inits */ 429a3980bf5SBenjamin Herrenschmidt lpc->lpc_hc_fw_rd_acc_size = LPC_HC_FW_RD_4B; 430a3980bf5SBenjamin Herrenschmidt 431a3980bf5SBenjamin Herrenschmidt /* Create address space and backing MR for the OPB bus */ 432a3980bf5SBenjamin Herrenschmidt memory_region_init(&lpc->opb_mr, OBJECT(dev), "lpc-opb", 0x100000000ull); 433a3980bf5SBenjamin Herrenschmidt address_space_init(&lpc->opb_as, &lpc->opb_mr, "lpc-opb"); 434a3980bf5SBenjamin Herrenschmidt 435a3980bf5SBenjamin Herrenschmidt /* Create ISA IO and Mem space regions which are the root of 436a3980bf5SBenjamin Herrenschmidt * the ISA bus (ie, ISA address spaces). We don't create a 437a3980bf5SBenjamin Herrenschmidt * separate one for FW which we alias to memory. 438a3980bf5SBenjamin Herrenschmidt */ 439a3980bf5SBenjamin Herrenschmidt memory_region_init(&lpc->isa_io, OBJECT(dev), "isa-io", ISA_IO_SIZE); 440a3980bf5SBenjamin Herrenschmidt memory_region_init(&lpc->isa_mem, OBJECT(dev), "isa-mem", ISA_MEM_SIZE); 441d61c2857SCédric Le Goater memory_region_init(&lpc->isa_fw, OBJECT(dev), "isa-fw", ISA_FW_SIZE); 442a3980bf5SBenjamin Herrenschmidt 443a3980bf5SBenjamin Herrenschmidt /* Create windows from the OPB space to the ISA space */ 444a3980bf5SBenjamin Herrenschmidt memory_region_init_alias(&lpc->opb_isa_io, OBJECT(dev), "lpc-isa-io", 445a3980bf5SBenjamin Herrenschmidt &lpc->isa_io, 0, LPC_IO_OPB_SIZE); 446a3980bf5SBenjamin Herrenschmidt memory_region_add_subregion(&lpc->opb_mr, LPC_IO_OPB_ADDR, 447a3980bf5SBenjamin Herrenschmidt &lpc->opb_isa_io); 448a3980bf5SBenjamin Herrenschmidt memory_region_init_alias(&lpc->opb_isa_mem, OBJECT(dev), "lpc-isa-mem", 449a3980bf5SBenjamin Herrenschmidt &lpc->isa_mem, 0, LPC_MEM_OPB_SIZE); 450a3980bf5SBenjamin Herrenschmidt memory_region_add_subregion(&lpc->opb_mr, LPC_MEM_OPB_ADDR, 451a3980bf5SBenjamin Herrenschmidt &lpc->opb_isa_mem); 452a3980bf5SBenjamin Herrenschmidt memory_region_init_alias(&lpc->opb_isa_fw, OBJECT(dev), "lpc-isa-fw", 453d61c2857SCédric Le Goater &lpc->isa_fw, 0, LPC_FW_OPB_SIZE); 454a3980bf5SBenjamin Herrenschmidt memory_region_add_subregion(&lpc->opb_mr, LPC_FW_OPB_ADDR, 455a3980bf5SBenjamin Herrenschmidt &lpc->opb_isa_fw); 456a3980bf5SBenjamin Herrenschmidt 457a3980bf5SBenjamin Herrenschmidt /* Create MMIO regions for LPC HC and OPB registers */ 458a3980bf5SBenjamin Herrenschmidt memory_region_init_io(&lpc->opb_master_regs, OBJECT(dev), &opb_master_ops, 459a3980bf5SBenjamin Herrenschmidt lpc, "lpc-opb-master", LPC_OPB_REGS_OPB_SIZE); 460a3980bf5SBenjamin Herrenschmidt memory_region_add_subregion(&lpc->opb_mr, LPC_OPB_REGS_OPB_ADDR, 461a3980bf5SBenjamin Herrenschmidt &lpc->opb_master_regs); 462a3980bf5SBenjamin Herrenschmidt memory_region_init_io(&lpc->lpc_hc_regs, OBJECT(dev), &lpc_hc_ops, lpc, 463a3980bf5SBenjamin Herrenschmidt "lpc-hc", LPC_HC_REGS_OPB_SIZE); 464a3980bf5SBenjamin Herrenschmidt memory_region_add_subregion(&lpc->opb_mr, LPC_HC_REGS_OPB_ADDR, 465a3980bf5SBenjamin Herrenschmidt &lpc->lpc_hc_regs); 466a3980bf5SBenjamin Herrenschmidt 467a3980bf5SBenjamin Herrenschmidt /* XScom region for LPC registers */ 468a3980bf5SBenjamin Herrenschmidt pnv_xscom_region_init(&lpc->xscom_regs, OBJECT(dev), 469a3980bf5SBenjamin Herrenschmidt &pnv_lpc_xscom_ops, lpc, "xscom-lpc", 470a3980bf5SBenjamin Herrenschmidt PNV_XSCOM_LPC_SIZE); 4714d1df88bSBenjamin Herrenschmidt 4724d1df88bSBenjamin Herrenschmidt /* get PSI object from chip */ 4734d1df88bSBenjamin Herrenschmidt obj = object_property_get_link(OBJECT(dev), "psi", &error); 4744d1df88bSBenjamin Herrenschmidt if (!obj) { 4754d1df88bSBenjamin Herrenschmidt error_setg(errp, "%s: required link 'psi' not found: %s", 4764d1df88bSBenjamin Herrenschmidt __func__, error_get_pretty(error)); 4774d1df88bSBenjamin Herrenschmidt return; 4784d1df88bSBenjamin Herrenschmidt } 4794d1df88bSBenjamin Herrenschmidt lpc->psi = PNV_PSI(obj); 480a3980bf5SBenjamin Herrenschmidt } 481a3980bf5SBenjamin Herrenschmidt 482a3980bf5SBenjamin Herrenschmidt static void pnv_lpc_class_init(ObjectClass *klass, void *data) 483a3980bf5SBenjamin Herrenschmidt { 484a3980bf5SBenjamin Herrenschmidt DeviceClass *dc = DEVICE_CLASS(klass); 485a3980bf5SBenjamin Herrenschmidt PnvXScomInterfaceClass *xdc = PNV_XSCOM_INTERFACE_CLASS(klass); 486a3980bf5SBenjamin Herrenschmidt 487b168a138SCédric Le Goater xdc->dt_xscom = pnv_lpc_dt_xscom; 488a3980bf5SBenjamin Herrenschmidt 489a3980bf5SBenjamin Herrenschmidt dc->realize = pnv_lpc_realize; 490a3980bf5SBenjamin Herrenschmidt } 491a3980bf5SBenjamin Herrenschmidt 492a3980bf5SBenjamin Herrenschmidt static const TypeInfo pnv_lpc_info = { 493a3980bf5SBenjamin Herrenschmidt .name = TYPE_PNV_LPC, 494a3980bf5SBenjamin Herrenschmidt .parent = TYPE_DEVICE, 495a3980bf5SBenjamin Herrenschmidt .instance_size = sizeof(PnvLpcController), 496a3980bf5SBenjamin Herrenschmidt .class_init = pnv_lpc_class_init, 497a3980bf5SBenjamin Herrenschmidt .interfaces = (InterfaceInfo[]) { 498a3980bf5SBenjamin Herrenschmidt { TYPE_PNV_XSCOM_INTERFACE }, 499a3980bf5SBenjamin Herrenschmidt { } 500a3980bf5SBenjamin Herrenschmidt } 501a3980bf5SBenjamin Herrenschmidt }; 502a3980bf5SBenjamin Herrenschmidt 503a3980bf5SBenjamin Herrenschmidt static void pnv_lpc_register_types(void) 504a3980bf5SBenjamin Herrenschmidt { 505a3980bf5SBenjamin Herrenschmidt type_register_static(&pnv_lpc_info); 506a3980bf5SBenjamin Herrenschmidt } 507a3980bf5SBenjamin Herrenschmidt 508a3980bf5SBenjamin Herrenschmidt type_init(pnv_lpc_register_types) 5094d1df88bSBenjamin Herrenschmidt 5104d1df88bSBenjamin Herrenschmidt /* If we don't use the built-in LPC interrupt deserializer, we need 5114d1df88bSBenjamin Herrenschmidt * to provide a set of qirqs for the ISA bus or things will go bad. 5124d1df88bSBenjamin Herrenschmidt * 5134d1df88bSBenjamin Herrenschmidt * Most machines using pre-Naples chips (without said deserializer) 5144d1df88bSBenjamin Herrenschmidt * have a CPLD that will collect the SerIRQ and shoot them as a 5154d1df88bSBenjamin Herrenschmidt * single level interrupt to the P8 chip. So let's setup a hook 5164d1df88bSBenjamin Herrenschmidt * for doing just that. 5174d1df88bSBenjamin Herrenschmidt */ 5184d1df88bSBenjamin Herrenschmidt static void pnv_lpc_isa_irq_handler_cpld(void *opaque, int n, int level) 5194d1df88bSBenjamin Herrenschmidt { 520b168a138SCédric Le Goater PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); 5214d1df88bSBenjamin Herrenschmidt uint32_t old_state = pnv->cpld_irqstate; 5224d1df88bSBenjamin Herrenschmidt PnvLpcController *lpc = PNV_LPC(opaque); 5234d1df88bSBenjamin Herrenschmidt 5244d1df88bSBenjamin Herrenschmidt if (level) { 5254d1df88bSBenjamin Herrenschmidt pnv->cpld_irqstate |= 1u << n; 5264d1df88bSBenjamin Herrenschmidt } else { 5274d1df88bSBenjamin Herrenschmidt pnv->cpld_irqstate &= ~(1u << n); 5284d1df88bSBenjamin Herrenschmidt } 5294d1df88bSBenjamin Herrenschmidt 5304d1df88bSBenjamin Herrenschmidt if (pnv->cpld_irqstate != old_state) { 5314d1df88bSBenjamin Herrenschmidt pnv_psi_irq_set(lpc->psi, PSIHB_IRQ_EXTERNAL, pnv->cpld_irqstate != 0); 5324d1df88bSBenjamin Herrenschmidt } 5334d1df88bSBenjamin Herrenschmidt } 5344d1df88bSBenjamin Herrenschmidt 5354d1df88bSBenjamin Herrenschmidt static void pnv_lpc_isa_irq_handler(void *opaque, int n, int level) 5364d1df88bSBenjamin Herrenschmidt { 5374d1df88bSBenjamin Herrenschmidt PnvLpcController *lpc = PNV_LPC(opaque); 5384d1df88bSBenjamin Herrenschmidt 5394d1df88bSBenjamin Herrenschmidt /* The Naples HW latches the 1 levels, clearing is done by SW */ 5404d1df88bSBenjamin Herrenschmidt if (level) { 5414d1df88bSBenjamin Herrenschmidt lpc->lpc_hc_irqstat |= LPC_HC_IRQ_SERIRQ0 >> n; 5424d1df88bSBenjamin Herrenschmidt pnv_lpc_eval_irqs(lpc); 5434d1df88bSBenjamin Herrenschmidt } 5444d1df88bSBenjamin Herrenschmidt } 5454d1df88bSBenjamin Herrenschmidt 54604026890SCédric Le Goater ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp) 5474d1df88bSBenjamin Herrenschmidt { 54804026890SCédric Le Goater Error *local_err = NULL; 54904026890SCédric Le Goater ISABus *isa_bus; 55004026890SCédric Le Goater qemu_irq *irqs; 55104026890SCédric Le Goater qemu_irq_handler handler; 55204026890SCédric Le Goater 55304026890SCédric Le Goater /* let isa_bus_new() create its own bridge on SysBus otherwise 55404026890SCédric Le Goater * devices speficied on the command line won't find the bus and 55504026890SCédric Le Goater * will fail to create. 55604026890SCédric Le Goater */ 55704026890SCédric Le Goater isa_bus = isa_bus_new(NULL, &lpc->isa_mem, &lpc->isa_io, &local_err); 55804026890SCédric Le Goater if (local_err) { 55904026890SCédric Le Goater error_propagate(errp, local_err); 56004026890SCédric Le Goater return NULL; 56104026890SCédric Le Goater } 56204026890SCédric Le Goater 5634d1df88bSBenjamin Herrenschmidt /* Not all variants have a working serial irq decoder. If not, 5644d1df88bSBenjamin Herrenschmidt * handling of LPC interrupts becomes a platform issue (some 5654d1df88bSBenjamin Herrenschmidt * platforms have a CPLD to do it). 5664d1df88bSBenjamin Herrenschmidt */ 56704026890SCédric Le Goater if (use_cpld) { 56804026890SCédric Le Goater handler = pnv_lpc_isa_irq_handler_cpld; 5694d1df88bSBenjamin Herrenschmidt } else { 57004026890SCédric Le Goater handler = pnv_lpc_isa_irq_handler; 5714d1df88bSBenjamin Herrenschmidt } 57204026890SCédric Le Goater 57304026890SCédric Le Goater irqs = qemu_allocate_irqs(handler, lpc, ISA_NUM_IRQS); 57404026890SCédric Le Goater 57504026890SCédric Le Goater isa_bus_irqs(isa_bus, irqs); 57604026890SCédric Le Goater return isa_bus; 5774d1df88bSBenjamin Herrenschmidt } 578