1 2 /* 3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator 4 * 5 * Copyright (c) 2004-2007 Fabrice Bellard 6 * Copyright (c) 2007 Jocelyn Mayer 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 */ 26 27 #include "qemu/osdep.h" 28 #include "qemu/datadir.h" 29 #include "qemu/units.h" 30 #include "qapi/error.h" 31 #include "hw/ppc/ppc.h" 32 #include "hw/qdev-properties.h" 33 #include "hw/boards.h" 34 #include "hw/input/adb.h" 35 #include "sysemu/sysemu.h" 36 #include "net/net.h" 37 #include "hw/isa/isa.h" 38 #include "hw/pci/pci.h" 39 #include "hw/pci/pci_host.h" 40 #include "hw/pci-host/grackle.h" 41 #include "hw/nvram/fw_cfg.h" 42 #include "hw/char/escc.h" 43 #include "hw/misc/macio/macio.h" 44 #include "hw/loader.h" 45 #include "hw/fw-path-provider.h" 46 #include "elf.h" 47 #include "qemu/error-report.h" 48 #include "sysemu/kvm.h" 49 #include "sysemu/reset.h" 50 #include "kvm_ppc.h" 51 52 #define MAX_IDE_BUS 2 53 #define CFG_ADDR 0xf0000510 54 #define TBFREQ 16600000UL 55 #define CLOCKFREQ 266000000UL 56 #define BUSFREQ 66000000UL 57 58 #define NDRV_VGA_FILENAME "qemu_vga.ndrv" 59 60 #define PROM_FILENAME "openbios-ppc" 61 #define PROM_BASE 0xffc00000 62 #define PROM_SIZE (4 * MiB) 63 64 #define KERNEL_LOAD_ADDR 0x01000000 65 #define KERNEL_GAP 0x00100000 66 67 #define GRACKLE_BASE 0xfec00000 68 69 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 70 Error **errp) 71 { 72 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 73 } 74 75 static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 76 { 77 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; 78 } 79 80 static void ppc_heathrow_reset(void *opaque) 81 { 82 PowerPCCPU *cpu = opaque; 83 84 cpu_reset(CPU(cpu)); 85 } 86 87 static void ppc_heathrow_init(MachineState *machine) 88 { 89 const char *bios_name = machine->firmware ?: PROM_FILENAME; 90 PowerPCCPU *cpu = NULL; 91 CPUPPCState *env = NULL; 92 char *filename; 93 int i, bios_size = -1; 94 MemoryRegion *bios = g_new(MemoryRegion, 1); 95 uint64_t bios_addr; 96 uint32_t kernel_base = 0, initrd_base = 0, cmdline_base = 0; 97 int32_t kernel_size = 0, initrd_size = 0; 98 PCIBus *pci_bus; 99 Object *macio; 100 MACIOIDEState *macio_ide; 101 SysBusDevice *s; 102 DeviceState *dev, *pic_dev, *grackle_dev; 103 BusState *adb_bus; 104 uint16_t ppc_boot_device; 105 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 106 void *fw_cfg; 107 uint64_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TBFREQ; 108 109 /* init CPUs */ 110 for (i = 0; i < machine->smp.cpus; i++) { 111 cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); 112 env = &cpu->env; 113 114 /* Set time-base frequency to 16.6 Mhz */ 115 cpu_ppc_tb_init(env, TBFREQ); 116 qemu_register_reset(ppc_heathrow_reset, cpu); 117 } 118 119 /* allocate RAM */ 120 if (machine->ram_size > 2047 * MiB) { 121 error_report("Too much memory for this machine: %" PRId64 " MB, " 122 "maximum 2047 MB", machine->ram_size / MiB); 123 exit(1); 124 } 125 126 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 127 128 /* allocate and load firmware ROM */ 129 memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE, 130 &error_fatal); 131 memory_region_add_subregion(get_system_memory(), PROM_BASE, bios); 132 133 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 134 if (filename) { 135 /* Load OpenBIOS (ELF) */ 136 bios_size = load_elf(filename, NULL, NULL, NULL, NULL, &bios_addr, 137 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); 138 /* Unfortunately, load_elf sign-extends reading elf32 */ 139 bios_addr = (uint32_t)bios_addr; 140 141 if (bios_size <= 0) { 142 /* or if could not load ELF try loading a binary ROM image */ 143 bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE); 144 bios_addr = PROM_BASE; 145 } 146 g_free(filename); 147 } 148 if (bios_size < 0 || bios_addr - PROM_BASE + bios_size > PROM_SIZE) { 149 error_report("could not load PowerPC bios '%s'", bios_name); 150 exit(1); 151 } 152 153 if (machine->kernel_filename) { 154 int bswap_needed = 0; 155 156 #ifdef BSWAP_NEEDED 157 bswap_needed = 1; 158 #endif 159 kernel_base = KERNEL_LOAD_ADDR; 160 kernel_size = load_elf(machine->kernel_filename, NULL, 161 translate_kernel_address, NULL, NULL, NULL, 162 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); 163 if (kernel_size < 0) 164 kernel_size = load_aout(machine->kernel_filename, kernel_base, 165 machine->ram_size - kernel_base, 166 bswap_needed, TARGET_PAGE_SIZE); 167 if (kernel_size < 0) 168 kernel_size = load_image_targphys(machine->kernel_filename, 169 kernel_base, 170 machine->ram_size - kernel_base); 171 if (kernel_size < 0) { 172 error_report("could not load kernel '%s'", 173 machine->kernel_filename); 174 exit(1); 175 } 176 /* load initrd */ 177 if (machine->initrd_filename) { 178 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + 179 KERNEL_GAP); 180 initrd_size = load_image_targphys(machine->initrd_filename, 181 initrd_base, 182 machine->ram_size - initrd_base); 183 if (initrd_size < 0) { 184 error_report("could not load initial ram disk '%s'", 185 machine->initrd_filename); 186 exit(1); 187 } 188 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); 189 } else { 190 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); 191 } 192 ppc_boot_device = 'm'; 193 } else { 194 ppc_boot_device = '\0'; 195 for (i = 0; machine->boot_config.order[i] != '\0'; i++) { 196 /* 197 * TOFIX: for now, the second IDE channel is not properly 198 * used by OHW. The Mac floppy disk are not emulated. 199 * For now, OHW cannot boot from the network. 200 */ 201 #if 0 202 if (machine->boot_config.order[i] >= 'a' && 203 machine->boot_config.order[i] <= 'f') { 204 ppc_boot_device = machine->boot_config.order[i]; 205 break; 206 } 207 #else 208 if (machine->boot_config.order[i] >= 'c' && 209 machine->boot_config.order[i] <= 'd') { 210 ppc_boot_device = machine->boot_config.order[i]; 211 break; 212 } 213 #endif 214 } 215 if (ppc_boot_device == '\0') { 216 error_report("No valid boot device for G3 Beige machine"); 217 exit(1); 218 } 219 } 220 221 /* Grackle PCI host bridge */ 222 grackle_dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE); 223 qdev_prop_set_uint32(grackle_dev, "ofw-addr", 0x80000000); 224 s = SYS_BUS_DEVICE(grackle_dev); 225 sysbus_realize_and_unref(s, &error_fatal); 226 227 sysbus_mmio_map(s, 0, GRACKLE_BASE); 228 sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000); 229 /* PCI hole */ 230 memory_region_add_subregion(get_system_memory(), 0x80000000ULL, 231 sysbus_mmio_get_region(s, 2)); 232 /* Register 2 MB of ISA IO space */ 233 memory_region_add_subregion(get_system_memory(), 0xfe000000, 234 sysbus_mmio_get_region(s, 3)); 235 236 pci_bus = PCI_HOST_BRIDGE(grackle_dev)->bus; 237 238 /* MacIO */ 239 macio = OBJECT(pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO)); 240 qdev_prop_set_uint64(DEVICE(macio), "frequency", tbfreq); 241 242 dev = DEVICE(object_resolve_path_component(macio, "escc")); 243 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 244 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 245 246 pci_realize_and_unref(PCI_DEVICE(macio), pci_bus, &error_fatal); 247 248 pic_dev = DEVICE(object_resolve_path_component(macio, "pic")); 249 for (i = 0; i < 4; i++) { 250 qdev_connect_gpio_out(grackle_dev, i, 251 qdev_get_gpio_in(pic_dev, 0x15 + i)); 252 } 253 254 /* Connect the heathrow PIC outputs to the 6xx bus */ 255 for (i = 0; i < machine->smp.cpus; i++) { 256 switch (PPC_INPUT(env)) { 257 case PPC_FLAGS_INPUT_6xx: 258 /* XXX: we register only 1 output pin for heathrow PIC */ 259 qdev_connect_gpio_out(pic_dev, 0, 260 qdev_get_gpio_in(DEVICE(cpu), PPC6xx_INPUT_INT)); 261 break; 262 default: 263 error_report("Bus model not supported on OldWorld Mac machine"); 264 exit(1); 265 } 266 } 267 268 pci_vga_init(pci_bus); 269 270 for (i = 0; i < nb_nics; i++) { 271 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); 272 } 273 274 /* MacIO IDE */ 275 ide_drive_get(hd, ARRAY_SIZE(hd)); 276 macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[0]")); 277 macio_ide_init_drives(macio_ide, hd); 278 279 macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[1]")); 280 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); 281 282 /* MacIO CUDA/ADB */ 283 dev = DEVICE(object_resolve_path_component(macio, "cuda")); 284 adb_bus = qdev_get_child_bus(dev, "adb.0"); 285 dev = qdev_new(TYPE_ADB_KEYBOARD); 286 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 287 dev = qdev_new(TYPE_ADB_MOUSE); 288 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 289 290 if (machine_usb(machine)) { 291 pci_create_simple(pci_bus, -1, "pci-ohci"); 292 } 293 294 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) 295 graphic_depth = 15; 296 297 /* No PCI init: the BIOS will do it */ 298 299 dev = qdev_new(TYPE_FW_CFG_MEM); 300 fw_cfg = FW_CFG(dev); 301 qdev_prop_set_uint32(dev, "data_width", 1); 302 qdev_prop_set_bit(dev, "dma_enabled", false); 303 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, 304 OBJECT(fw_cfg)); 305 s = SYS_BUS_DEVICE(dev); 306 sysbus_realize_and_unref(s, &error_fatal); 307 sysbus_mmio_map(s, 0, CFG_ADDR); 308 sysbus_mmio_map(s, 1, CFG_ADDR + 2); 309 310 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus); 311 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus); 312 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); 313 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW); 314 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); 315 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); 316 if (machine->kernel_cmdline) { 317 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); 318 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, 319 machine->kernel_cmdline); 320 } else { 321 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); 322 } 323 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); 324 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 325 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); 326 327 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); 328 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); 329 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); 330 331 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); 332 if (kvm_enabled()) { 333 uint8_t *hypercall; 334 335 hypercall = g_malloc(16); 336 kvmppc_get_hypercall(env, hypercall, 16); 337 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); 338 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); 339 } 340 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); 341 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ 342 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); 343 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); 344 345 /* MacOS NDRV VGA driver */ 346 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); 347 if (filename) { 348 gchar *ndrv_file; 349 gsize ndrv_size; 350 351 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) { 352 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); 353 } 354 g_free(filename); 355 } 356 357 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 358 } 359 360 /* 361 * Implementation of an interface to adjust firmware path 362 * for the bootindex property handling. 363 */ 364 static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus, 365 DeviceState *dev) 366 { 367 PCIDevice *pci; 368 MACIOIDEState *macio_ide; 369 370 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) { 371 pci = PCI_DEVICE(dev); 372 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn)); 373 } 374 375 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) { 376 macio_ide = MACIO_IDE(dev); 377 return g_strdup_printf("ata-3@%x", macio_ide->addr); 378 } 379 380 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) { 381 return g_strdup("disk"); 382 } 383 384 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) { 385 return g_strdup("cdrom"); 386 } 387 388 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) { 389 return g_strdup("disk"); 390 } 391 392 return NULL; 393 } 394 395 static int heathrow_kvm_type(MachineState *machine, const char *arg) 396 { 397 /* Always force PR KVM */ 398 return 2; 399 } 400 401 static void heathrow_class_init(ObjectClass *oc, void *data) 402 { 403 MachineClass *mc = MACHINE_CLASS(oc); 404 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc); 405 406 mc->desc = "Heathrow based PowerMAC"; 407 mc->init = ppc_heathrow_init; 408 mc->block_default_type = IF_IDE; 409 /* SMP is not supported currently */ 410 mc->max_cpus = 1; 411 #ifndef TARGET_PPC64 412 mc->is_default = true; 413 #endif 414 /* TOFIX "cad" when Mac floppy is implemented */ 415 mc->default_boot_order = "cd"; 416 mc->kvm_type = heathrow_kvm_type; 417 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1"); 418 mc->default_display = "std"; 419 mc->ignore_boot_device_suffixes = true; 420 mc->default_ram_id = "ppc_heathrow.ram"; 421 fwc->get_dev_path = heathrow_fw_dev_path; 422 } 423 424 static const TypeInfo ppc_heathrow_machine_info = { 425 .name = MACHINE_TYPE_NAME("g3beige"), 426 .parent = TYPE_MACHINE, 427 .class_init = heathrow_class_init, 428 .interfaces = (InterfaceInfo[]) { 429 { TYPE_FW_PATH_PROVIDER }, 430 { } 431 }, 432 }; 433 434 static void ppc_heathrow_register_types(void) 435 { 436 type_register_static(&ppc_heathrow_machine_info); 437 } 438 439 type_init(ppc_heathrow_register_types); 440