1 #include "qemu/osdep.h" 2 #include "hw/pci/slotid_cap.h" 3 #include "hw/pci/pci.h" 4 #include "qemu/error-report.h" 5 #include "qapi/error.h" 6 7 #define SLOTID_CAP_LENGTH 4 8 #define SLOTID_NSLOTS_SHIFT ctz32(PCI_SID_ESR_NSLOTS) 9 10 int slotid_cap_init(PCIDevice *d, int nslots, 11 uint8_t chassis, 12 unsigned offset) 13 { 14 int cap; 15 Error *local_err = NULL; 16 17 if (!chassis) { 18 error_report("Bridge chassis not specified. Each bridge is required " 19 "to be assigned a unique chassis id > 0."); 20 return -EINVAL; 21 } 22 if (nslots < 0 || nslots > (PCI_SID_ESR_NSLOTS >> SLOTID_NSLOTS_SHIFT)) { 23 /* TODO: error report? */ 24 return -EINVAL; 25 } 26 27 cap = pci_add_capability(d, PCI_CAP_ID_SLOTID, offset, 28 SLOTID_CAP_LENGTH, &local_err); 29 if (cap < 0) { 30 error_report_err(local_err); 31 return cap; 32 } 33 /* We make each chassis unique, this way each bridge is First in Chassis */ 34 d->config[cap + PCI_SID_ESR] = PCI_SID_ESR_FIC | 35 (nslots << SLOTID_NSLOTS_SHIFT); 36 d->cmask[cap + PCI_SID_ESR] = 0xff; 37 d->config[cap + PCI_SID_CHASSIS_NR] = chassis; 38 /* Note: Chassis number register is non-volatile, 39 so we don't reset it. */ 40 /* TODO: store in eeprom? */ 41 d->wmask[cap + PCI_SID_CHASSIS_NR] = 0xff; 42 43 d->cap_present |= QEMU_PCI_CAP_SLOTID; 44 return 0; 45 } 46 47 void slotid_cap_cleanup(PCIDevice *d) 48 { 49 /* TODO: cleanup config space? */ 50 d->cap_present &= ~QEMU_PCI_CAP_SLOTID; 51 } 52