xref: /qemu/hw/pci-host/trace-events (revision 3d54cbf269d63ff1d500b35b2bcf4565ff8ad485)
1d0fb9657SStefano Garzarella# See docs/devel/tracing.rst for syntax documentation.
2bfec08b5SMark Cave-Ayland
3300491f9SPhilippe Mathieu-Daudé# bonito.c
4300491f9SPhilippe Mathieu-Daudébonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address is smaller then 32-bit, addr: 0x%"PRIx64", size: %u"
5300491f9SPhilippe Mathieu-Daudé
6500016e5SMarkus Armbruster# grackle.c
7b728fbbcSMark Cave-Aylandgrackle_set_irq(int irq_num, int level) "set_irq num %d level %d"
8b728fbbcSMark Cave-Ayland
9a7db759eSPhilippe Mathieu-Daudé# gt64120.c
10a7db759eSPhilippe Mathieu-Daudégt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" value:0x%08" PRIx64
11a7db759eSPhilippe Mathieu-Daudégt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" value:0x%08" PRIx64
12a7db759eSPhilippe Mathieu-Daudégt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 read %s size:%u value:0x%08" PRIx64
13a7db759eSPhilippe Mathieu-Daudégt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 write %s size:%u value:0x%08" PRIx64
14a7db759eSPhilippe Mathieu-Daudégt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64
15a7db759eSPhilippe Mathieu-Daudé
16dcdf98a9SBALATON Zoltan# mv64361.c
17dcdf98a9SBALATON Zoltanmv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64
18dcdf98a9SBALATON Zoltanmv64361_region_enable(const char *op, int num) "Should %s region %d"
19dcdf98a9SBALATON Zoltanmv64361_reg_read(uint64_t addr, uint32_t val) "0x%"PRIx64" -> 0x%x"
20dcdf98a9SBALATON Zoltanmv64361_reg_write(uint64_t addr, uint64_t val) "0x%"PRIx64" <- 0x%"PRIx64
21dcdf98a9SBALATON Zoltan
22500016e5SMarkus Armbruster# sabre.c
23bfec08b5SMark Cave-Aylandsabre_set_request(int irq_num) "request irq %d"
24bfec08b5SMark Cave-Aylandsabre_clear_request(int irq_num) "clear request irq %d"
25bfec08b5SMark Cave-Aylandsabre_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64
26bfec08b5SMark Cave-Aylandsabre_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64
27bfec08b5SMark Cave-Aylandsabre_pci_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64
28bfec08b5SMark Cave-Aylandsabre_pci_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64
29bfec08b5SMark Cave-Aylandsabre_pci_set_irq(int irq_num, int level) "set irq_in %d level %d"
30bfec08b5SMark Cave-Aylandsabre_pci_set_obio_irq(int irq_num, int level) "set irq %d level %d"
310b0c5e90SMark Cave-Ayland
32500016e5SMarkus Armbruster# uninorth.c
330b0c5e90SMark Cave-Aylandunin_set_irq(int irq_num, int level) "setting INT %d = %d"
340b0c5e90SMark Cave-Aylandunin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32
350b0c5e90SMark Cave-Aylandunin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64
360b0c5e90SMark Cave-Aylandunin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64
370662946aSMark Cave-Aylandunin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
380662946aSMark Cave-Aylandunin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
392cfc9f1aSCédric Le Goater
4055abb29eSPhilippe Mathieu-Daudé# ppc4xx_pci.c
4155abb29eSPhilippe Mathieu-Daudéppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
4255abb29eSPhilippe Mathieu-Daudéppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
4355abb29eSPhilippe Mathieu-Daudé
44*22dc8a47SPhilippe Mathieu-Daudé# ppc440_pcix.c
45*22dc8a47SPhilippe Mathieu-Daudéppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
46*22dc8a47SPhilippe Mathieu-Daudéppc440_pcix_set_irq(int irq_num) "PCI irq %d"
47*22dc8a47SPhilippe Mathieu-Daudéppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64
48*22dc8a47SPhilippe Mathieu-Daudéppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64
49*22dc8a47SPhilippe Mathieu-Daudéppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32
50*22dc8a47SPhilippe Mathieu-Daudéppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32
51*22dc8a47SPhilippe Mathieu-Daudé
522cfc9f1aSCédric Le Goater# pnv_phb4.c
532cfc9f1aSCédric Le Goaterpnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64
5434b0696bSCédric Le Goaterpnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) "addr=@0x%"PRIx64" data=0x%"PRIx64
5534b0696bSCédric Le Goaterpnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64
560db9350eSMark Cave-Ayland
570db9350eSMark Cave-Ayland# dino.c
580db9350eSMark Cave-Aylanddino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d"
590db9350eSMark Cave-Aylanddino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x"
600db9350eSMark Cave-Aylanddino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x"
61e029bb00SHelge Deller
62e029bb00SHelge Deller# astro.c
63e029bb00SHelge Dellerastro_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d"
64e029bb00SHelge Dellerastro_chip_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
65e029bb00SHelge Dellerastro_chip_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
66e029bb00SHelge Dellerelroy_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
67e029bb00SHelge Dellerelroy_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
68e029bb00SHelge Dellerelroy_pci_config_data_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
69e029bb00SHelge Dellerelroy_pci_config_data_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
70e029bb00SHelge Delleriosapic_reg_write(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64
71e029bb00SHelge Delleriosapic_reg_read(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64
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