1 #ifndef HW_TULIP_H 2 #define HW_TULIP_H 3 4 #include "qemu/units.h" 5 #include "net/net.h" 6 #include "qom/object.h" 7 8 #define TYPE_TULIP "tulip" 9 typedef struct TULIPState TULIPState; 10 #define TULIP(obj) OBJECT_CHECK(TULIPState, (obj), TYPE_TULIP) 11 12 #define CSR(_x) ((_x) << 3) 13 14 #define CSR0_SWR BIT(0) 15 #define CSR0_BAR BIT(1) 16 #define CSR0_DSL_SHIFT 2 17 #define CSR0_DSL_MASK 0x1f 18 #define CSR0_BLE BIT(7) 19 #define CSR0_PBL_SHIFT 8 20 #define CSR0_PBL_MASK 0x3f 21 #define CSR0_CAC_SHIFT 14 22 #define CSR0_CAC_MASK 0x3 23 #define CSR0_DAS 0x10000 24 #define CSR0_TAP_SHIFT 17 25 #define CSR0_TAP_MASK 0x7 26 #define CSR0_DBO 0x100000 27 #define CSR1_TPD 0x01 28 #define CSR0_RLE BIT(23) 29 #define CSR0_WIE BIT(24) 30 31 #define CSR2_RPD 0x01 32 33 #define CSR5_TI BIT(0) 34 #define CSR5_TPS BIT(1) 35 #define CSR5_TU BIT(2) 36 #define CSR5_TJT BIT(3) 37 #define CSR5_LNP_ANC BIT(4) 38 #define CSR5_UNF BIT(5) 39 #define CSR5_RI BIT(6) 40 #define CSR5_RU BIT(7) 41 #define CSR5_RPS BIT(8) 42 #define CSR5_RWT BIT(9) 43 #define CSR5_ETI BIT(10) 44 #define CSR5_GTE BIT(11) 45 #define CSR5_LNF BIT(12) 46 #define CSR5_FBE BIT(13) 47 #define CSR5_ERI BIT(14) 48 #define CSR5_AIS BIT(15) 49 #define CSR5_NIS BIT(16) 50 #define CSR5_RS_SHIFT 17 51 #define CSR5_RS_MASK 7 52 #define CSR5_TS_SHIFT 20 53 #define CSR5_TS_MASK 7 54 55 #define CSR5_TS_STOPPED 0 56 #define CSR5_TS_RUNNING_FETCH 1 57 #define CSR5_TS_RUNNING_WAIT_EOT 2 58 #define CSR5_TS_RUNNING_READ_BUF 3 59 #define CSR5_TS_RUNNING_SETUP 5 60 #define CSR5_TS_SUSPENDED 6 61 #define CSR5_TS_RUNNING_CLOSE 7 62 63 #define CSR5_RS_STOPPED 0 64 #define CSR5_RS_RUNNING_FETCH 1 65 #define CSR5_RS_RUNNING_CHECK_EOR 2 66 #define CSR5_RS_RUNNING_WAIT_RECEIVE 3 67 #define CSR5_RS_SUSPENDED 4 68 #define CSR5_RS_RUNNING_CLOSE 5 69 #define CSR5_RS_RUNNING_FLUSH 6 70 #define CSR5_RS_RUNNING_QUEUE 7 71 72 #define CSR5_EB_SHIFT 23 73 #define CSR5_EB_MASK 7 74 75 #define CSR5_GPI BIT(26) 76 #define CSR5_LC BIT(27) 77 78 #define CSR6_HP BIT(0) 79 #define CSR6_SR BIT(1) 80 #define CSR6_HO BIT(2) 81 #define CSR6_PB BIT(3) 82 #define CSR6_IF BIT(4) 83 #define CSR6_SB BIT(5) 84 #define CSR6_PR BIT(6) 85 #define CSR6_PM BIT(7) 86 #define CSR6_FKD BIT(8) 87 #define CSR6_FD BIT(9) 88 89 #define CSR6_OM_SHIFT 10 90 #define CSR6_OM_MASK 3 91 #define CSR6_OM_NORMAL 0 92 #define CSR6_OM_INT_LOOPBACK 1 93 #define CSR6_OM_EXT_LOOPBACK 2 94 95 #define CSR6_FC BIT(12) 96 #define CSR6_ST BIT(13) 97 98 99 #define CSR6_TR_SHIFT 14 100 #define CSR6_TR_MASK 3 101 #define CSR6_TR_72 0 102 #define CSR6_TR_96 1 103 #define CSR6_TR_128 2 104 #define CSR6_TR_160 3 105 106 #define CSR6_CA BIT(17) 107 #define CSR6_RA BIT(30) 108 #define CSR6_SC BIT(31) 109 110 #define CSR7_TIM BIT(0) 111 #define CSR7_TSM BIT(1) 112 #define CSR7_TUM BIT(2) 113 #define CSR7_TJM BIT(3) 114 #define CSR7_LPM BIT(4) 115 #define CSR7_UNM BIT(5) 116 #define CSR7_RIM BIT(6) 117 #define CSR7_RUM BIT(7) 118 #define CSR7_RSM BIT(8) 119 #define CSR7_RWM BIT(9) 120 #define CSR7_TMM BIT(11) 121 #define CSR7_LFM BIT(12) 122 #define CSR7_SEM BIT(13) 123 #define CSR7_ERM BIT(14) 124 #define CSR7_AIM BIT(15) 125 #define CSR7_NIM BIT(16) 126 127 #define CSR8_MISSED_FRAME_OVL BIT(16) 128 #define CSR8_MISSED_FRAME_CNT_MASK 0xffff 129 130 #define CSR9_DATA_MASK 0xff 131 #define CSR9_SR_CS BIT(0) 132 #define CSR9_SR_SK BIT(1) 133 #define CSR9_SR_DI BIT(2) 134 #define CSR9_SR_DO BIT(3) 135 #define CSR9_REG BIT(10) 136 #define CSR9_SR BIT(11) 137 #define CSR9_BR BIT(12) 138 #define CSR9_WR BIT(13) 139 #define CSR9_RD BIT(14) 140 #define CSR9_MOD BIT(15) 141 #define CSR9_MDC BIT(16) 142 #define CSR9_MDO BIT(17) 143 #define CSR9_MII BIT(18) 144 #define CSR9_MDI BIT(19) 145 146 #define CSR11_CON BIT(16) 147 #define CSR11_TIMER_MASK 0xffff 148 149 #define CSR12_MRA BIT(0) 150 #define CSR12_LS100 BIT(1) 151 #define CSR12_LS10 BIT(2) 152 #define CSR12_APS BIT(3) 153 #define CSR12_ARA BIT(8) 154 #define CSR12_TRA BIT(9) 155 #define CSR12_NSN BIT(10) 156 #define CSR12_TRF BIT(11) 157 #define CSR12_ANS_SHIFT 12 158 #define CSR12_ANS_MASK 7 159 #define CSR12_LPN BIT(15) 160 #define CSR12_LPC_SHIFT 16 161 #define CSR12_LPC_MASK 0xffff 162 163 #define CSR13_SRL BIT(0) 164 #define CSR13_CAC BIT(2) 165 #define CSR13_AUI BIT(3) 166 #define CSR13_SDM_SHIFT 4 167 #define CSR13_SDM_MASK 0xfff 168 169 #define CSR14_ECEN BIT(0) 170 #define CSR14_LBK BIT(1) 171 #define CSR14_DREN BIT(2) 172 #define CSR14_LSE BIT(3) 173 #define CSR14_CPEN_SHIFT 4 174 #define CSR14_CPEN_MASK 3 175 #define CSR14_MBO BIT(6) 176 #define CSR14_ANE BIT(7) 177 #define CSR14_RSQ BIT(8) 178 #define CSR14_CSQ BIT(9) 179 #define CSR14_CLD BIT(10) 180 #define CSR14_SQE BIT(11) 181 #define CSR14_LTE BIT(12) 182 #define CSR14_APE BIT(13) 183 #define CSR14_SPP BIT(14) 184 #define CSR14_TAS BIT(15) 185 186 #define CSR15_JBD BIT(0) 187 #define CSR15_HUJ BIT(1) 188 #define CSR15_JCK BIT(2) 189 #define CSR15_ABM BIT(3) 190 #define CSR15_RWD BIT(4) 191 #define CSR15_RWR BIT(5) 192 #define CSR15_LE1 BIT(6) 193 #define CSR15_LV1 BIT(7) 194 #define CSR15_TSCK BIT(8) 195 #define CSR15_FUSQ BIT(9) 196 #define CSR15_FLF BIT(10) 197 #define CSR15_LSD BIT(11) 198 #define CSR15_DPST BIT(12) 199 #define CSR15_FRL BIT(13) 200 #define CSR15_LE2 BIT(14) 201 #define CSR15_LV2 BIT(15) 202 203 #define RDES0_OF BIT(0) 204 #define RDES0_CE BIT(1) 205 #define RDES0_DB BIT(2) 206 #define RDES0_RJ BIT(4) 207 #define RDES0_FT BIT(5) 208 #define RDES0_CS BIT(6) 209 #define RDES0_TL BIT(7) 210 #define RDES0_LS BIT(8) 211 #define RDES0_FS BIT(9) 212 #define RDES0_MF BIT(10) 213 #define RDES0_RF BIT(11) 214 #define RDES0_DT_SHIFT 12 215 #define RDES0_DT_MASK 3 216 #define RDES0_DE BIT(14) 217 #define RDES0_ES BIT(15) 218 #define RDES0_FL_SHIFT 16 219 #define RDES0_FL_MASK 0x3fff 220 #define RDES0_FF BIT(30) 221 #define RDES0_OWN BIT(31) 222 223 #define RDES1_BUF1_SIZE_SHIFT 0 224 #define RDES1_BUF1_SIZE_MASK 0x7ff 225 226 #define RDES1_BUF2_SIZE_SHIFT 11 227 #define RDES1_BUF2_SIZE_MASK 0x7ff 228 #define RDES1_RCH BIT(24) 229 #define RDES1_RER BIT(25) 230 231 #define TDES0_DE BIT(0) 232 #define TDES0_UF BIT(1) 233 #define TDES0_LF BIT(2) 234 #define TDES0_CC_SHIFT 3 235 #define TDES0_CC_MASK 0xf 236 #define TDES0_HF BIT(7) 237 #define TDES0_EC BIT(8) 238 #define TDES0_LC BIT(9) 239 #define TDES0_NC BIT(10) 240 #define TDES0_LO BIT(11) 241 #define TDES0_TO BIT(14) 242 #define TDES0_ES BIT(15) 243 #define TDES0_OWN BIT(31) 244 245 #define TDES1_BUF1_SIZE_SHIFT 0 246 #define TDES1_BUF1_SIZE_MASK 0x7ff 247 248 #define TDES1_BUF2_SIZE_SHIFT 11 249 #define TDES1_BUF2_SIZE_MASK 0x7ff 250 251 #define TDES1_FT0 BIT(22) 252 #define TDES1_DPD BIT(23) 253 #define TDES1_TCH BIT(24) 254 #define TDES1_TER BIT(25) 255 #define TDES1_AC BIT(26) 256 #define TDES1_SET BIT(27) 257 #define TDES1_FT1 BIT(28) 258 #define TDES1_FS BIT(29) 259 #define TDES1_LS BIT(30) 260 #define TDES1_IC BIT(31) 261 262 struct tulip_descriptor { 263 uint32_t status; 264 uint32_t control; 265 uint32_t buf_addr1; 266 uint32_t buf_addr2; 267 }; 268 269 #endif 270