xref: /qemu/hw/net/pcnet.h (revision fc524567087c2537b5103cdfc1d41e4f442892b6)
1cb9c377fSPaolo Bonzini #ifndef HW_PCNET_H
2175de524SMarkus Armbruster #define HW_PCNET_H
3cb9c377fSPaolo Bonzini 
494e1a912SGerd Hoffmann #define PCNET_IOPORT_SIZE       0x20
594e1a912SGerd Hoffmann #define PCNET_PNPMMIO_SIZE      0x20
694e1a912SGerd Hoffmann 
794e1a912SGerd Hoffmann #define PCNET_LOOPTEST_CRC      1
894e1a912SGerd Hoffmann #define PCNET_LOOPTEST_NOCRC    2
994e1a912SGerd Hoffmann 
10*8be545baSRichard Henderson #include "system/memory.h"
111b53ecd9SMarkus Armbruster #include "hw/irq.h"
1294e1a912SGerd Hoffmann 
13488a1a5dSJan Kiszka /* BUS CONFIGURATION REGISTERS */
14488a1a5dSJan Kiszka #define BCR_MSRDA    0
15488a1a5dSJan Kiszka #define BCR_MSWRA    1
16488a1a5dSJan Kiszka #define BCR_MC       2
17488a1a5dSJan Kiszka #define BCR_LNKST    4
18488a1a5dSJan Kiszka #define BCR_LED1     5
19488a1a5dSJan Kiszka #define BCR_LED2     6
20488a1a5dSJan Kiszka #define BCR_LED3     7
21488a1a5dSJan Kiszka #define BCR_FDC      9
22488a1a5dSJan Kiszka #define BCR_BSBC     18
23488a1a5dSJan Kiszka #define BCR_EECAS    19
24488a1a5dSJan Kiszka #define BCR_SWS      20
25488a1a5dSJan Kiszka #define BCR_PLAT     22
26488a1a5dSJan Kiszka 
27ef45c914SJan Kiszka #define BCR_TMAULOOP(S)  !!((S)->bcr[BCR_MC  ] & 0x4000)
28488a1a5dSJan Kiszka #define BCR_APROMWE(S)   !!((S)->bcr[BCR_MC  ] & 0x0100)
29488a1a5dSJan Kiszka #define BCR_DWIO(S)      !!((S)->bcr[BCR_BSBC] & 0x0080)
30488a1a5dSJan Kiszka #define BCR_SSIZE32(S)   !!((S)->bcr[BCR_SWS ] & 0x0100)
31488a1a5dSJan Kiszka #define BCR_SWSTYLE(S)     ((S)->bcr[BCR_SWS ] & 0x00FF)
32488a1a5dSJan Kiszka 
3394e1a912SGerd Hoffmann typedef struct PCNetState_st PCNetState;
3494e1a912SGerd Hoffmann 
3594e1a912SGerd Hoffmann struct PCNetState_st {
361fa51482SMark McLoughlin     NICState *nic;
3794e1a912SGerd Hoffmann     NICConf conf;
3894e1a912SGerd Hoffmann     QEMUTimer *poll_timer;
3994e1a912SGerd Hoffmann     int rap, isr, lnkst;
4094e1a912SGerd Hoffmann     uint32_t rdra, tdra;
4194e1a912SGerd Hoffmann     uint8_t prom[16];
4294e1a912SGerd Hoffmann     uint16_t csr[128];
4394e1a912SGerd Hoffmann     uint16_t bcr[32];
44fe87aa83SBlue Swirl     int xmit_pos;
4594e1a912SGerd Hoffmann     uint64_t timer;
46bd8d6f7cSAvi Kivity     MemoryRegion mmio;
4794e1a912SGerd Hoffmann     uint8_t buffer[4096];
4894e1a912SGerd Hoffmann     qemu_irq irq;
49a8170e5eSAvi Kivity     void (*phys_mem_read)(void *dma_opaque, hwaddr addr,
5094e1a912SGerd Hoffmann                          uint8_t *buf, int len, int do_bswap);
51a8170e5eSAvi Kivity     void (*phys_mem_write)(void *dma_opaque, hwaddr addr,
5294e1a912SGerd Hoffmann                           uint8_t *buf, int len, int do_bswap);
534cc76287SMarc-André Lureau     DeviceState *dma_opaque;
54fe87aa83SBlue Swirl     int tx_busy;
5594e1a912SGerd Hoffmann     int looptest;
5694e1a912SGerd Hoffmann };
5794e1a912SGerd Hoffmann 
5894e1a912SGerd Hoffmann void pcnet_h_reset(void *opaque);
5994e1a912SGerd Hoffmann void pcnet_ioport_writew(void *opaque, uint32_t addr, uint32_t val);
6094e1a912SGerd Hoffmann uint32_t pcnet_ioport_readw(void *opaque, uint32_t addr);
61a4c75a21SPaul Brook void pcnet_ioport_writel(void *opaque, uint32_t addr, uint32_t val);
62a4c75a21SPaul Brook uint32_t pcnet_ioport_readl(void *opaque, uint32_t addr);
63a4c75a21SPaul Brook uint32_t pcnet_bcr_readw(PCNetState *s, uint32_t rap);
644e68f7a0SStefan Hajnoczi ssize_t pcnet_receive(NetClientState *nc, const uint8_t *buf, size_t size_);
654e68f7a0SStefan Hajnoczi void pcnet_set_link_status(NetClientState *nc);
664c3b2245SMarkus Armbruster void pcnet_common_init(DeviceState *dev, PCNetState *s, NetClientInfo *info);
673d865059SJuan Quintela extern const VMStateDescription vmstate_pcnet;
68cb9c377fSPaolo Bonzini #endif
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