xref: /qemu/hw/misc/pvpanic-pci.c (revision d097b3dcb6214a35613abc60c48517b850349ad0)
1*d097b3dcSMihai Carabas /*
2*d097b3dcSMihai Carabas  * QEMU simulated PCI pvpanic device.
3*d097b3dcSMihai Carabas  *
4*d097b3dcSMihai Carabas  * Copyright (C) 2020 Oracle
5*d097b3dcSMihai Carabas  *
6*d097b3dcSMihai Carabas  * Authors:
7*d097b3dcSMihai Carabas  *     Mihai Carabas <mihai.carabas@oracle.com>
8*d097b3dcSMihai Carabas  *
9*d097b3dcSMihai Carabas  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10*d097b3dcSMihai Carabas  * See the COPYING file in the top-level directory.
11*d097b3dcSMihai Carabas  *
12*d097b3dcSMihai Carabas  */
13*d097b3dcSMihai Carabas 
14*d097b3dcSMihai Carabas #include "qemu/osdep.h"
15*d097b3dcSMihai Carabas #include "qemu/log.h"
16*d097b3dcSMihai Carabas #include "qemu/module.h"
17*d097b3dcSMihai Carabas #include "sysemu/runstate.h"
18*d097b3dcSMihai Carabas 
19*d097b3dcSMihai Carabas #include "hw/nvram/fw_cfg.h"
20*d097b3dcSMihai Carabas #include "hw/qdev-properties.h"
21*d097b3dcSMihai Carabas #include "migration/vmstate.h"
22*d097b3dcSMihai Carabas #include "hw/misc/pvpanic.h"
23*d097b3dcSMihai Carabas #include "qom/object.h"
24*d097b3dcSMihai Carabas #include "hw/pci/pci.h"
25*d097b3dcSMihai Carabas 
26*d097b3dcSMihai Carabas OBJECT_DECLARE_SIMPLE_TYPE(PVPanicPCIState, PVPANIC_PCI_DEVICE)
27*d097b3dcSMihai Carabas 
28*d097b3dcSMihai Carabas /*
29*d097b3dcSMihai Carabas  * PVPanicPCIState for PCI device
30*d097b3dcSMihai Carabas  */
31*d097b3dcSMihai Carabas typedef struct PVPanicPCIState {
32*d097b3dcSMihai Carabas     PCIDevice dev;
33*d097b3dcSMihai Carabas     PVPanicState pvpanic;
34*d097b3dcSMihai Carabas } PVPanicPCIState;
35*d097b3dcSMihai Carabas 
36*d097b3dcSMihai Carabas static const VMStateDescription vmstate_pvpanic_pci = {
37*d097b3dcSMihai Carabas     .name = "pvpanic-pci",
38*d097b3dcSMihai Carabas     .version_id = 1,
39*d097b3dcSMihai Carabas     .minimum_version_id = 1,
40*d097b3dcSMihai Carabas     .fields = (VMStateField[]) {
41*d097b3dcSMihai Carabas         VMSTATE_PCI_DEVICE(dev, PVPanicPCIState),
42*d097b3dcSMihai Carabas         VMSTATE_END_OF_LIST()
43*d097b3dcSMihai Carabas     }
44*d097b3dcSMihai Carabas };
45*d097b3dcSMihai Carabas 
46*d097b3dcSMihai Carabas static void pvpanic_pci_realizefn(PCIDevice *dev, Error **errp)
47*d097b3dcSMihai Carabas {
48*d097b3dcSMihai Carabas     PVPanicPCIState *s = PVPANIC_PCI_DEVICE(dev);
49*d097b3dcSMihai Carabas     PVPanicState *ps = &s->pvpanic;
50*d097b3dcSMihai Carabas 
51*d097b3dcSMihai Carabas     pvpanic_setup_io(&s->pvpanic, DEVICE(s), 2);
52*d097b3dcSMihai Carabas 
53*d097b3dcSMihai Carabas     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &ps->mr);
54*d097b3dcSMihai Carabas }
55*d097b3dcSMihai Carabas 
56*d097b3dcSMihai Carabas static Property pvpanic_pci_properties[] = {
57*d097b3dcSMihai Carabas     DEFINE_PROP_UINT8("events", PVPanicPCIState, pvpanic.events, PVPANIC_PANICKED | PVPANIC_CRASHLOADED),
58*d097b3dcSMihai Carabas     DEFINE_PROP_END_OF_LIST(),
59*d097b3dcSMihai Carabas };
60*d097b3dcSMihai Carabas 
61*d097b3dcSMihai Carabas static void pvpanic_pci_class_init(ObjectClass *klass, void *data)
62*d097b3dcSMihai Carabas {
63*d097b3dcSMihai Carabas     DeviceClass *dc = DEVICE_CLASS(klass);
64*d097b3dcSMihai Carabas     PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
65*d097b3dcSMihai Carabas 
66*d097b3dcSMihai Carabas     device_class_set_props(dc, pvpanic_pci_properties);
67*d097b3dcSMihai Carabas 
68*d097b3dcSMihai Carabas     pc->realize = pvpanic_pci_realizefn;
69*d097b3dcSMihai Carabas     pc->vendor_id = PCI_VENDOR_ID_REDHAT;
70*d097b3dcSMihai Carabas     pc->device_id = PCI_DEVICE_ID_REDHAT_PVPANIC;
71*d097b3dcSMihai Carabas     pc->revision = 1;
72*d097b3dcSMihai Carabas     pc->class_id = PCI_CLASS_SYSTEM_OTHER;
73*d097b3dcSMihai Carabas     dc->vmsd = &vmstate_pvpanic_pci;
74*d097b3dcSMihai Carabas 
75*d097b3dcSMihai Carabas     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
76*d097b3dcSMihai Carabas }
77*d097b3dcSMihai Carabas 
78*d097b3dcSMihai Carabas static TypeInfo pvpanic_pci_info = {
79*d097b3dcSMihai Carabas     .name          = TYPE_PVPANIC_PCI_DEVICE,
80*d097b3dcSMihai Carabas     .parent        = TYPE_PCI_DEVICE,
81*d097b3dcSMihai Carabas     .instance_size = sizeof(PVPanicPCIState),
82*d097b3dcSMihai Carabas     .class_init    = pvpanic_pci_class_init,
83*d097b3dcSMihai Carabas     .interfaces = (InterfaceInfo[]) {
84*d097b3dcSMihai Carabas         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
85*d097b3dcSMihai Carabas         { }
86*d097b3dcSMihai Carabas     }
87*d097b3dcSMihai Carabas };
88*d097b3dcSMihai Carabas 
89*d097b3dcSMihai Carabas static void pvpanic_register_types(void)
90*d097b3dcSMihai Carabas {
91*d097b3dcSMihai Carabas     type_register_static(&pvpanic_pci_info);
92*d097b3dcSMihai Carabas }
93*d097b3dcSMihai Carabas 
94*d097b3dcSMihai Carabas type_init(pvpanic_register_types);
95