1 /* 2 * QEMU MOS6522 VIA emulation 3 * 4 * Copyright (c) 2004-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * Copyright (c) 2018 Mark Cave-Ayland 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 */ 26 27 #include "qemu/osdep.h" 28 #include "hw/input/adb.h" 29 #include "hw/irq.h" 30 #include "hw/misc/mos6522.h" 31 #include "hw/qdev-properties.h" 32 #include "migration/vmstate.h" 33 #include "monitor/monitor.h" 34 #include "monitor/hmp.h" 35 #include "qapi/type-helpers.h" 36 #include "qemu/timer.h" 37 #include "qemu/cutils.h" 38 #include "qemu/log.h" 39 #include "qemu/module.h" 40 #include "trace.h" 41 42 43 static const char *mos6522_reg_names[MOS6522_NUM_REGS] = { 44 "ORB", "ORA", "DDRB", "DDRA", "T1CL", "T1CH", "T1LL", "T1LH", 45 "T2CL", "T2CH", "SR", "ACR", "PCR", "IFR", "IER", "ANH" 46 }; 47 48 /* XXX: implement all timer modes */ 49 50 static void mos6522_timer1_update(MOS6522State *s, MOS6522Timer *ti, 51 int64_t current_time); 52 static void mos6522_timer2_update(MOS6522State *s, MOS6522Timer *ti, 53 int64_t current_time); 54 55 static void mos6522_update_irq(MOS6522State *s) 56 { 57 if (s->ifr & s->ier) { 58 qemu_irq_raise(s->irq); 59 } else { 60 qemu_irq_lower(s->irq); 61 } 62 } 63 64 static void mos6522_set_irq(void *opaque, int n, int level) 65 { 66 MOS6522State *s = MOS6522(opaque); 67 68 if (level) { 69 s->ifr |= 1 << n; 70 } else { 71 s->ifr &= ~(1 << n); 72 } 73 74 mos6522_update_irq(s); 75 76 if (level) { 77 s->last_irq_levels |= 1 << n; 78 } else { 79 s->last_irq_levels &= ~(1 << n); 80 } 81 } 82 83 static uint64_t get_counter_value(MOS6522State *s, MOS6522Timer *ti) 84 { 85 MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); 86 87 if (ti->index == 0) { 88 return mdc->get_timer1_counter_value(s, ti); 89 } else { 90 return mdc->get_timer2_counter_value(s, ti); 91 } 92 } 93 94 static uint64_t get_load_time(MOS6522State *s, MOS6522Timer *ti) 95 { 96 MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); 97 98 if (ti->index == 0) { 99 return mdc->get_timer1_load_time(s, ti); 100 } else { 101 return mdc->get_timer2_load_time(s, ti); 102 } 103 } 104 105 static unsigned int get_counter(MOS6522State *s, MOS6522Timer *ti) 106 { 107 int64_t d; 108 unsigned int counter; 109 110 d = get_counter_value(s, ti); 111 112 if (ti->index == 0) { 113 /* the timer goes down from latch to -1 (period of latch + 2) */ 114 if (d <= (ti->counter_value + 1)) { 115 counter = (ti->counter_value - d) & 0xffff; 116 } else { 117 counter = (d - (ti->counter_value + 1)) % (ti->latch + 2); 118 counter = (ti->latch - counter) & 0xffff; 119 } 120 } else { 121 counter = (ti->counter_value - d) & 0xffff; 122 } 123 return counter; 124 } 125 126 static void set_counter(MOS6522State *s, MOS6522Timer *ti, unsigned int val) 127 { 128 trace_mos6522_set_counter(1 + ti->index, val); 129 ti->load_time = get_load_time(s, ti); 130 ti->counter_value = val; 131 if (ti->index == 0) { 132 mos6522_timer1_update(s, ti, ti->load_time); 133 } else { 134 mos6522_timer2_update(s, ti, ti->load_time); 135 } 136 } 137 138 static int64_t get_next_irq_time(MOS6522State *s, MOS6522Timer *ti, 139 int64_t current_time) 140 { 141 int64_t d, next_time; 142 unsigned int counter; 143 144 if (ti->frequency == 0) { 145 return INT64_MAX; 146 } 147 148 /* current counter value */ 149 d = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - ti->load_time, 150 ti->frequency, NANOSECONDS_PER_SECOND); 151 152 /* the timer goes down from latch to -1 (period of latch + 2) */ 153 if (d <= (ti->counter_value + 1)) { 154 counter = (ti->counter_value - d) & 0xffff; 155 } else { 156 counter = (d - (ti->counter_value + 1)) % (ti->latch + 2); 157 counter = (ti->latch - counter) & 0xffff; 158 } 159 160 /* Note: we consider the irq is raised on 0 */ 161 if (counter == 0xffff) { 162 next_time = d + ti->latch + 1; 163 } else if (counter == 0) { 164 next_time = d + ti->latch + 2; 165 } else { 166 next_time = d + counter; 167 } 168 trace_mos6522_get_next_irq_time(ti->latch, d, next_time - d); 169 next_time = muldiv64(next_time, NANOSECONDS_PER_SECOND, ti->frequency) + 170 ti->load_time; 171 172 if (next_time <= current_time) { 173 next_time = current_time + 1; 174 } 175 return next_time; 176 } 177 178 static void mos6522_timer1_update(MOS6522State *s, MOS6522Timer *ti, 179 int64_t current_time) 180 { 181 if (!ti->timer) { 182 return; 183 } 184 ti->next_irq_time = get_next_irq_time(s, ti, current_time); 185 if ((s->ier & T1_INT) == 0 || (s->acr & T1MODE) != T1MODE_CONT) { 186 timer_del(ti->timer); 187 } else { 188 timer_mod(ti->timer, ti->next_irq_time); 189 } 190 } 191 192 static void mos6522_timer2_update(MOS6522State *s, MOS6522Timer *ti, 193 int64_t current_time) 194 { 195 if (!ti->timer) { 196 return; 197 } 198 ti->next_irq_time = get_next_irq_time(s, ti, current_time); 199 if ((s->ier & T2_INT) == 0) { 200 timer_del(ti->timer); 201 } else { 202 timer_mod(ti->timer, ti->next_irq_time); 203 } 204 } 205 206 static void mos6522_timer1(void *opaque) 207 { 208 MOS6522State *s = opaque; 209 MOS6522Timer *ti = &s->timers[0]; 210 211 mos6522_timer1_update(s, ti, ti->next_irq_time); 212 s->ifr |= T1_INT; 213 mos6522_update_irq(s); 214 } 215 216 static void mos6522_timer2(void *opaque) 217 { 218 MOS6522State *s = opaque; 219 MOS6522Timer *ti = &s->timers[1]; 220 221 mos6522_timer2_update(s, ti, ti->next_irq_time); 222 s->ifr |= T2_INT; 223 mos6522_update_irq(s); 224 } 225 226 static uint64_t mos6522_get_counter_value(MOS6522State *s, MOS6522Timer *ti) 227 { 228 return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - ti->load_time, 229 ti->frequency, NANOSECONDS_PER_SECOND); 230 } 231 232 static uint64_t mos6522_get_load_time(MOS6522State *s, MOS6522Timer *ti) 233 { 234 uint64_t load_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 235 236 return load_time; 237 } 238 239 static void mos6522_portA_write(MOS6522State *s) 240 { 241 qemu_log_mask(LOG_UNIMP, "portA_write unimplemented\n"); 242 } 243 244 static void mos6522_portB_write(MOS6522State *s) 245 { 246 qemu_log_mask(LOG_UNIMP, "portB_write unimplemented\n"); 247 } 248 249 uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size) 250 { 251 MOS6522State *s = opaque; 252 uint32_t val; 253 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 254 255 if (now >= s->timers[0].next_irq_time) { 256 mos6522_timer1_update(s, &s->timers[0], now); 257 s->ifr |= T1_INT; 258 } 259 if (now >= s->timers[1].next_irq_time) { 260 mos6522_timer2_update(s, &s->timers[1], now); 261 s->ifr |= T2_INT; 262 } 263 switch (addr) { 264 case VIA_REG_B: 265 val = s->b; 266 break; 267 case VIA_REG_A: 268 qemu_log_mask(LOG_UNIMP, "Read access to register A with handshake"); 269 /* fall through */ 270 case VIA_REG_ANH: 271 val = s->a; 272 break; 273 case VIA_REG_DIRB: 274 val = s->dirb; 275 break; 276 case VIA_REG_DIRA: 277 val = s->dira; 278 break; 279 case VIA_REG_T1CL: 280 val = get_counter(s, &s->timers[0]) & 0xff; 281 s->ifr &= ~T1_INT; 282 mos6522_update_irq(s); 283 break; 284 case VIA_REG_T1CH: 285 val = get_counter(s, &s->timers[0]) >> 8; 286 mos6522_update_irq(s); 287 break; 288 case VIA_REG_T1LL: 289 val = s->timers[0].latch & 0xff; 290 break; 291 case VIA_REG_T1LH: 292 /* XXX: check this */ 293 val = (s->timers[0].latch >> 8) & 0xff; 294 break; 295 case VIA_REG_T2CL: 296 val = get_counter(s, &s->timers[1]) & 0xff; 297 s->ifr &= ~T2_INT; 298 mos6522_update_irq(s); 299 break; 300 case VIA_REG_T2CH: 301 val = get_counter(s, &s->timers[1]) >> 8; 302 break; 303 case VIA_REG_SR: 304 val = s->sr; 305 s->ifr &= ~SR_INT; 306 mos6522_update_irq(s); 307 break; 308 case VIA_REG_ACR: 309 val = s->acr; 310 break; 311 case VIA_REG_PCR: 312 val = s->pcr; 313 break; 314 case VIA_REG_IFR: 315 val = s->ifr; 316 if (s->ifr & s->ier) { 317 val |= 0x80; 318 } 319 break; 320 case VIA_REG_IER: 321 val = s->ier | 0x80; 322 break; 323 default: 324 g_assert_not_reached(); 325 } 326 327 if (addr != VIA_REG_IFR || val != 0) { 328 trace_mos6522_read(addr, mos6522_reg_names[addr], val); 329 } 330 331 return val; 332 } 333 334 void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) 335 { 336 MOS6522State *s = opaque; 337 MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s); 338 339 trace_mos6522_write(addr, mos6522_reg_names[addr], val); 340 341 switch (addr) { 342 case VIA_REG_B: 343 s->b = (s->b & ~s->dirb) | (val & s->dirb); 344 mdc->portB_write(s); 345 break; 346 case VIA_REG_A: 347 qemu_log_mask(LOG_UNIMP, "Write access to register A with handshake"); 348 /* fall through */ 349 case VIA_REG_ANH: 350 s->a = (s->a & ~s->dira) | (val & s->dira); 351 mdc->portA_write(s); 352 break; 353 case VIA_REG_DIRB: 354 s->dirb = val; 355 break; 356 case VIA_REG_DIRA: 357 s->dira = val; 358 break; 359 case VIA_REG_T1CL: 360 s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; 361 mos6522_timer1_update(s, &s->timers[0], 362 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 363 break; 364 case VIA_REG_T1CH: 365 s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); 366 s->ifr &= ~T1_INT; 367 set_counter(s, &s->timers[0], s->timers[0].latch); 368 break; 369 case VIA_REG_T1LL: 370 s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; 371 mos6522_timer1_update(s, &s->timers[0], 372 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 373 break; 374 case VIA_REG_T1LH: 375 s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); 376 s->ifr &= ~T1_INT; 377 mos6522_timer1_update(s, &s->timers[0], 378 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 379 break; 380 case VIA_REG_T2CL: 381 s->timers[1].latch = (s->timers[1].latch & 0xff00) | val; 382 break; 383 case VIA_REG_T2CH: 384 /* To ensure T2 generates an interrupt on zero crossing with the 385 common timer code, write the value directly from the latch to 386 the counter */ 387 s->timers[1].latch = (s->timers[1].latch & 0xff) | (val << 8); 388 s->ifr &= ~T2_INT; 389 set_counter(s, &s->timers[1], s->timers[1].latch); 390 break; 391 case VIA_REG_SR: 392 s->sr = val; 393 break; 394 case VIA_REG_ACR: 395 s->acr = val; 396 mos6522_timer1_update(s, &s->timers[0], 397 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 398 break; 399 case VIA_REG_PCR: 400 s->pcr = val; 401 break; 402 case VIA_REG_IFR: 403 /* reset bits */ 404 s->ifr &= ~val; 405 mos6522_update_irq(s); 406 break; 407 case VIA_REG_IER: 408 if (val & IER_SET) { 409 /* set bits */ 410 s->ier |= val & 0x7f; 411 } else { 412 /* reset bits */ 413 s->ier &= ~val; 414 } 415 mos6522_update_irq(s); 416 /* if IER is modified starts needed timers */ 417 mos6522_timer1_update(s, &s->timers[0], 418 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 419 mos6522_timer2_update(s, &s->timers[1], 420 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 421 break; 422 default: 423 g_assert_not_reached(); 424 } 425 } 426 427 static int qmp_x_query_via_foreach(Object *obj, void *opaque) 428 { 429 GString *buf = opaque; 430 431 if (object_dynamic_cast(obj, TYPE_MOS6522)) { 432 MOS6522State *s = MOS6522(obj); 433 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 434 uint16_t t1counter = get_counter(s, &s->timers[0]); 435 uint16_t t2counter = get_counter(s, &s->timers[1]); 436 437 g_string_append_printf(buf, "%s:\n", object_get_typename(obj)); 438 439 g_string_append_printf(buf, " Registers:\n"); 440 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 441 mos6522_reg_names[0], s->b); 442 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 443 mos6522_reg_names[1], s->a); 444 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 445 mos6522_reg_names[2], s->dirb); 446 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 447 mos6522_reg_names[3], s->dira); 448 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 449 mos6522_reg_names[4], t1counter & 0xff); 450 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 451 mos6522_reg_names[5], t1counter >> 8); 452 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 453 mos6522_reg_names[6], 454 s->timers[0].latch & 0xff); 455 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 456 mos6522_reg_names[7], 457 s->timers[0].latch >> 8); 458 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 459 mos6522_reg_names[8], t2counter & 0xff); 460 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 461 mos6522_reg_names[9], t2counter >> 8); 462 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 463 mos6522_reg_names[10], s->sr); 464 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 465 mos6522_reg_names[11], s->acr); 466 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 467 mos6522_reg_names[12], s->pcr); 468 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 469 mos6522_reg_names[13], s->ifr); 470 g_string_append_printf(buf, " %-*s: 0x%x\n", 4, 471 mos6522_reg_names[14], s->ier); 472 473 g_string_append_printf(buf, " Timers:\n"); 474 g_string_append_printf(buf, " Using current time now(ns)=%"PRId64 475 "\n", now); 476 g_string_append_printf(buf, " T1 freq(hz)=%"PRId64 477 " mode=%s" 478 " counter=0x%x" 479 " latch=0x%x\n" 480 " load_time(ns)=%"PRId64 481 " next_irq_time(ns)=%"PRId64 "\n", 482 s->timers[0].frequency, 483 ((s->acr & T1MODE) == T1MODE_CONT) ? "continuous" 484 : "one-shot", 485 t1counter, 486 s->timers[0].latch, 487 s->timers[0].load_time, 488 get_next_irq_time(s, &s->timers[0], now)); 489 g_string_append_printf(buf, " T2 freq(hz)=%"PRId64 490 " mode=%s" 491 " counter=0x%x" 492 " latch=0x%x\n" 493 " load_time(ns)=%"PRId64 494 " next_irq_time(ns)=%"PRId64 "\n", 495 s->timers[1].frequency, 496 "one-shot", 497 t2counter, 498 s->timers[1].latch, 499 s->timers[1].load_time, 500 get_next_irq_time(s, &s->timers[1], now)); 501 } 502 503 return 0; 504 } 505 506 static HumanReadableText *qmp_x_query_via(Error **errp) 507 { 508 g_autoptr(GString) buf = g_string_new(""); 509 510 object_child_foreach_recursive(object_get_root(), 511 qmp_x_query_via_foreach, buf); 512 513 return human_readable_text_from_str(buf); 514 } 515 516 void hmp_info_via(Monitor *mon, const QDict *qdict) 517 { 518 Error *err = NULL; 519 g_autoptr(HumanReadableText) info = qmp_x_query_via(&err); 520 521 if (hmp_handle_error(mon, err)) { 522 return; 523 } 524 monitor_printf(mon, "%s", info->human_readable_text); 525 } 526 527 static const MemoryRegionOps mos6522_ops = { 528 .read = mos6522_read, 529 .write = mos6522_write, 530 .endianness = DEVICE_NATIVE_ENDIAN, 531 .valid = { 532 .min_access_size = 1, 533 .max_access_size = 1, 534 }, 535 }; 536 537 static const VMStateDescription vmstate_mos6522_timer = { 538 .name = "mos6522_timer", 539 .version_id = 0, 540 .minimum_version_id = 0, 541 .fields = (VMStateField[]) { 542 VMSTATE_UINT16(latch, MOS6522Timer), 543 VMSTATE_UINT16(counter_value, MOS6522Timer), 544 VMSTATE_INT64(load_time, MOS6522Timer), 545 VMSTATE_INT64(next_irq_time, MOS6522Timer), 546 VMSTATE_TIMER_PTR(timer, MOS6522Timer), 547 VMSTATE_END_OF_LIST() 548 } 549 }; 550 551 const VMStateDescription vmstate_mos6522 = { 552 .name = "mos6522", 553 .version_id = 1, 554 .minimum_version_id = 1, 555 .fields = (VMStateField[]) { 556 VMSTATE_UINT8(a, MOS6522State), 557 VMSTATE_UINT8(b, MOS6522State), 558 VMSTATE_UINT8(dira, MOS6522State), 559 VMSTATE_UINT8(dirb, MOS6522State), 560 VMSTATE_UINT8(sr, MOS6522State), 561 VMSTATE_UINT8(acr, MOS6522State), 562 VMSTATE_UINT8(pcr, MOS6522State), 563 VMSTATE_UINT8(ifr, MOS6522State), 564 VMSTATE_UINT8(ier, MOS6522State), 565 VMSTATE_UINT8(last_irq_levels, MOS6522State), 566 VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 0, 567 vmstate_mos6522_timer, MOS6522Timer), 568 VMSTATE_END_OF_LIST() 569 } 570 }; 571 572 static void mos6522_reset(DeviceState *dev) 573 { 574 MOS6522State *s = MOS6522(dev); 575 576 s->b = 0; 577 s->a = 0; 578 s->dirb = 0xff; 579 s->dira = 0; 580 s->sr = 0; 581 s->acr = 0; 582 s->pcr = 0; 583 s->ifr = 0; 584 s->ier = 0; 585 /* s->ier = T1_INT | SR_INT; */ 586 587 s->timers[0].frequency = s->frequency; 588 s->timers[0].latch = 0xffff; 589 set_counter(s, &s->timers[0], 0xffff); 590 timer_del(s->timers[0].timer); 591 592 s->timers[1].frequency = s->frequency; 593 s->timers[1].latch = 0xffff; 594 timer_del(s->timers[1].timer); 595 } 596 597 static void mos6522_init(Object *obj) 598 { 599 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 600 MOS6522State *s = MOS6522(obj); 601 int i; 602 603 memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522", 604 MOS6522_NUM_REGS); 605 sysbus_init_mmio(sbd, &s->mem); 606 sysbus_init_irq(sbd, &s->irq); 607 608 for (i = 0; i < ARRAY_SIZE(s->timers); i++) { 609 s->timers[i].index = i; 610 } 611 612 s->timers[0].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer1, s); 613 s->timers[1].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer2, s); 614 615 qdev_init_gpio_in(DEVICE(obj), mos6522_set_irq, VIA_NUM_INTS); 616 } 617 618 static void mos6522_finalize(Object *obj) 619 { 620 MOS6522State *s = MOS6522(obj); 621 622 timer_free(s->timers[0].timer); 623 timer_free(s->timers[1].timer); 624 } 625 626 static Property mos6522_properties[] = { 627 DEFINE_PROP_UINT64("frequency", MOS6522State, frequency, 0), 628 DEFINE_PROP_END_OF_LIST() 629 }; 630 631 static void mos6522_class_init(ObjectClass *oc, void *data) 632 { 633 DeviceClass *dc = DEVICE_CLASS(oc); 634 MOS6522DeviceClass *mdc = MOS6522_CLASS(oc); 635 636 dc->reset = mos6522_reset; 637 dc->vmsd = &vmstate_mos6522; 638 device_class_set_props(dc, mos6522_properties); 639 mdc->portB_write = mos6522_portB_write; 640 mdc->portA_write = mos6522_portA_write; 641 mdc->get_timer1_counter_value = mos6522_get_counter_value; 642 mdc->get_timer2_counter_value = mos6522_get_counter_value; 643 mdc->get_timer1_load_time = mos6522_get_load_time; 644 mdc->get_timer2_load_time = mos6522_get_load_time; 645 } 646 647 static const TypeInfo mos6522_type_info = { 648 .name = TYPE_MOS6522, 649 .parent = TYPE_SYS_BUS_DEVICE, 650 .instance_size = sizeof(MOS6522State), 651 .instance_init = mos6522_init, 652 .instance_finalize = mos6522_finalize, 653 .abstract = true, 654 .class_size = sizeof(MOS6522DeviceClass), 655 .class_init = mos6522_class_init, 656 }; 657 658 static void mos6522_register_types(void) 659 { 660 type_register_static(&mos6522_type_info); 661 } 662 663 type_init(mos6522_register_types) 664