xref: /qemu/hw/misc/macio/macio.c (revision dda12e9a6f6ffcfac2642c11a1afb27af877e2c9)
1 /*
2  * PowerMac MacIO device emulation
3  *
4  * Copyright (c) 2005-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 #include "qemu/osdep.h"
26 #include "qapi/error.h"
27 #include "hw/hw.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/misc/macio/cuda.h"
30 #include "hw/pci/pci.h"
31 #include "hw/ppc/mac_dbdma.h"
32 #include "hw/char/escc.h"
33 #include "hw/misc/macio/macio.h"
34 #include "hw/intc/heathrow_pic.h"
35 
36 /*
37  * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
38  * while the other one is the normal, current ESCC interface.
39  *
40  * The magic below creates memory aliases to spawn the escc-legacy device
41  * purely by rerouting the respective registers to our escc region. This
42  * works because the only difference between the two memory regions is the
43  * register layout, not their semantics.
44  *
45  * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
46  */
47 static void macio_escc_legacy_setup(MacIOState *s)
48 {
49     ESCCState *escc = ESCC(&s->escc);
50     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
51     MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
52     MemoryRegion *bar = &s->bar;
53     int i;
54     static const int maps[] = {
55         0x00, 0x00, /* Command B */
56         0x02, 0x20, /* Command A */
57         0x04, 0x10, /* Data B */
58         0x06, 0x30, /* Data A */
59         0x08, 0x40, /* Enhancement B */
60         0x0A, 0x50, /* Enhancement A */
61         0x80, 0x80, /* Recovery count */
62         0x90, 0x90, /* Start A */
63         0xa0, 0xa0, /* Start B */
64         0xb0, 0xb0, /* Detect AB */
65     };
66 
67     memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256);
68     for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
69         MemoryRegion *port = g_new(MemoryRegion, 1);
70         memory_region_init_alias(port, OBJECT(s), "escc-legacy-port",
71                                  sysbus_mmio_get_region(sbd, 0),
72                                  maps[i + 1], 0x2);
73         memory_region_add_subregion(escc_legacy, maps[i], port);
74     }
75 
76     memory_region_add_subregion(bar, 0x12000, escc_legacy);
77 }
78 
79 static void macio_bar_setup(MacIOState *s)
80 {
81     ESCCState *escc = ESCC(&s->escc);
82     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
83     MemoryRegion *bar = &s->bar;
84 
85     memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0));
86     macio_escc_legacy_setup(s);
87 }
88 
89 static void macio_common_realize(PCIDevice *d, Error **errp)
90 {
91     MacIOState *s = MACIO(d);
92     SysBusDevice *sysbus_dev;
93     Error *err = NULL;
94 
95     object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err);
96     if (err) {
97         error_propagate(errp, err);
98         return;
99     }
100     sysbus_dev = SYS_BUS_DEVICE(&s->dbdma);
101     memory_region_add_subregion(&s->bar, 0x08000,
102                                 sysbus_mmio_get_region(sysbus_dev, 0));
103 
104     object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
105     if (err) {
106         error_propagate(errp, err);
107         return;
108     }
109     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
110     memory_region_add_subregion(&s->bar, 0x16000,
111                                 sysbus_mmio_get_region(sysbus_dev, 0));
112 
113     object_property_set_bool(OBJECT(&s->escc), true, "realized", &err);
114     if (err) {
115         error_propagate(errp, err);
116         return;
117     }
118 
119     macio_bar_setup(s);
120     pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
121 }
122 
123 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
124                               qemu_irq irq0, qemu_irq irq1, int dmaid,
125                               Error **errp)
126 {
127     SysBusDevice *sysbus_dev;
128 
129     sysbus_dev = SYS_BUS_DEVICE(ide);
130     sysbus_connect_irq(sysbus_dev, 0, irq0);
131     sysbus_connect_irq(sysbus_dev, 1, irq1);
132     qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid);
133     object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp);
134     macio_ide_register_dma(ide);
135 
136     object_property_set_bool(OBJECT(ide), true, "realized", errp);
137 }
138 
139 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
140 {
141     MacIOState *s = MACIO(d);
142     OldWorldMacIOState *os = OLDWORLD_MACIO(d);
143     Error *err = NULL;
144     SysBusDevice *sysbus_dev;
145     int i;
146     int cur_irq = 0;
147 
148     macio_common_realize(d, &err);
149     if (err) {
150         error_propagate(errp, err);
151         return;
152     }
153 
154     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
155     sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
156 
157     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
158     sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
159     sysbus_connect_irq(sysbus_dev, 1, os->irqs[cur_irq++]);
160 
161     object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
162     if (err) {
163         error_propagate(errp, err);
164         return;
165     }
166     sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
167     memory_region_add_subregion(&s->bar, 0x60000,
168                                 sysbus_mmio_get_region(sysbus_dev, 0));
169     pmac_format_nvram_partition(&os->nvram, os->nvram.size);
170 
171     /* Heathrow PIC */
172     sysbus_dev = SYS_BUS_DEVICE(os->pic);
173     memory_region_add_subregion(&s->bar, 0x0,
174                                 sysbus_mmio_get_region(sysbus_dev, 0));
175 
176     /* IDE buses */
177     for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
178         qemu_irq irq0 = os->irqs[cur_irq++];
179         qemu_irq irq1 = os->irqs[cur_irq++];
180 
181         macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
182         if (err) {
183             error_propagate(errp, err);
184             return;
185         }
186     }
187 }
188 
189 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
190                            int index)
191 {
192     gchar *name;
193 
194     object_initialize(ide, ide_size, TYPE_MACIO_IDE);
195     qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
196     memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
197                                 &ide->mem);
198     name = g_strdup_printf("ide[%i]", index);
199     object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
200     g_free(name);
201 }
202 
203 static void macio_oldworld_init(Object *obj)
204 {
205     MacIOState *s = MACIO(obj);
206     OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
207     DeviceState *dev;
208     int i;
209 
210     qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
211 
212     object_property_add_link(obj, "pic", TYPE_HEATHROW,
213                              (Object **) &os->pic,
214                              qdev_prop_allow_set_link_before_realize,
215                              0, NULL);
216 
217     object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
218     dev = DEVICE(&os->nvram);
219     qdev_prop_set_uint32(dev, "size", 0x2000);
220     qdev_prop_set_uint32(dev, "it_shift", 4);
221 
222     for (i = 0; i < 2; i++) {
223         macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
224     }
225 }
226 
227 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
228                        unsigned size)
229 {
230 }
231 
232 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
233 {
234     uint32_t value = 0;
235     uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
236     uint64_t kltime;
237 
238     kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
239     kltime = muldiv64(kltime, 18432000, 1048575);
240 
241     switch (addr) {
242     case 0x38:
243         value = kltime;
244         break;
245     case 0x3c:
246         value = kltime >> 32;
247         break;
248     }
249 
250     return value;
251 }
252 
253 static const MemoryRegionOps timer_ops = {
254     .read = timer_read,
255     .write = timer_write,
256     .endianness = DEVICE_LITTLE_ENDIAN,
257 };
258 
259 static void macio_newworld_realize(PCIDevice *d, Error **errp)
260 {
261     MacIOState *s = MACIO(d);
262     NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
263     Error *err = NULL;
264     SysBusDevice *sysbus_dev;
265     MemoryRegion *timer_memory = NULL;
266     int i;
267     int cur_irq = 0;
268 
269     macio_common_realize(d, &err);
270     if (err) {
271         error_propagate(errp, err);
272         return;
273     }
274 
275     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
276     sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
277 
278     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
279     sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
280     sysbus_connect_irq(sysbus_dev, 1, ns->irqs[cur_irq++]);
281 
282     /* OpenPIC */
283     sysbus_dev = SYS_BUS_DEVICE(ns->pic);
284     memory_region_add_subregion(&s->bar, 0x40000,
285                                 sysbus_mmio_get_region(sysbus_dev, 0));
286 
287     /* IDE buses */
288     for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
289         qemu_irq irq0 = ns->irqs[cur_irq++];
290         qemu_irq irq1 = ns->irqs[cur_irq++];
291 
292         macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
293         if (err) {
294             error_propagate(errp, err);
295             return;
296         }
297     }
298 
299     /* Timer */
300     timer_memory = g_new(MemoryRegion, 1);
301     memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
302                           0x1000);
303     memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
304 }
305 
306 static void macio_newworld_init(Object *obj)
307 {
308     MacIOState *s = MACIO(obj);
309     NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
310     int i;
311 
312     qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
313 
314     object_property_add_link(obj, "pic", TYPE_OPENPIC,
315                              (Object **) &ns->pic,
316                              qdev_prop_allow_set_link_before_realize,
317                              0, NULL);
318 
319     for (i = 0; i < 2; i++) {
320         macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
321     }
322 }
323 
324 static void macio_instance_init(Object *obj)
325 {
326     MacIOState *s = MACIO(obj);
327 
328     memory_region_init(&s->bar, obj, "macio", 0x80000);
329 
330     object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
331     qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
332     object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
333 
334     object_initialize(&s->dbdma, sizeof(s->dbdma), TYPE_MAC_DBDMA);
335     qdev_set_parent_bus(DEVICE(&s->dbdma), sysbus_get_default());
336     object_property_add_child(obj, "dbdma", OBJECT(&s->dbdma), NULL);
337 
338     object_initialize(&s->escc, sizeof(s->escc), TYPE_ESCC);
339     qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0);
340     qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK);
341     qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4);
342     qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hds[0]);
343     qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hds[1]);
344     qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial);
345     qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial);
346     qdev_set_parent_bus(DEVICE(&s->escc), sysbus_get_default());
347     object_property_add_child(obj, "escc", OBJECT(&s->escc), NULL);
348 }
349 
350 static const VMStateDescription vmstate_macio_oldworld = {
351     .name = "macio-oldworld",
352     .version_id = 0,
353     .minimum_version_id = 0,
354     .fields = (VMStateField[]) {
355         VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
356         VMSTATE_END_OF_LIST()
357     }
358 };
359 
360 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
361 {
362     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
363     DeviceClass *dc = DEVICE_CLASS(oc);
364 
365     pdc->realize = macio_oldworld_realize;
366     pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
367     dc->vmsd = &vmstate_macio_oldworld;
368 }
369 
370 static const VMStateDescription vmstate_macio_newworld = {
371     .name = "macio-newworld",
372     .version_id = 0,
373     .minimum_version_id = 0,
374     .fields = (VMStateField[]) {
375         VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
376         VMSTATE_END_OF_LIST()
377     }
378 };
379 
380 static void macio_newworld_class_init(ObjectClass *oc, void *data)
381 {
382     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
383     DeviceClass *dc = DEVICE_CLASS(oc);
384 
385     pdc->realize = macio_newworld_realize;
386     pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
387     dc->vmsd = &vmstate_macio_newworld;
388 }
389 
390 static Property macio_properties[] = {
391     DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
392     DEFINE_PROP_END_OF_LIST()
393 };
394 
395 static void macio_class_init(ObjectClass *klass, void *data)
396 {
397     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
398     DeviceClass *dc = DEVICE_CLASS(klass);
399 
400     k->vendor_id = PCI_VENDOR_ID_APPLE;
401     k->class_id = PCI_CLASS_OTHERS << 8;
402     dc->props = macio_properties;
403     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
404 }
405 
406 static const TypeInfo macio_oldworld_type_info = {
407     .name          = TYPE_OLDWORLD_MACIO,
408     .parent        = TYPE_MACIO,
409     .instance_size = sizeof(OldWorldMacIOState),
410     .instance_init = macio_oldworld_init,
411     .class_init    = macio_oldworld_class_init,
412 };
413 
414 static const TypeInfo macio_newworld_type_info = {
415     .name          = TYPE_NEWWORLD_MACIO,
416     .parent        = TYPE_MACIO,
417     .instance_size = sizeof(NewWorldMacIOState),
418     .instance_init = macio_newworld_init,
419     .class_init    = macio_newworld_class_init,
420 };
421 
422 static const TypeInfo macio_type_info = {
423     .name          = TYPE_MACIO,
424     .parent        = TYPE_PCI_DEVICE,
425     .instance_size = sizeof(MacIOState),
426     .instance_init = macio_instance_init,
427     .abstract      = true,
428     .class_init    = macio_class_init,
429     .interfaces = (InterfaceInfo[]) {
430         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
431         { },
432     },
433 };
434 
435 static void macio_register_types(void)
436 {
437     type_register_static(&macio_type_info);
438     type_register_static(&macio_oldworld_type_info);
439     type_register_static(&macio_newworld_type_info);
440 }
441 
442 type_init(macio_register_types)
443 
444 void macio_init(PCIDevice *d,
445                 MemoryRegion *pic_mem)
446 {
447     MacIOState *macio_state = MACIO(d);
448 
449     /* Note: this code is strongly inspirated from the corresponding code
450        in PearPC */
451     qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "timebase-frequency",
452                          macio_state->frequency);
453 
454     qdev_init_nofail(DEVICE(d));
455 }
456