1 /* 2 * QEMU/mipssim emulation 3 * 4 * Emulates a very simple machine model similar to the one used by the 5 * proprietary MIPS emulator. 6 * 7 * Copyright (c) 2007 Thiemo Seufer 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 #include "qemu/osdep.h" 28 #include "hw/hw.h" 29 #include "hw/mips/mips.h" 30 #include "hw/mips/cpudevs.h" 31 #include "hw/char/serial.h" 32 #include "hw/isa/isa.h" 33 #include "net/net.h" 34 #include "sysemu/sysemu.h" 35 #include "hw/boards.h" 36 #include "hw/mips/bios.h" 37 #include "hw/loader.h" 38 #include "elf.h" 39 #include "hw/sysbus.h" 40 #include "exec/address-spaces.h" 41 #include "qemu/error-report.h" 42 #include "sysemu/qtest.h" 43 44 static struct _loaderparams { 45 int ram_size; 46 const char *kernel_filename; 47 const char *kernel_cmdline; 48 const char *initrd_filename; 49 } loaderparams; 50 51 typedef struct ResetData { 52 MIPSCPU *cpu; 53 uint64_t vector; 54 } ResetData; 55 56 static int64_t load_kernel(void) 57 { 58 int64_t entry, kernel_high; 59 long kernel_size; 60 long initrd_size; 61 ram_addr_t initrd_offset; 62 int big_endian; 63 64 #ifdef TARGET_WORDS_BIGENDIAN 65 big_endian = 1; 66 #else 67 big_endian = 0; 68 #endif 69 70 kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, 71 NULL, (uint64_t *)&entry, NULL, 72 (uint64_t *)&kernel_high, big_endian, 73 EM_MIPS, 1); 74 if (kernel_size >= 0) { 75 if ((entry & ~0x7fffffffULL) == 0x80000000) 76 entry = (int32_t)entry; 77 } else { 78 fprintf(stderr, "qemu: could not load kernel '%s'\n", 79 loaderparams.kernel_filename); 80 exit(1); 81 } 82 83 /* load initrd */ 84 initrd_size = 0; 85 initrd_offset = 0; 86 if (loaderparams.initrd_filename) { 87 initrd_size = get_image_size (loaderparams.initrd_filename); 88 if (initrd_size > 0) { 89 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; 90 if (initrd_offset + initrd_size > loaderparams.ram_size) { 91 fprintf(stderr, 92 "qemu: memory too small for initial ram disk '%s'\n", 93 loaderparams.initrd_filename); 94 exit(1); 95 } 96 initrd_size = load_image_targphys(loaderparams.initrd_filename, 97 initrd_offset, loaderparams.ram_size - initrd_offset); 98 } 99 if (initrd_size == (target_ulong) -1) { 100 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 101 loaderparams.initrd_filename); 102 exit(1); 103 } 104 } 105 return entry; 106 } 107 108 static void main_cpu_reset(void *opaque) 109 { 110 ResetData *s = (ResetData *)opaque; 111 CPUMIPSState *env = &s->cpu->env; 112 113 cpu_reset(CPU(s->cpu)); 114 env->active_tc.PC = s->vector & ~(target_ulong)1; 115 if (s->vector & 1) { 116 env->hflags |= MIPS_HFLAG_M16; 117 } 118 } 119 120 static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd) 121 { 122 DeviceState *dev; 123 SysBusDevice *s; 124 125 dev = qdev_create(NULL, "mipsnet"); 126 qdev_set_nic_properties(dev, nd); 127 qdev_init_nofail(dev); 128 129 s = SYS_BUS_DEVICE(dev); 130 sysbus_connect_irq(s, 0, irq); 131 memory_region_add_subregion(get_system_io(), 132 base, 133 sysbus_mmio_get_region(s, 0)); 134 } 135 136 static void 137 mips_mipssim_init(MachineState *machine) 138 { 139 ram_addr_t ram_size = machine->ram_size; 140 const char *cpu_model = machine->cpu_model; 141 const char *kernel_filename = machine->kernel_filename; 142 const char *kernel_cmdline = machine->kernel_cmdline; 143 const char *initrd_filename = machine->initrd_filename; 144 char *filename; 145 MemoryRegion *address_space_mem = get_system_memory(); 146 MemoryRegion *isa = g_new(MemoryRegion, 1); 147 MemoryRegion *ram = g_new(MemoryRegion, 1); 148 MemoryRegion *bios = g_new(MemoryRegion, 1); 149 MIPSCPU *cpu; 150 CPUMIPSState *env; 151 ResetData *reset_info; 152 int bios_size; 153 154 /* Init CPUs. */ 155 if (cpu_model == NULL) { 156 #ifdef TARGET_MIPS64 157 cpu_model = "5Kf"; 158 #else 159 cpu_model = "24Kf"; 160 #endif 161 } 162 cpu = cpu_mips_init(cpu_model); 163 if (cpu == NULL) { 164 fprintf(stderr, "Unable to find CPU definition\n"); 165 exit(1); 166 } 167 env = &cpu->env; 168 169 reset_info = g_malloc0(sizeof(ResetData)); 170 reset_info->cpu = cpu; 171 reset_info->vector = env->active_tc.PC; 172 qemu_register_reset(main_cpu_reset, reset_info); 173 174 /* Allocate RAM. */ 175 memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram", 176 ram_size); 177 memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, 178 &error_fatal); 179 vmstate_register_ram_global(bios); 180 memory_region_set_readonly(bios, true); 181 182 memory_region_add_subregion(address_space_mem, 0, ram); 183 184 /* Map the BIOS / boot exception handler. */ 185 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); 186 /* Load a BIOS / boot exception handler image. */ 187 if (bios_name == NULL) 188 bios_name = BIOS_FILENAME; 189 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 190 if (filename) { 191 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); 192 g_free(filename); 193 } else { 194 bios_size = -1; 195 } 196 if ((bios_size < 0 || bios_size > BIOS_SIZE) && 197 !kernel_filename && !qtest_enabled()) { 198 /* Bail out if we have neither a kernel image nor boot vector code. */ 199 error_report("Could not load MIPS bios '%s', and no " 200 "-kernel argument was specified", bios_name); 201 exit(1); 202 } else { 203 /* We have a boot vector start address. */ 204 env->active_tc.PC = (target_long)(int32_t)0xbfc00000; 205 } 206 207 if (kernel_filename) { 208 loaderparams.ram_size = ram_size; 209 loaderparams.kernel_filename = kernel_filename; 210 loaderparams.kernel_cmdline = kernel_cmdline; 211 loaderparams.initrd_filename = initrd_filename; 212 reset_info->vector = load_kernel(); 213 } 214 215 /* Init CPU internal devices. */ 216 cpu_mips_irq_init_cpu(env); 217 cpu_mips_clock_init(env); 218 219 /* Register 64 KB of ISA IO space at 0x1fd00000. */ 220 memory_region_init_alias(isa, NULL, "isa_mmio", 221 get_system_io(), 0, 0x00010000); 222 memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa); 223 224 /* A single 16450 sits at offset 0x3f8. It is attached to 225 MIPS CPU INT2, which is interrupt 4. */ 226 if (serial_hds[0]) 227 serial_init(0x3f8, env->irq[4], 115200, serial_hds[0], 228 get_system_io()); 229 230 if (nd_table[0].used) 231 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ 232 mipsnet_init(0x4200, env->irq[2], &nd_table[0]); 233 } 234 235 static void mips_mipssim_machine_init(MachineClass *mc) 236 { 237 mc->desc = "MIPS MIPSsim platform"; 238 mc->init = mips_mipssim_init; 239 } 240 241 DEFINE_MACHINE("mipssim", mips_mipssim_machine_init) 242