1 /* 2 * QEMU/mipssim emulation 3 * 4 * Emulates a very simple machine model similiar to the one use by the 5 * proprietary MIPS emulator. 6 * 7 * Copyright (c) 2007 Thiemo Seufer 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 #include "hw.h" 28 #include "mips.h" 29 #include "pc.h" 30 #include "isa.h" 31 #include "net.h" 32 #include "sysemu.h" 33 #include "boards.h" 34 #include "mips-bios.h" 35 36 #ifdef TARGET_MIPS64 37 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL) 38 #else 39 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU) 40 #endif 41 42 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000)) 43 44 static struct _loaderparams { 45 int ram_size; 46 const char *kernel_filename; 47 const char *kernel_cmdline; 48 const char *initrd_filename; 49 } loaderparams; 50 51 static void load_kernel (CPUState *env) 52 { 53 int64_t entry, kernel_low, kernel_high; 54 long kernel_size; 55 long initrd_size; 56 ram_addr_t initrd_offset; 57 58 kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND, 59 (uint64_t *)&entry, (uint64_t *)&kernel_low, 60 (uint64_t *)&kernel_high); 61 if (kernel_size >= 0) { 62 if ((entry & ~0x7fffffffULL) == 0x80000000) 63 entry = (int32_t)entry; 64 env->active_tc.PC = entry; 65 } else { 66 fprintf(stderr, "qemu: could not load kernel '%s'\n", 67 loaderparams.kernel_filename); 68 exit(1); 69 } 70 71 /* load initrd */ 72 initrd_size = 0; 73 initrd_offset = 0; 74 if (loaderparams.initrd_filename) { 75 initrd_size = get_image_size (loaderparams.initrd_filename); 76 if (initrd_size > 0) { 77 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK; 78 if (initrd_offset + initrd_size > loaderparams.ram_size) { 79 fprintf(stderr, 80 "qemu: memory too small for initial ram disk '%s'\n", 81 loaderparams.initrd_filename); 82 exit(1); 83 } 84 initrd_size = load_image_targphys(loaderparams.initrd_filename, 85 initrd_offset, loaderparams.ram_size - initrd_offset); 86 } 87 if (initrd_size == (target_ulong) -1) { 88 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 89 loaderparams.initrd_filename); 90 exit(1); 91 } 92 } 93 } 94 95 static void main_cpu_reset(void *opaque) 96 { 97 CPUState *env = opaque; 98 cpu_reset(env); 99 100 if (loaderparams.kernel_filename) 101 load_kernel (env); 102 } 103 104 static void 105 mips_mipssim_init (ram_addr_t ram_size, 106 const char *boot_device, 107 const char *kernel_filename, const char *kernel_cmdline, 108 const char *initrd_filename, const char *cpu_model) 109 { 110 char *filename; 111 ram_addr_t ram_offset; 112 ram_addr_t bios_offset; 113 CPUState *env; 114 int bios_size; 115 116 /* Init CPUs. */ 117 if (cpu_model == NULL) { 118 #ifdef TARGET_MIPS64 119 cpu_model = "5Kf"; 120 #else 121 cpu_model = "24Kf"; 122 #endif 123 } 124 env = cpu_init(cpu_model); 125 if (!env) { 126 fprintf(stderr, "Unable to find CPU definition\n"); 127 exit(1); 128 } 129 qemu_register_reset(main_cpu_reset, env); 130 131 /* Allocate RAM. */ 132 ram_offset = qemu_ram_alloc(ram_size); 133 bios_offset = qemu_ram_alloc(BIOS_SIZE); 134 135 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); 136 137 /* Map the BIOS / boot exception handler. */ 138 cpu_register_physical_memory(0x1fc00000LL, 139 BIOS_SIZE, bios_offset | IO_MEM_ROM); 140 /* Load a BIOS / boot exception handler image. */ 141 if (bios_name == NULL) 142 bios_name = BIOS_FILENAME; 143 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 144 if (filename) { 145 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); 146 qemu_free(filename); 147 } else { 148 bios_size = -1; 149 } 150 if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { 151 /* Bail out if we have neither a kernel image nor boot vector code. */ 152 fprintf(stderr, 153 "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n", 154 filename); 155 exit(1); 156 } else { 157 /* We have a boot vector start address. */ 158 env->active_tc.PC = (target_long)(int32_t)0xbfc00000; 159 } 160 161 if (kernel_filename) { 162 loaderparams.ram_size = ram_size; 163 loaderparams.kernel_filename = kernel_filename; 164 loaderparams.kernel_cmdline = kernel_cmdline; 165 loaderparams.initrd_filename = initrd_filename; 166 load_kernel(env); 167 } 168 169 /* Init CPU internal devices. */ 170 cpu_mips_irq_init_cpu(env); 171 cpu_mips_clock_init(env); 172 173 /* Register 64 KB of ISA IO space at 0x1fd00000. */ 174 isa_mmio_init(0x1fd00000, 0x00010000); 175 176 /* A single 16450 sits at offset 0x3f8. It is attached to 177 MIPS CPU INT2, which is interrupt 4. */ 178 if (serial_hds[0]) 179 serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]); 180 181 if (nd_table[0].vlan) 182 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ 183 mipsnet_init(0x4200, env->irq[2], &nd_table[0]); 184 } 185 186 static QEMUMachine mips_mipssim_machine = { 187 .name = "mipssim", 188 .desc = "MIPS MIPSsim platform", 189 .init = mips_mipssim_init, 190 }; 191 192 static void mips_mipssim_machine_init(void) 193 { 194 qemu_register_machine(&mips_mipssim_machine); 195 } 196 197 machine_init(mips_mipssim_machine_init); 198