1 /* 2 * QEMU/mipssim emulation 3 * 4 * Emulates a very simple machine model similar to the one used by the 5 * proprietary MIPS emulator. 6 * 7 * Copyright (c) 2007 Thiemo Seufer 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "qapi/error.h" 30 #include "qemu/datadir.h" 31 #include "system/address-spaces.h" 32 #include "hw/clock.h" 33 #include "hw/mips/mips.h" 34 #include "hw/char/serial-mm.h" 35 #include "net/net.h" 36 #include "system/system.h" 37 #include "hw/boards.h" 38 #include "hw/loader.h" 39 #include "elf.h" 40 #include "hw/sysbus.h" 41 #include "hw/qdev-properties.h" 42 #include "qemu/error-report.h" 43 #include "system/qtest.h" 44 #include "system/reset.h" 45 #include "cpu.h" 46 47 #define BIOS_SIZE (4 * MiB) 48 49 static struct _loaderparams { 50 int ram_size; 51 const char *kernel_filename; 52 const char *kernel_cmdline; 53 const char *initrd_filename; 54 } loaderparams; 55 56 typedef struct ResetData { 57 MIPSCPU *cpu; 58 uint64_t vector; 59 } ResetData; 60 61 static uint64_t load_kernel(void) 62 { 63 uint64_t entry, kernel_high, initrd_size; 64 long kernel_size; 65 ram_addr_t initrd_offset; 66 67 kernel_size = load_elf(loaderparams.kernel_filename, NULL, 68 cpu_mips_kseg0_to_phys, NULL, 69 &entry, NULL, 70 &kernel_high, NULL, 71 TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB, 72 EM_MIPS, 1, 0); 73 if (kernel_size < 0) { 74 error_report("could not load kernel '%s': %s", 75 loaderparams.kernel_filename, 76 load_elf_strerror(kernel_size)); 77 exit(1); 78 } 79 80 /* load initrd */ 81 initrd_size = 0; 82 initrd_offset = 0; 83 if (loaderparams.initrd_filename) { 84 initrd_size = get_image_size(loaderparams.initrd_filename); 85 if (initrd_size > 0) { 86 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE); 87 if (initrd_offset + initrd_size > loaderparams.ram_size) { 88 error_report("memory too small for initial ram disk '%s'", 89 loaderparams.initrd_filename); 90 exit(1); 91 } 92 initrd_size = load_image_targphys(loaderparams.initrd_filename, 93 initrd_offset, loaderparams.ram_size - initrd_offset); 94 } 95 if (initrd_size == (target_ulong) -1) { 96 error_report("could not load initial ram disk '%s'", 97 loaderparams.initrd_filename); 98 exit(1); 99 } 100 } 101 return entry; 102 } 103 104 static void main_cpu_reset(void *opaque) 105 { 106 ResetData *s = (ResetData *)opaque; 107 CPUMIPSState *env = &s->cpu->env; 108 109 cpu_reset(CPU(s->cpu)); 110 env->active_tc.PC = s->vector & ~(target_ulong)1; 111 if (s->vector & 1) { 112 env->hflags |= MIPS_HFLAG_M16; 113 } 114 } 115 116 static void mipsnet_init(int base, qemu_irq irq) 117 { 118 DeviceState *dev; 119 SysBusDevice *s; 120 121 dev = qemu_create_nic_device("mipsnet", true, NULL); 122 if (!dev) { 123 return; 124 } 125 126 s = SYS_BUS_DEVICE(dev); 127 sysbus_realize_and_unref(s, &error_fatal); 128 sysbus_connect_irq(s, 0, irq); 129 memory_region_add_subregion(get_system_io(), 130 base, 131 sysbus_mmio_get_region(s, 0)); 132 } 133 134 static void 135 mips_mipssim_init(MachineState *machine) 136 { 137 const char *kernel_filename = machine->kernel_filename; 138 const char *kernel_cmdline = machine->kernel_cmdline; 139 const char *initrd_filename = machine->initrd_filename; 140 const char *bios_name = TARGET_BIG_ENDIAN ? "mips_bios.bin" 141 : "mipsel_bios.bin"; 142 char *filename; 143 MemoryRegion *address_space_mem = get_system_memory(); 144 MemoryRegion *isa = g_new(MemoryRegion, 1); 145 MemoryRegion *bios = g_new(MemoryRegion, 1); 146 Clock *cpuclk; 147 MIPSCPU *cpu; 148 CPUMIPSState *env; 149 ResetData *reset_info; 150 int bios_size; 151 152 cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); 153 #ifdef TARGET_MIPS64 154 clock_set_hz(cpuclk, 6000000); /* 6 MHz */ 155 #else 156 clock_set_hz(cpuclk, 12000000); /* 12 MHz */ 157 #endif 158 159 /* Init CPUs. */ 160 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk, 161 TARGET_BIG_ENDIAN); 162 env = &cpu->env; 163 164 reset_info = g_new0(ResetData, 1); 165 reset_info->cpu = cpu; 166 reset_info->vector = env->active_tc.PC; 167 qemu_register_reset(main_cpu_reset, reset_info); 168 169 /* Allocate RAM. */ 170 memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, 171 &error_fatal); 172 173 memory_region_add_subregion(address_space_mem, 0, machine->ram); 174 175 /* Map the BIOS / boot exception handler. */ 176 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); 177 /* Load a BIOS / boot exception handler image. */ 178 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 179 machine->firmware ?: bios_name); 180 if (filename) { 181 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); 182 g_free(filename); 183 } else { 184 bios_size = -1; 185 } 186 if ((bios_size < 0 || bios_size > BIOS_SIZE) && 187 machine->firmware && !qtest_enabled()) { 188 /* Bail out if we have neither a kernel image nor boot vector code. */ 189 error_report("Could not load MIPS bios '%s'", machine->firmware); 190 exit(1); 191 } else { 192 /* We have a boot vector start address. */ 193 env->active_tc.PC = (target_long)(int32_t)0xbfc00000; 194 } 195 196 if (kernel_filename) { 197 loaderparams.ram_size = machine->ram_size; 198 loaderparams.kernel_filename = kernel_filename; 199 loaderparams.kernel_cmdline = kernel_cmdline; 200 loaderparams.initrd_filename = initrd_filename; 201 reset_info->vector = load_kernel(); 202 } 203 204 /* Init CPU internal devices. */ 205 cpu_mips_irq_init_cpu(cpu); 206 cpu_mips_clock_init(cpu); 207 208 /* 209 * Register 64 KB of ISA IO space at 0x1fd00000. But without interrupts 210 * (except for the hardcoded serial port interrupt) -device cannot work, 211 * so do not expose the ISA bus to the user. 212 */ 213 memory_region_init_alias(isa, NULL, "isa_mmio", 214 get_system_io(), 0, 0x00010000); 215 memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa); 216 217 /* 218 * A single 16450 sits at offset 0x3f8. It is attached to 219 * MIPS CPU INT2, which is interrupt 4. 220 */ 221 if (serial_hd(0)) { 222 DeviceState *dev = qdev_new(TYPE_SERIAL_MM); 223 224 qdev_prop_set_chr(dev, "chardev", serial_hd(0)); 225 qdev_prop_set_uint8(dev, "regshift", 0); 226 qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN); 227 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 228 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); 229 memory_region_add_subregion(get_system_io(), 0x3f8, 230 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 231 } 232 233 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ 234 mipsnet_init(0x4200, env->irq[2]); 235 } 236 237 static void mips_mipssim_machine_init(MachineClass *mc) 238 { 239 mc->desc = "MIPS MIPSsim platform"; 240 mc->init = mips_mipssim_init; 241 #ifdef TARGET_MIPS64 242 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf"); 243 #else 244 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); 245 #endif 246 mc->default_ram_id = "mips_mipssim.ram"; 247 } 248 249 DEFINE_MACHINE("mipssim", mips_mipssim_machine_init) 250