xref: /qemu/hw/mips/mipssim.c (revision 2e985fe000e73097e325e18b943e8babfa96c35c)
1 /*
2  * QEMU/mipssim emulation
3  *
4  * Emulates a very simple machine model similar to the one used by the
5  * proprietary MIPS emulator.
6  *
7  * Copyright (c) 2007 Thiemo Seufer
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a copy
10  * of this software and associated documentation files (the "Software"), to deal
11  * in the Software without restriction, including without limitation the rights
12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13  * copies of the Software, and to permit persons to whom the Software is
14  * furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25  * THE SOFTWARE.
26  */
27 #include "hw/hw.h"
28 #include "hw/mips/mips.h"
29 #include "hw/mips/cpudevs.h"
30 #include "hw/char/serial.h"
31 #include "hw/isa/isa.h"
32 #include "net/net.h"
33 #include "sysemu/sysemu.h"
34 #include "hw/boards.h"
35 #include "hw/mips/bios.h"
36 #include "hw/loader.h"
37 #include "elf.h"
38 #include "hw/sysbus.h"
39 #include "exec/address-spaces.h"
40 #include "qemu/error-report.h"
41 
42 static struct _loaderparams {
43     int ram_size;
44     const char *kernel_filename;
45     const char *kernel_cmdline;
46     const char *initrd_filename;
47 } loaderparams;
48 
49 typedef struct ResetData {
50     MIPSCPU *cpu;
51     uint64_t vector;
52 } ResetData;
53 
54 static int64_t load_kernel(void)
55 {
56     int64_t entry, kernel_high;
57     long kernel_size;
58     long initrd_size;
59     ram_addr_t initrd_offset;
60     int big_endian;
61 
62 #ifdef TARGET_WORDS_BIGENDIAN
63     big_endian = 1;
64 #else
65     big_endian = 0;
66 #endif
67 
68     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
69                            NULL, (uint64_t *)&entry, NULL,
70                            (uint64_t *)&kernel_high, big_endian,
71                            ELF_MACHINE, 1);
72     if (kernel_size >= 0) {
73         if ((entry & ~0x7fffffffULL) == 0x80000000)
74             entry = (int32_t)entry;
75     } else {
76         fprintf(stderr, "qemu: could not load kernel '%s'\n",
77                 loaderparams.kernel_filename);
78         exit(1);
79     }
80 
81     /* load initrd */
82     initrd_size = 0;
83     initrd_offset = 0;
84     if (loaderparams.initrd_filename) {
85         initrd_size = get_image_size (loaderparams.initrd_filename);
86         if (initrd_size > 0) {
87             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
88             if (initrd_offset + initrd_size > loaderparams.ram_size) {
89                 fprintf(stderr,
90                         "qemu: memory too small for initial ram disk '%s'\n",
91                         loaderparams.initrd_filename);
92                 exit(1);
93             }
94             initrd_size = load_image_targphys(loaderparams.initrd_filename,
95                 initrd_offset, loaderparams.ram_size - initrd_offset);
96         }
97         if (initrd_size == (target_ulong) -1) {
98             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
99                     loaderparams.initrd_filename);
100             exit(1);
101         }
102     }
103     return entry;
104 }
105 
106 static void main_cpu_reset(void *opaque)
107 {
108     ResetData *s = (ResetData *)opaque;
109     CPUMIPSState *env = &s->cpu->env;
110 
111     cpu_reset(CPU(s->cpu));
112     env->active_tc.PC = s->vector & ~(target_ulong)1;
113     if (s->vector & 1) {
114         env->hflags |= MIPS_HFLAG_M16;
115     }
116 }
117 
118 static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
119 {
120     DeviceState *dev;
121     SysBusDevice *s;
122 
123     dev = qdev_create(NULL, "mipsnet");
124     qdev_set_nic_properties(dev, nd);
125     qdev_init_nofail(dev);
126 
127     s = SYS_BUS_DEVICE(dev);
128     sysbus_connect_irq(s, 0, irq);
129     memory_region_add_subregion(get_system_io(),
130                                 base,
131                                 sysbus_mmio_get_region(s, 0));
132 }
133 
134 static void
135 mips_mipssim_init(QEMUMachineInitArgs *args)
136 {
137     ram_addr_t ram_size = args->ram_size;
138     const char *cpu_model = args->cpu_model;
139     const char *kernel_filename = args->kernel_filename;
140     const char *kernel_cmdline = args->kernel_cmdline;
141     const char *initrd_filename = args->initrd_filename;
142     char *filename;
143     MemoryRegion *address_space_mem = get_system_memory();
144     MemoryRegion *isa = g_new(MemoryRegion, 1);
145     MemoryRegion *ram = g_new(MemoryRegion, 1);
146     MemoryRegion *bios = g_new(MemoryRegion, 1);
147     MIPSCPU *cpu;
148     CPUMIPSState *env;
149     ResetData *reset_info;
150     int bios_size;
151 
152     /* Init CPUs. */
153     if (cpu_model == NULL) {
154 #ifdef TARGET_MIPS64
155         cpu_model = "5Kf";
156 #else
157         cpu_model = "24Kf";
158 #endif
159     }
160     cpu = cpu_mips_init(cpu_model);
161     if (cpu == NULL) {
162         fprintf(stderr, "Unable to find CPU definition\n");
163         exit(1);
164     }
165     env = &cpu->env;
166 
167     reset_info = g_malloc0(sizeof(ResetData));
168     reset_info->cpu = cpu;
169     reset_info->vector = env->active_tc.PC;
170     qemu_register_reset(main_cpu_reset, reset_info);
171 
172     /* Allocate RAM. */
173     memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size);
174     vmstate_register_ram_global(ram);
175     memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE);
176     vmstate_register_ram_global(bios);
177     memory_region_set_readonly(bios, true);
178 
179     memory_region_add_subregion(address_space_mem, 0, ram);
180 
181     /* Map the BIOS / boot exception handler. */
182     memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
183     /* Load a BIOS / boot exception handler image. */
184     if (bios_name == NULL)
185         bios_name = BIOS_FILENAME;
186     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
187     if (filename) {
188         bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
189         g_free(filename);
190     } else {
191         bios_size = -1;
192     }
193     if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
194         /* Bail out if we have neither a kernel image nor boot vector code. */
195         error_report("Could not load MIPS bios '%s', and no "
196                      "-kernel argument was specified", filename);
197         exit(1);
198     } else {
199         /* We have a boot vector start address. */
200         env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
201     }
202 
203     if (kernel_filename) {
204         loaderparams.ram_size = ram_size;
205         loaderparams.kernel_filename = kernel_filename;
206         loaderparams.kernel_cmdline = kernel_cmdline;
207         loaderparams.initrd_filename = initrd_filename;
208         reset_info->vector = load_kernel();
209     }
210 
211     /* Init CPU internal devices. */
212     cpu_mips_irq_init_cpu(env);
213     cpu_mips_clock_init(env);
214 
215     /* Register 64 KB of ISA IO space at 0x1fd00000. */
216     memory_region_init_alias(isa, NULL, "isa_mmio",
217                              get_system_io(), 0, 0x00010000);
218     memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
219 
220     /* A single 16450 sits at offset 0x3f8. It is attached to
221        MIPS CPU INT2, which is interrupt 4. */
222     if (serial_hds[0])
223         serial_init(0x3f8, env->irq[4], 115200, serial_hds[0],
224                     get_system_io());
225 
226     if (nd_table[0].used)
227         /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
228         mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
229 }
230 
231 static QEMUMachine mips_mipssim_machine = {
232     .name = "mipssim",
233     .desc = "MIPS MIPSsim platform",
234     .init = mips_mipssim_init,
235     DEFAULT_MACHINE_OPTIONS,
236 };
237 
238 static void mips_mipssim_machine_init(void)
239 {
240     qemu_register_machine(&mips_mipssim_machine);
241 }
242 
243 machine_init(mips_mipssim_machine_init);
244