xref: /qemu/hw/mips/mipssim.c (revision 2c65db5e58d2c74921077f6c064ba4c91ebde16a)
1f0fc6f8fSths /*
2f0fc6f8fSths  * QEMU/mipssim emulation
3f0fc6f8fSths  *
4b5e4946fSStefan Weil  * Emulates a very simple machine model similar to the one used by the
5f0fc6f8fSths  * proprietary MIPS emulator.
6a79ee211Sths  *
7a79ee211Sths  * Copyright (c) 2007 Thiemo Seufer
8a79ee211Sths  *
9a79ee211Sths  * Permission is hereby granted, free of charge, to any person obtaining a copy
10a79ee211Sths  * of this software and associated documentation files (the "Software"), to deal
11a79ee211Sths  * in the Software without restriction, including without limitation the rights
12a79ee211Sths  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13a79ee211Sths  * copies of the Software, and to permit persons to whom the Software is
14a79ee211Sths  * furnished to do so, subject to the following conditions:
15a79ee211Sths  *
16a79ee211Sths  * The above copyright notice and this permission notice shall be included in
17a79ee211Sths  * all copies or substantial portions of the Software.
18a79ee211Sths  *
19a79ee211Sths  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20a79ee211Sths  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21a79ee211Sths  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22a79ee211Sths  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23a79ee211Sths  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24a79ee211Sths  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25a79ee211Sths  * THE SOFTWARE.
26f0fc6f8fSths  */
2771e8a915SMarkus Armbruster 
28c684822aSPeter Maydell #include "qemu/osdep.h"
29da34e65cSMarkus Armbruster #include "qapi/error.h"
304771d756SPaolo Bonzini #include "qemu-common.h"
31*2c65db5eSPaolo Bonzini #include "qemu/datadir.h"
324771d756SPaolo Bonzini #include "cpu.h"
338543a806SPhilippe Mathieu-Daudé #include "hw/clock.h"
340d09e41aSPaolo Bonzini #include "hw/mips/mips.h"
350d09e41aSPaolo Bonzini #include "hw/mips/cpudevs.h"
360d09e41aSPaolo Bonzini #include "hw/char/serial.h"
370d09e41aSPaolo Bonzini #include "hw/isa/isa.h"
381422e32dSPaolo Bonzini #include "net/net.h"
399c17d615SPaolo Bonzini #include "sysemu/sysemu.h"
4083c9f4caSPaolo Bonzini #include "hw/boards.h"
410d09e41aSPaolo Bonzini #include "hw/mips/bios.h"
4283c9f4caSPaolo Bonzini #include "hw/loader.h"
43ca20cf32SBlue Swirl #include "elf.h"
4483c9f4caSPaolo Bonzini #include "hw/sysbus.h"
459fac5d88SMarc-André Lureau #include "hw/qdev-properties.h"
46022c62cbSPaolo Bonzini #include "exec/address-spaces.h"
472e985fe0SAurelien Jarno #include "qemu/error-report.h"
4822d5523dSAndreas Färber #include "sysemu/qtest.h"
4971e8a915SMarkus Armbruster #include "sysemu/reset.h"
50f0fc6f8fSths 
517df526e3Sths static struct _loaderparams {
527df526e3Sths     int ram_size;
537df526e3Sths     const char *kernel_filename;
547df526e3Sths     const char *kernel_cmdline;
557df526e3Sths     const char *initrd_filename;
567df526e3Sths } loaderparams;
577df526e3Sths 
58e16ad5b0SAurelien Jarno typedef struct ResetData {
592d44fc8eSAndreas Färber     MIPSCPU *cpu;
60e16ad5b0SAurelien Jarno     uint64_t vector;
61e16ad5b0SAurelien Jarno } ResetData;
62e16ad5b0SAurelien Jarno 
63e16ad5b0SAurelien Jarno static int64_t load_kernel(void)
64f0fc6f8fSths {
65f3839fdaSLi Zhijian     int64_t entry, kernel_high, initrd_size;
66f0fc6f8fSths     long kernel_size;
67c227f099SAnthony Liguori     ram_addr_t initrd_offset;
68ca20cf32SBlue Swirl     int big_endian;
69ca20cf32SBlue Swirl 
70ca20cf32SBlue Swirl #ifdef TARGET_WORDS_BIGENDIAN
71ca20cf32SBlue Swirl     big_endian = 1;
72ca20cf32SBlue Swirl #else
73ca20cf32SBlue Swirl     big_endian = 0;
74ca20cf32SBlue Swirl #endif
75f0fc6f8fSths 
764366e1dbSLiam Merwick     kernel_size = load_elf(loaderparams.kernel_filename, NULL,
774366e1dbSLiam Merwick                            cpu_mips_kseg0_to_phys, NULL,
784366e1dbSLiam Merwick                            (uint64_t *)&entry, NULL,
796cdda0ffSAleksandar Markovic                            (uint64_t *)&kernel_high, NULL, big_endian,
807ef295eaSPeter Crosthwaite                            EM_MIPS, 1, 0);
819d585eaaSPhilippe Mathieu-Daudé     if (kernel_size < 0) {
82bd6e1d81SAlistair Francis         error_report("could not load kernel '%s': %s",
833ee3122cSAurelien Jarno                      loaderparams.kernel_filename,
843ee3122cSAurelien Jarno                      load_elf_strerror(kernel_size));
85f0fc6f8fSths         exit(1);
86f0fc6f8fSths     }
87f0fc6f8fSths 
88f0fc6f8fSths     /* load initrd */
89f0fc6f8fSths     initrd_size = 0;
90f0fc6f8fSths     initrd_offset = 0;
917df526e3Sths     if (loaderparams.initrd_filename) {
927df526e3Sths         initrd_size = get_image_size(loaderparams.initrd_filename);
93f0fc6f8fSths         if (initrd_size > 0) {
94acab36caSPhilippe Mathieu-Daudé             initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
957df526e3Sths             if (initrd_offset + initrd_size > loaderparams.ram_size) {
96bd6e1d81SAlistair Francis                 error_report("memory too small for initial ram disk '%s'",
977df526e3Sths                              loaderparams.initrd_filename);
98f0fc6f8fSths                 exit(1);
99f0fc6f8fSths             }
100dcac9679Spbrook             initrd_size = load_image_targphys(loaderparams.initrd_filename,
101dcac9679Spbrook                 initrd_offset, loaderparams.ram_size - initrd_offset);
102f0fc6f8fSths         }
103f0fc6f8fSths         if (initrd_size == (target_ulong) -1) {
104bd6e1d81SAlistair Francis             error_report("could not load initial ram disk '%s'",
1057df526e3Sths                          loaderparams.initrd_filename);
106f0fc6f8fSths             exit(1);
107f0fc6f8fSths         }
108f0fc6f8fSths     }
109e16ad5b0SAurelien Jarno     return entry;
110f0fc6f8fSths }
111f0fc6f8fSths 
112f0fc6f8fSths static void main_cpu_reset(void *opaque)
113f0fc6f8fSths {
114e16ad5b0SAurelien Jarno     ResetData *s = (ResetData *)opaque;
1152d44fc8eSAndreas Färber     CPUMIPSState *env = &s->cpu->env;
116f0fc6f8fSths 
1172d44fc8eSAndreas Färber     cpu_reset(CPU(s->cpu));
118aecf1376SNathan Froyd     env->active_tc.PC = s->vector & ~(target_ulong)1;
119aecf1376SNathan Froyd     if (s->vector & 1) {
120aecf1376SNathan Froyd         env->hflags |= MIPS_HFLAG_M16;
121aecf1376SNathan Froyd     }
122f0fc6f8fSths }
123f0fc6f8fSths 
124d118d64aSHervé Poussineau static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
125d118d64aSHervé Poussineau {
126d118d64aSHervé Poussineau     DeviceState *dev;
127d118d64aSHervé Poussineau     SysBusDevice *s;
128d118d64aSHervé Poussineau 
1293e80f690SMarkus Armbruster     dev = qdev_new("mipsnet");
130d118d64aSHervé Poussineau     qdev_set_nic_properties(dev, nd);
131d118d64aSHervé Poussineau 
1321356b98dSAndreas Färber     s = SYS_BUS_DEVICE(dev);
1333c6ef471SMarkus Armbruster     sysbus_realize_and_unref(s, &error_fatal);
134d118d64aSHervé Poussineau     sysbus_connect_irq(s, 0, irq);
135d118d64aSHervé Poussineau     memory_region_add_subregion(get_system_io(),
136d118d64aSHervé Poussineau                                 base,
137d118d64aSHervé Poussineau                                 sysbus_mmio_get_region(s, 0));
138d118d64aSHervé Poussineau }
139d118d64aSHervé Poussineau 
140f0fc6f8fSths static void
1413ef96221SMarcel Apfelbaum mips_mipssim_init(MachineState *machine)
142f0fc6f8fSths {
1433ef96221SMarcel Apfelbaum     const char *kernel_filename = machine->kernel_filename;
1443ef96221SMarcel Apfelbaum     const char *kernel_cmdline = machine->kernel_cmdline;
1453ef96221SMarcel Apfelbaum     const char *initrd_filename = machine->initrd_filename;
1465cea8590SPaul Brook     char *filename;
14723ebf23dSAvi Kivity     MemoryRegion *address_space_mem = get_system_memory();
148bdb75c79SPaolo Bonzini     MemoryRegion *isa = g_new(MemoryRegion, 1);
14923ebf23dSAvi Kivity     MemoryRegion *bios = g_new(MemoryRegion, 1);
1508543a806SPhilippe Mathieu-Daudé     Clock *cpuclk;
1517ee274c1SAndreas Färber     MIPSCPU *cpu;
15261c56c8cSAndreas Färber     CPUMIPSState *env;
153e16ad5b0SAurelien Jarno     ResetData *reset_info;
154b5334159Sths     int bios_size;
155f0fc6f8fSths 
1568543a806SPhilippe Mathieu-Daudé     cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
1578543a806SPhilippe Mathieu-Daudé #ifdef TARGET_MIPS64
1588543a806SPhilippe Mathieu-Daudé     clock_set_hz(cpuclk, 6000000); /* 6 MHz */
1598543a806SPhilippe Mathieu-Daudé #else
1608543a806SPhilippe Mathieu-Daudé     clock_set_hz(cpuclk, 12000000); /* 12 MHz */
1618543a806SPhilippe Mathieu-Daudé #endif
1628543a806SPhilippe Mathieu-Daudé 
163f0fc6f8fSths     /* Init CPUs. */
1648543a806SPhilippe Mathieu-Daudé     cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
1657ee274c1SAndreas Färber     env = &cpu->env;
1667ee274c1SAndreas Färber 
1677267c094SAnthony Liguori     reset_info = g_malloc0(sizeof(ResetData));
1682d44fc8eSAndreas Färber     reset_info->cpu = cpu;
169e16ad5b0SAurelien Jarno     reset_info->vector = env->active_tc.PC;
170e16ad5b0SAurelien Jarno     qemu_register_reset(main_cpu_reset, reset_info);
171f0fc6f8fSths 
172f0fc6f8fSths     /* Allocate RAM. */
1733fab7f23SPhilippe Mathieu-Daudé     memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
174f8ed85acSMarkus Armbruster                            &error_fatal);
175f0fc6f8fSths 
176ceefaa3bSIgor Mammedov     memory_region_add_subregion(address_space_mem, 0, machine->ram);
177dcac9679Spbrook 
178dcac9679Spbrook     /* Map the BIOS / boot exception handler. */
17923ebf23dSAvi Kivity     memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
180f0fc6f8fSths     /* Load a BIOS / boot exception handler image. */
18159588beaSPaolo Bonzini     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware ?: BIOS_FILENAME);
1825cea8590SPaul Brook     if (filename) {
1835cea8590SPaul Brook         bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
1847267c094SAnthony Liguori         g_free(filename);
1855cea8590SPaul Brook     } else {
1865cea8590SPaul Brook         bios_size = -1;
1875cea8590SPaul Brook     }
18822d5523dSAndreas Färber     if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
18959588beaSPaolo Bonzini         machine->firmware && !qtest_enabled()) {
190f0fc6f8fSths         /* Bail out if we have neither a kernel image nor boot vector code. */
19159588beaSPaolo Bonzini         error_report("Could not load MIPS bios '%s'", machine->firmware);
1922e985fe0SAurelien Jarno         exit(1);
193f0fc6f8fSths     } else {
194b5334159Sths         /* We have a boot vector start address. */
195b5dc7732Sths         env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
196f0fc6f8fSths     }
197f0fc6f8fSths 
198f0fc6f8fSths     if (kernel_filename) {
199ceefaa3bSIgor Mammedov         loaderparams.ram_size = machine->ram_size;
2007df526e3Sths         loaderparams.kernel_filename = kernel_filename;
2017df526e3Sths         loaderparams.kernel_cmdline = kernel_cmdline;
2027df526e3Sths         loaderparams.initrd_filename = initrd_filename;
203e16ad5b0SAurelien Jarno         reset_info->vector = load_kernel();
204f0fc6f8fSths     }
205f0fc6f8fSths 
206f0fc6f8fSths     /* Init CPU internal devices. */
2075a975d43SPaolo Bonzini     cpu_mips_irq_init_cpu(cpu);
2085a975d43SPaolo Bonzini     cpu_mips_clock_init(cpu);
209f0fc6f8fSths 
210f0fc6f8fSths     /* Register 64 KB of ISA IO space at 0x1fd00000. */
211bdb75c79SPaolo Bonzini     memory_region_init_alias(isa, NULL, "isa_mmio",
212bdb75c79SPaolo Bonzini                              get_system_io(), 0, 0x00010000);
213bdb75c79SPaolo Bonzini     memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
214f0fc6f8fSths 
21533dd6f44SAleksandar Markovic     /*
21633dd6f44SAleksandar Markovic      * A single 16450 sits at offset 0x3f8. It is attached to
21733dd6f44SAleksandar Markovic      * MIPS CPU INT2, which is interrupt 4.
21833dd6f44SAleksandar Markovic      */
2199fac5d88SMarc-André Lureau     if (serial_hd(0)) {
220cf3d932fSPhilippe Mathieu-Daudé         DeviceState *dev = qdev_new(TYPE_SERIAL_MM);
2219fac5d88SMarc-André Lureau 
2229fac5d88SMarc-André Lureau         qdev_prop_set_chr(dev, "chardev", serial_hd(0));
223cf3d932fSPhilippe Mathieu-Daudé         qdev_prop_set_uint8(dev, "regshift", 0);
224cf3d932fSPhilippe Mathieu-Daudé         qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN);
2253c6ef471SMarkus Armbruster         sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
2269fac5d88SMarc-André Lureau         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]);
227d9259178SMarc-André Lureau         sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8,
228d9259178SMarc-André Lureau                       sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
2299fac5d88SMarc-André Lureau     }
230f0fc6f8fSths 
231a005d073SStefan Hajnoczi     if (nd_table[0].used)
232f0fc6f8fSths         /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
233f0fc6f8fSths         mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
234f0fc6f8fSths }
235f0fc6f8fSths 
236e264d29dSEduardo Habkost static void mips_mipssim_machine_init(MachineClass *mc)
237f80f9ec9SAnthony Liguori {
238e264d29dSEduardo Habkost     mc->desc = "MIPS MIPSsim platform";
239e264d29dSEduardo Habkost     mc->init = mips_mipssim_init;
2400fc52fd2SIgor Mammedov #ifdef TARGET_MIPS64
2410fc52fd2SIgor Mammedov     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
2420fc52fd2SIgor Mammedov #else
2430fc52fd2SIgor Mammedov     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
2440fc52fd2SIgor Mammedov #endif
245ceefaa3bSIgor Mammedov     mc->default_ram_id = "mips_mipssim.ram";
246f80f9ec9SAnthony Liguori }
247f80f9ec9SAnthony Liguori 
248e264d29dSEduardo Habkost DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)
249